From d9574bf131c658ca88f957f55837aacd6993cfc4 Mon Sep 17 00:00:00 2001 From: Pavol Rusnak Date: Tue, 7 Nov 2017 18:06:42 +0100 Subject: [PATCH] trezorhal: enable BOR level 3, PVD level 5, turn off display in PVD handler --- embed/boardloader/lowlevel.c | 6 +++--- embed/trezorhal/stm32.c | 8 ++++++++ 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/embed/boardloader/lowlevel.c b/embed/boardloader/lowlevel.c index 606abb3c7..aef547441 100644 --- a/embed/boardloader/lowlevel.c +++ b/embed/boardloader/lowlevel.c @@ -13,7 +13,7 @@ #define WANT_WRP_SECTORS (0) #endif -#define WANT_BOR_LEVEL (OB_BOR_LEVEL2) +#define WANT_BOR_LEVEL (OB_BOR_LEVEL3) // reference RM0090 section 3.9.10; SPRMOD is 0 meaning PCROP disabled.; DB1M is 0 because we use 2MB dual-bank; BFB2 is 0 allowing boot from flash; #define FLASH_OPTCR_VALUE ( (((~WANT_WRP_SECTORS) << FLASH_OPTCR_nWRP_Pos) & FLASH_OPTCR_nWRP_Msk) | \ @@ -120,12 +120,12 @@ void periph_init(void) __HAL_RCC_GPIOD_CLK_ENABLE(); // enable the PVD (programmable voltage detector). - // select the "2.6V" threshold (level 4). + // select the "2.7V" threshold (level 5). // this detector will be active regardless of the // flash option byte BOR setting. __HAL_RCC_PWR_CLK_ENABLE(); PWR_PVDTypeDef pvd_config; - pvd_config.PVDLevel = PWR_PVDLEVEL_4; + pvd_config.PVDLevel = PWR_PVDLEVEL_5; pvd_config.Mode = PWR_PVD_MODE_IT_RISING_FALLING; HAL_PWR_ConfigPVD(&pvd_config); HAL_PWR_EnablePVD(); diff --git a/embed/trezorhal/stm32.c b/embed/trezorhal/stm32.c index b9cb8dde9..d243b967b 100644 --- a/embed/trezorhal/stm32.c +++ b/embed/trezorhal/stm32.c @@ -51,3 +51,11 @@ void SysTick_Handler(void) // 49.71 days = (0xffffffff / (24 * 60 * 60 * 1000)) uwTick++; } + +extern void shutdown(void); + +void PVD_IRQHandler(void) +{ + TIM1->CCR1 = 0; // turn off display backlight + shutdown(); +}