From ab8aeaa10246ab186be1cc8ce41b1ffda41b8ce9 Mon Sep 17 00:00:00 2001 From: kopecdav Date: Wed, 30 Apr 2025 13:12:27 +0200 Subject: [PATCH] fix(core): let LDO selection to sattle before BREN bit is being set [no changelog] --- core/embed/sys/powerctl/stm32u5/powerctl.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/core/embed/sys/powerctl/stm32u5/powerctl.c b/core/embed/sys/powerctl/stm32u5/powerctl.c index 881f7c54b6..070de00855 100644 --- a/core/embed/sys/powerctl/stm32u5/powerctl.c +++ b/core/embed/sys/powerctl/stm32u5/powerctl.c @@ -99,12 +99,17 @@ bool powerctl_hibernate(void) { return false; } - // TEMPORARY FIX: // Enable Backup domain retentaion in VBAT mode before entering the // hiberbation. BREN bit can be accessed only in LDO mode. __HAL_RCC_PWR_CLK_ENABLE(); - PWR->CR3 &= ~PWR_CR3_REGSEL; // Select LDO mode + + // Switch to LDO regulator + CLEAR_BIT(PWR->CR3, PWR_CR3_REGSEL); + // Wait until system switch on new regulator + while (HAL_IS_BIT_SET(PWR->SVMSR, PWR_SVMSR_REGS)) + ; + // Enable backup domain retention PWR->BDCR1 |= PWR_BDCR1_BREN; if (!npm1300_enter_shipmode()) {