From 9992de430ce55456e7fd975ac54429a7f75842f0 Mon Sep 17 00:00:00 2001 From: tychovrahe Date: Fri, 14 Mar 2025 06:54:24 +0100 Subject: [PATCH] feat(core): stm32u5 i2c driver - support up to 5 i2c busses [no changelog] --- core/embed/io/i2c_bus/stm32u5/i2c_bus.c | 40 +++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/core/embed/io/i2c_bus/stm32u5/i2c_bus.c b/core/embed/io/i2c_bus/stm32u5/i2c_bus.c index 153b4a8fc8..548171f0e0 100644 --- a/core/embed/io/i2c_bus/stm32u5/i2c_bus.c +++ b/core/embed/io/i2c_bus/stm32u5/i2c_bus.c @@ -132,6 +132,21 @@ static const i2c_bus_def_t g_i2c_bus_def[I2C_COUNT] = { .guard_time = I2C_INSTANCE_3_GUARD_TIME, }, #endif +#ifdef I2C_INSTANCE_4 + { + .regs = I2C_INSTANCE_4, + .scl_port = I2C_INSTANCE_4_SCL_PORT, + .sda_port = I2C_INSTANCE_4_SDA_PORT, + .scl_pin = I2C_INSTANCE_4_SCL_PIN, + .sda_pin = I2C_INSTANCE_4_SDA_PIN, + .pin_af = I2C_INSTANCE_4_PIN_AF, + .reset_reg = I2C_INSTANCE_4_RESET_REG, + .reset_bit = I2C_INSTANCE_4_RESET_BIT, + .ev_irq = I2C_INSTANCE_4_EV_IRQn, + .er_irq = I2C_INSTANCE_4_ER_IRQn, + .guard_time = I2C_INSTANCE_4_GUARD_TIME, + }, +#endif }; struct i2c_bus { @@ -295,6 +310,13 @@ static bool i2c_bus_init(i2c_bus_t* bus, int bus_index) { I2C_INSTANCE_3_SCL_CLK_EN(); I2C_INSTANCE_3_SDA_CLK_EN(); break; +#endif +#ifdef I2C_INSTANCE_4 + case 4: + I2C_INSTANCE_4_CLK_EN(); + I2C_INSTANCE_4_SCL_CLK_EN(); + I2C_INSTANCE_4_SDA_CLK_EN(); + break; #endif default: goto cleanup; @@ -959,4 +981,22 @@ void I2C_INSTANCE_3_ER_IRQHandler(void) { } #endif +#ifdef I2C_INSTANCE_4 +void I2C_INSTANCE_4_EV_IRQHandler(void) { + IRQ_LOG_ENTER(); + mpu_mode_t mpu_mode = mpu_reconfig(MPU_MODE_DEFAULT); + i2c_bus_ev_handler(&g_i2c_bus_driver[4]); + mpu_restore(mpu_mode); + IRQ_LOG_EXIT(); +} + +void I2C_INSTANCE_4_ER_IRQHandler(void) { + IRQ_LOG_ENTER(); + mpu_mode_t mpu_mode = mpu_reconfig(MPU_MODE_DEFAULT); + i2c_bus_er_handler(&g_i2c_bus_driver[4]); + mpu_restore(mpu_mode); + IRQ_LOG_EXIT(); +} +#endif + #endif // KERNEL_MODE