From 7bd366393008245ae297068188869772b8842964 Mon Sep 17 00:00:00 2001 From: cepetr Date: Thu, 31 Oct 2024 09:23:37 +0100 Subject: [PATCH] fix(core): align coreapp start to 8KB (u5 only) [no changelog] --- core/embed/lib/image.h | 2 -- core/embed/models/D001/memory.ld | 1 + core/embed/models/D001/model_D001.h | 9 +++++---- core/embed/models/D002/memory.ld | 1 + core/embed/models/D002/model_D002.h | 7 ++++--- core/embed/models/T2B1/memory.ld | 1 + core/embed/models/T2B1/model_T2B1.h | 9 +++++---- core/embed/models/T2T1/memory.ld | 1 + core/embed/models/T2T1/model_T2T1.h | 9 +++++---- core/embed/models/T3B1/memory.ld | 1 + core/embed/models/T3B1/model_T3B1.h | 5 +++-- core/embed/models/T3T1/memory.ld | 1 + core/embed/models/T3T1/model_T3T1.h | 5 +++-- core/embed/models/T3W1/memory.ld | 1 + core/embed/models/T3W1/model_T3W1.h | 10 ++++++---- core/embed/trezorhal/stm32f4/linker/firmware.ld | 2 +- core/embed/trezorhal/stm32u5/linker/u58/firmware.ld | 2 +- core/embed/trezorhal/stm32u5/linker/u5a/firmware.ld | 2 +- core/embed/trezorhal/stm32u5/mpu.c | 6 ++++-- 19 files changed, 45 insertions(+), 30 deletions(-) diff --git a/core/embed/lib/image.h b/core/embed/lib/image.h index f837f7d969..9ca8c2209a 100644 --- a/core/embed/lib/image.h +++ b/core/embed/lib/image.h @@ -39,8 +39,6 @@ #define IMAGE_CODE_ALIGN(addr) \ ((((uint32_t)(uintptr_t)addr) + (CODE_ALIGNMENT - 1)) & ~(CODE_ALIGNMENT - 1)) -#define COREAPP_ALIGNMENT 512 - #define COREAPP_CODE_ALIGN(addr) \ ((((uint32_t)(uintptr_t)addr) + (COREAPP_ALIGNMENT - 1)) & \ ~(COREAPP_ALIGNMENT - 1)) diff --git a/core/embed/models/D001/memory.ld b/core/embed/models/D001/memory.ld index 8c5a1eaec3..101d6b87f5 100644 --- a/core/embed/models/D001/memory.ld +++ b/core/embed/models/D001/memory.ld @@ -50,3 +50,4 @@ KERNEL_FRAMEBUFFER_SIZE = 0x0; KERNEL_SRAM_SIZE = 0x400; BOOTARGS_SIZE = 0x100; CODE_ALIGNMENT = 0x200; +COREAPP_ALIGNMENT = 0x200; diff --git a/core/embed/models/D001/model_D001.h b/core/embed/models/D001/model_D001.h index 87aa313783..18b75baa4b 100644 --- a/core/embed/models/D001/model_D001.h +++ b/core/embed/models/D001/model_D001.h @@ -87,12 +87,13 @@ #define FIRMWARE_P2_SECTOR_END 23 // RAM layout -#define KERNEL_STACK_SIZE 8 * 1024 -#define KERNEL_CCMRAM_SIZE 16 * 1024 -#define KERNEL_FRAMEBUFFER_SIZE 0 * 1024 -#define KERNEL_SRAM_SIZE 1 * 1024 +#define KERNEL_STACK_SIZE (8 * 1024) +#define KERNEL_CCMRAM_SIZE (16 * 1024) +#define KERNEL_FRAMEBUFFER_SIZE (0 * 1024) +#define KERNEL_SRAM_SIZE (1 * 1024) #define BOOTARGS_SIZE 0x100 #define CODE_ALIGNMENT 0x200 +#define COREAPP_ALIGNMENT 0x200 #endif diff --git a/core/embed/models/D002/memory.ld b/core/embed/models/D002/memory.ld index be8ee645c7..4541857c45 100644 --- a/core/embed/models/D002/memory.ld +++ b/core/embed/models/D002/memory.ld @@ -45,3 +45,4 @@ KERNEL_SRAM2_SIZE = 0x2400; KERNEL_SRAM3_SIZE = 0xbb800; BOOTARGS_SIZE = 0x100; CODE_ALIGNMENT = 0x400; +COREAPP_ALIGNMENT = 0x2000; diff --git a/core/embed/models/D002/model_D002.h b/core/embed/models/D002/model_D002.h index 5a3ce0d14f..3dbcb98ec2 100644 --- a/core/embed/models/D002/model_D002.h +++ b/core/embed/models/D002/model_D002.h @@ -83,11 +83,12 @@ // RAM layout #define KERNEL_U_RAM_SIZE 512 -#define KERNEL_SRAM1_SIZE 16 * 1024 -#define KERNEL_SRAM2_SIZE 9 * 1024 -#define KERNEL_SRAM3_SIZE 750 * 1024 +#define KERNEL_SRAM1_SIZE (16 * 1024) +#define KERNEL_SRAM2_SIZE (9 * 1024) +#define KERNEL_SRAM3_SIZE (750 * 1024) #define BOOTARGS_SIZE 0x100 #define CODE_ALIGNMENT 0x400 +#define COREAPP_ALIGNMENT 0x2000 #endif diff --git a/core/embed/models/T2B1/memory.ld b/core/embed/models/T2B1/memory.ld index f0dd27854c..acae9018ec 100644 --- a/core/embed/models/T2B1/memory.ld +++ b/core/embed/models/T2B1/memory.ld @@ -54,3 +54,4 @@ KERNEL_FRAMEBUFFER_SIZE = 0x2000; KERNEL_SRAM_SIZE = 0x400; BOOTARGS_SIZE = 0x100; CODE_ALIGNMENT = 0x200; +COREAPP_ALIGNMENT = 0x200; diff --git a/core/embed/models/T2B1/model_T2B1.h b/core/embed/models/T2B1/model_T2B1.h index 428db23bf2..006ba89705 100644 --- a/core/embed/models/T2B1/model_T2B1.h +++ b/core/embed/models/T2B1/model_T2B1.h @@ -92,12 +92,13 @@ #define FIRMWARE_P2_SECTOR_END 23 // RAM layout -#define KERNEL_STACK_SIZE 8 * 1024 -#define KERNEL_CCMRAM_SIZE 16 * 1024 -#define KERNEL_FRAMEBUFFER_SIZE 8 * 1024 -#define KERNEL_SRAM_SIZE 1 * 1024 +#define KERNEL_STACK_SIZE (8 * 1024) +#define KERNEL_CCMRAM_SIZE (16 * 1024) +#define KERNEL_FRAMEBUFFER_SIZE (8 * 1024) +#define KERNEL_SRAM_SIZE (1 * 1024) #define BOOTARGS_SIZE 0x100 #define CODE_ALIGNMENT 0x200 +#define COREAPP_ALIGNMENT 0x200 #endif diff --git a/core/embed/models/T2T1/memory.ld b/core/embed/models/T2T1/memory.ld index 8c5a1eaec3..101d6b87f5 100644 --- a/core/embed/models/T2T1/memory.ld +++ b/core/embed/models/T2T1/memory.ld @@ -50,3 +50,4 @@ KERNEL_FRAMEBUFFER_SIZE = 0x0; KERNEL_SRAM_SIZE = 0x400; BOOTARGS_SIZE = 0x100; CODE_ALIGNMENT = 0x200; +COREAPP_ALIGNMENT = 0x200; diff --git a/core/embed/models/T2T1/model_T2T1.h b/core/embed/models/T2T1/model_T2T1.h index d50a99dd88..ce2d8eadf3 100644 --- a/core/embed/models/T2T1/model_T2T1.h +++ b/core/embed/models/T2T1/model_T2T1.h @@ -87,12 +87,13 @@ #define FIRMWARE_P2_SECTOR_END 23 // RAM layout -#define KERNEL_STACK_SIZE 8 * 1024 -#define KERNEL_CCMRAM_SIZE 16 * 1024 -#define KERNEL_FRAMEBUFFER_SIZE 0 * 1024 -#define KERNEL_SRAM_SIZE 1 * 1024 +#define KERNEL_STACK_SIZE (8 * 1024) +#define KERNEL_CCMRAM_SIZE (16 * 1024) +#define KERNEL_FRAMEBUFFER_SIZE (0 * 1024) +#define KERNEL_SRAM_SIZE (1 * 1024) #define BOOTARGS_SIZE 0x100 #define CODE_ALIGNMENT 0x200 +#define COREAPP_ALIGNMENT 0x200 #endif diff --git a/core/embed/models/T3B1/memory.ld b/core/embed/models/T3B1/memory.ld index add76263f7..1151951196 100644 --- a/core/embed/models/T3B1/memory.ld +++ b/core/embed/models/T3B1/memory.ld @@ -45,3 +45,4 @@ KERNEL_SRAM2_SIZE = 0x2000; KERNEL_SRAM3_SIZE = 0x38400; BOOTARGS_SIZE = 0x100; CODE_ALIGNMENT = 0x200; +COREAPP_ALIGNMENT = 0x2000; diff --git a/core/embed/models/T3B1/model_T3B1.h b/core/embed/models/T3B1/model_T3B1.h index df88df0594..86fac52480 100644 --- a/core/embed/models/T3B1/model_T3B1.h +++ b/core/embed/models/T3B1/model_T3B1.h @@ -82,11 +82,12 @@ // RAM layout #define KERNEL_U_RAM_SIZE 512 -#define KERNEL_SRAM1_SIZE 16 * 1024 -#define KERNEL_SRAM2_SIZE 8 * 1024 +#define KERNEL_SRAM1_SIZE (16 * 1024) +#define KERNEL_SRAM2_SIZE (8 * 1024) #define KERNEL_SRAM3_SIZE 0x38400 #define BOOTARGS_SIZE 0x100 #define CODE_ALIGNMENT 0x200 +#define COREAPP_ALIGNMENT 0x2000 #endif diff --git a/core/embed/models/T3T1/memory.ld b/core/embed/models/T3T1/memory.ld index add76263f7..1151951196 100644 --- a/core/embed/models/T3T1/memory.ld +++ b/core/embed/models/T3T1/memory.ld @@ -45,3 +45,4 @@ KERNEL_SRAM2_SIZE = 0x2000; KERNEL_SRAM3_SIZE = 0x38400; BOOTARGS_SIZE = 0x100; CODE_ALIGNMENT = 0x200; +COREAPP_ALIGNMENT = 0x2000; diff --git a/core/embed/models/T3T1/model_T3T1.h b/core/embed/models/T3T1/model_T3T1.h index ff6bb7a33b..7c17bdf82c 100644 --- a/core/embed/models/T3T1/model_T3T1.h +++ b/core/embed/models/T3T1/model_T3T1.h @@ -82,11 +82,12 @@ // RAM layout #define KERNEL_U_RAM_SIZE 512 -#define KERNEL_SRAM1_SIZE 16 * 1024 -#define KERNEL_SRAM2_SIZE 8 * 1024 +#define KERNEL_SRAM1_SIZE (16 * 1024) +#define KERNEL_SRAM2_SIZE (8 * 1024) #define KERNEL_SRAM3_SIZE 0x38400 #define BOOTARGS_SIZE 0x100 #define CODE_ALIGNMENT 0x200 +#define COREAPP_ALIGNMENT 0x2000 #endif diff --git a/core/embed/models/T3W1/memory.ld b/core/embed/models/T3W1/memory.ld index 8c5a1eaec3..296dc54493 100644 --- a/core/embed/models/T3W1/memory.ld +++ b/core/embed/models/T3W1/memory.ld @@ -50,3 +50,4 @@ KERNEL_FRAMEBUFFER_SIZE = 0x0; KERNEL_SRAM_SIZE = 0x400; BOOTARGS_SIZE = 0x100; CODE_ALIGNMENT = 0x200; +COREAPP_ALIGNMENT = 0x2000; diff --git a/core/embed/models/T3W1/model_T3W1.h b/core/embed/models/T3W1/model_T3W1.h index dcae9a33be..04b46a0140 100644 --- a/core/embed/models/T3W1/model_T3W1.h +++ b/core/embed/models/T3W1/model_T3W1.h @@ -89,11 +89,13 @@ #define FIRMWARE_P2_SECTOR_END 23 // RAM layout -#define KERNEL_STACK_SIZE 8 * 1024 -#define KERNEL_CCMRAM_SIZE 16 * 1024 -#define KERNEL_FRAMEBUFFER_SIZE 0 * 1024 -#define KERNEL_SRAM_SIZE 1 * 1024 +#define KERNEL_STACK_SIZE (8 * 1024) +#define KERNEL_CCMRAM_SIZE (16 * 1024) +#define KERNEL_FRAMEBUFFER_SIZE (0 * 1024) +#define KERNEL_SRAM_SIZE (1 * 1024) #define BOOTARGS_SIZE 0x100 #define CODE_ALIGNMENT 0x200 +#define COREAPP_ALIGNMENT 0x2000 + #endif diff --git a/core/embed/trezorhal/stm32f4/linker/firmware.ld b/core/embed/trezorhal/stm32f4/linker/firmware.ld index c6665478a4..856e2171cb 100644 --- a/core/embed/trezorhal/stm32f4/linker/firmware.ld +++ b/core/embed/trezorhal/stm32f4/linker/firmware.ld @@ -52,7 +52,7 @@ SECTIONS { .flash : ALIGN(512) { KEEP(*(.kernel)); - . = ALIGN(512); + . = ALIGN(COREAPP_ALIGNMENT); KEEP(*(.vector_table)); . = ALIGN(4); *(.text*); diff --git a/core/embed/trezorhal/stm32u5/linker/u58/firmware.ld b/core/embed/trezorhal/stm32u5/linker/u58/firmware.ld index a8beed9f32..7e7b741ed8 100644 --- a/core/embed/trezorhal/stm32u5/linker/u58/firmware.ld +++ b/core/embed/trezorhal/stm32u5/linker/u58/firmware.ld @@ -47,7 +47,7 @@ SECTIONS { .flash : ALIGN(CODE_ALIGNMENT) { KEEP(*(.kernel)); - . = ALIGN(512); + . = ALIGN(COREAPP_ALIGNMENT); KEEP(*(.vector_table)); . = ALIGN(4); *(.text*); diff --git a/core/embed/trezorhal/stm32u5/linker/u5a/firmware.ld b/core/embed/trezorhal/stm32u5/linker/u5a/firmware.ld index eaccc52f1e..2ca80fae5b 100644 --- a/core/embed/trezorhal/stm32u5/linker/u5a/firmware.ld +++ b/core/embed/trezorhal/stm32u5/linker/u5a/firmware.ld @@ -46,7 +46,7 @@ SECTIONS { .flash : ALIGN(CODE_ALIGNMENT) { KEEP(*(.kernel)); - . = ALIGN(512); + . = ALIGN(COREAPP_ALIGNMENT); KEEP(*(.vector_table)); . = ALIGN(4); *(.text*); diff --git a/core/embed/trezorhal/stm32u5/mpu.c b/core/embed/trezorhal/stm32u5/mpu.c index 598cee1c26..8baa72449b 100644 --- a/core/embed/trezorhal/stm32u5/mpu.c +++ b/core/embed/trezorhal/stm32u5/mpu.c @@ -21,6 +21,7 @@ #include #include "common.h" +#include "image.h" #include "irq.h" #include "model.h" #include "mpu.h" @@ -172,8 +173,9 @@ extern uint32_t _codelen; #define KERNEL_FLASH_START KERNEL_START #define KERNEL_FLASH_SIZE (KERNEL_SIZE - KERNEL_U_FLASH_SIZE) -#define COREAPP_FLASH_START (KERNEL_FLASH_START + KERNEL_SIZE) -#define COREAPP_FLASH_SIZE (FIRMWARE_MAXSIZE - KERNEL_SIZE) +#define COREAPP_FLASH_START COREAPP_CODE_ALIGN(KERNEL_FLASH_START + KERNEL_SIZE) +#define COREAPP_FLASH_SIZE \ + (FIRMWARE_MAXSIZE - (COREAPP_FLASH_START - KERNEL_FLASH_START)) #ifdef STM32U585xx #define COREAPP_RAM1_START SRAM1_BASE