From 45a4a944d01032abb2803a5e05d890a6dac1e036 Mon Sep 17 00:00:00 2001 From: mcudev <29890609+mcudev@users.noreply.github.com> Date: Tue, 17 Oct 2017 05:42:57 -0400 Subject: [PATCH] boardloader, bootloader, firmware: only call periph_init in boardloader (#54) --- embed/boardloader/main.c | 27 +++++++++++++++++++++++++++ embed/bootloader/main.c | 2 -- embed/firmware/main.c | 2 -- embed/trezorhal/common.c | 25 ------------------------- embed/trezorhal/common.h | 2 -- 5 files changed, 27 insertions(+), 31 deletions(-) diff --git a/embed/boardloader/main.c b/embed/boardloader/main.c index de4710ea9..dd7ece766 100644 --- a/embed/boardloader/main.c +++ b/embed/boardloader/main.c @@ -1,3 +1,5 @@ +#include STM32_HAL_H + #include #include "common.h" @@ -147,6 +149,31 @@ static const uint8_t * const BOARDLOADER_KEYS[] = { #endif }; +void periph_init(void) +{ + // STM32F4xx HAL library initialization: + // - configure the Flash prefetch, instruction and data caches + // - configure the Systick to generate an interrupt each 1 msec + // - set NVIC Group Priority to 4 + // - global MSP (MCU Support Package) initialization + HAL_Init(); + + // Enable GPIO clocks + __HAL_RCC_GPIOA_CLK_ENABLE(); + __HAL_RCC_GPIOB_CLK_ENABLE(); + __HAL_RCC_GPIOC_CLK_ENABLE(); + __HAL_RCC_GPIOD_CLK_ENABLE(); + + // Clear the reset flags + PWR->CR |= PWR_CR_CSBF; + RCC->CSR |= RCC_CSR_RMVF; + + // Enable CPU ticks + CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; // Enable DWT + DWT->CYCCNT = 0; // Reset Cycle Count Register + DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; // Enable Cycle Count Register +} + int main(void) { diff --git a/embed/bootloader/main.c b/embed/bootloader/main.c index 8ad9d83f4..7b96f8055 100644 --- a/embed/bootloader/main.c +++ b/embed/bootloader/main.c @@ -212,8 +212,6 @@ int main(void) check_bootloader_version(); #endif - periph_init(); - display_orientation(0); ensure(0 == touch_init(), NULL); diff --git a/embed/firmware/main.c b/embed/firmware/main.c index c5d9f3ee9..1489165a6 100644 --- a/embed/firmware/main.c +++ b/embed/firmware/main.c @@ -24,8 +24,6 @@ int main(void) { - periph_init(); - pendsv_init(); display_orientation(0); diff --git a/embed/trezorhal/common.c b/embed/trezorhal/common.c index ff79fc0f5..f2004eb87 100644 --- a/embed/trezorhal/common.c +++ b/embed/trezorhal/common.c @@ -43,31 +43,6 @@ void __assert_func(const char *file, int line, const char *func, const char *exp } #endif -void periph_init(void) { - - // STM32F4xx HAL library initialization: - // - configure the Flash prefetch, instruction and data caches - // - configure the Systick to generate an interrupt each 1 msec - // - set NVIC Group Priority to 4 - // - global MSP (MCU Support Package) initialization - HAL_Init(); - - // Enable GPIO clocks - __HAL_RCC_GPIOA_CLK_ENABLE(); - __HAL_RCC_GPIOB_CLK_ENABLE(); - __HAL_RCC_GPIOC_CLK_ENABLE(); - __HAL_RCC_GPIOD_CLK_ENABLE(); - - // Clear the reset flags - PWR->CR |= PWR_CR_CSBF; - RCC->CSR |= RCC_CSR_RMVF; - - // Enable CPU ticks - CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; // Enable DWT - DWT->CYCCNT = 0; // Reset Cycle Count Register - DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; // Enable Cycle Count Register -} - void hal_delay(uint32_t ms) { HAL_Delay(ms); diff --git a/embed/trezorhal/common.h b/embed/trezorhal/common.h index a8158a804..a0c31d9b1 100644 --- a/embed/trezorhal/common.h +++ b/embed/trezorhal/common.h @@ -12,8 +12,6 @@ extern void memset_reg(volatile void *start, volatile void *stop, uint32_t val); void clear_otg_hs_memory(void); -void periph_init(void); - void __attribute__((noreturn)) __fatal_error(const char *expr, const char *msg, const char *file, int line, const char *func); #define ensure(expr, msg) ((expr) ? (void)0 : __fatal_error(#expr, msg, __FILE__, __LINE__, __func__))