diff --git a/core/embed/trezorhal/stm32f4/dma.c b/core/embed/trezorhal/stm32f4/dma.c deleted file mode 100644 index 46e10f31a..000000000 --- a/core/embed/trezorhal/stm32f4/dma.c +++ /dev/null @@ -1,305 +0,0 @@ -// clang-format off - -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015-2019 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#include -#include - -#include "dma.h" -#include "irq.h" -#include "systick.h" -#include "supervise.h" - -#define DMA_IDLE_ENABLED() (dma_idle.enabled != 0) -#define DMA_SYSTICK_LOG2 (3) -#define DMA_SYSTICK_MASK ((1 << DMA_SYSTICK_LOG2) - 1) -#define DMA_IDLE_TICK_MAX (8) // 8*8 = 64 msec -#define DMA_IDLE_TICK(tick) (((tick) & ~(SYSTICK_DISPATCH_NUM_SLOTS - 1) & DMA_SYSTICK_MASK) == 0) - -typedef enum { - dma_id_not_defined=-1, - dma_id_0, - dma_id_1, - dma_id_2, - dma_id_3, - dma_id_4, - dma_id_5, - dma_id_6, - dma_id_7, - dma_id_8, - dma_id_9, - dma_id_10, - dma_id_11, - dma_id_12, - dma_id_13, - dma_id_14, - dma_id_15, -} dma_id_t; - -typedef union { - uint16_t enabled; // Used to test if both counters are == 0 - uint8_t counter[2]; -} dma_idle_count_t; - -struct _dma_descr_t { - DMA_Stream_TypeDef *instance; - uint32_t sub_instance; - dma_id_t id; - const DMA_InitTypeDef *init; -}; - -// Parameters to dma_init() for SDIO tx and rx. -static const DMA_InitTypeDef dma_init_struct_sdio = { - .Channel = 0, - .Direction = 0, - .PeriphInc = DMA_PINC_DISABLE, - .MemInc = DMA_MINC_ENABLE, - .PeriphDataAlignment = DMA_PDATAALIGN_WORD, - .MemDataAlignment = DMA_MDATAALIGN_WORD, - .Mode = DMA_PFCTRL, - .Priority = DMA_PRIORITY_VERY_HIGH, - .FIFOMode = DMA_FIFOMODE_ENABLE, - .FIFOThreshold = DMA_FIFO_THRESHOLD_FULL, - .MemBurst = DMA_MBURST_INC4, - .PeriphBurst = DMA_PBURST_INC4, -}; - -#define NCONTROLLERS (2) -#define NSTREAMS_PER_CONTROLLER (8) -#define NSTREAM (NCONTROLLERS * NSTREAMS_PER_CONTROLLER) - -#define DMA_SUB_INSTANCE_AS_UINT8(dma_channel) (((dma_channel) & DMA_SxCR_CHSEL) >> 25) - -#define DMA1_ENABLE_MASK (0x00ff) // Bits in dma_enable_mask corresponding to DMA1 -#define DMA2_ENABLE_MASK (0xff00) // Bits in dma_enable_mask corresponding to DMA2 - -const dma_descr_t dma_SDIO_0 = { DMA2_Stream3, DMA_CHANNEL_4, dma_id_11, &dma_init_struct_sdio }; - -static const uint8_t dma_irqn[NSTREAM] = { - DMA1_Stream0_IRQn, - DMA1_Stream1_IRQn, - DMA1_Stream2_IRQn, - DMA1_Stream3_IRQn, - DMA1_Stream4_IRQn, - DMA1_Stream5_IRQn, - DMA1_Stream6_IRQn, - DMA1_Stream7_IRQn, - DMA2_Stream0_IRQn, - DMA2_Stream1_IRQn, - DMA2_Stream2_IRQn, - DMA2_Stream3_IRQn, - DMA2_Stream4_IRQn, - DMA2_Stream5_IRQn, - DMA2_Stream6_IRQn, - DMA2_Stream7_IRQn, -}; - -static DMA_HandleTypeDef *dma_handle[NSTREAM] = {NULL}; -static uint8_t dma_last_sub_instance[NSTREAM]; -static volatile uint32_t dma_enable_mask = 0; -volatile dma_idle_count_t dma_idle; - -#define DMA_INVALID_CHANNEL 0xff // Value stored in dma_last_channel which means invalid - -#define DMA1_IS_CLK_ENABLED() ((RCC->AHB1ENR & RCC_AHB1ENR_DMA1EN) != 0) -#define DMA2_IS_CLK_ENABLED() ((RCC->AHB1ENR & RCC_AHB1ENR_DMA2EN) != 0) - -void DMA1_Stream0_IRQHandler(void) { IRQ_ENTER(DMA1_Stream0_IRQn); if (dma_handle[dma_id_0] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_0]); } IRQ_EXIT(DMA1_Stream0_IRQn); } -void DMA1_Stream1_IRQHandler(void) { IRQ_ENTER(DMA1_Stream1_IRQn); if (dma_handle[dma_id_1] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_1]); } IRQ_EXIT(DMA1_Stream1_IRQn); } -void DMA1_Stream2_IRQHandler(void) { IRQ_ENTER(DMA1_Stream2_IRQn); if (dma_handle[dma_id_2] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_2]); } IRQ_EXIT(DMA1_Stream2_IRQn); } -void DMA1_Stream3_IRQHandler(void) { IRQ_ENTER(DMA1_Stream3_IRQn); if (dma_handle[dma_id_3] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_3]); } IRQ_EXIT(DMA1_Stream3_IRQn); } -void DMA1_Stream4_IRQHandler(void) { IRQ_ENTER(DMA1_Stream4_IRQn); if (dma_handle[dma_id_4] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_4]); } IRQ_EXIT(DMA1_Stream4_IRQn); } -void DMA1_Stream5_IRQHandler(void) { IRQ_ENTER(DMA1_Stream5_IRQn); if (dma_handle[dma_id_5] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_5]); } IRQ_EXIT(DMA1_Stream5_IRQn); } -void DMA1_Stream6_IRQHandler(void) { IRQ_ENTER(DMA1_Stream6_IRQn); if (dma_handle[dma_id_6] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_6]); } IRQ_EXIT(DMA1_Stream6_IRQn); } -void DMA1_Stream7_IRQHandler(void) { IRQ_ENTER(DMA1_Stream7_IRQn); if (dma_handle[dma_id_7] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_7]); } IRQ_EXIT(DMA1_Stream7_IRQn); } -void DMA2_Stream0_IRQHandler(void) { IRQ_ENTER(DMA2_Stream0_IRQn); if (dma_handle[dma_id_8] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_8]); } IRQ_EXIT(DMA2_Stream0_IRQn); } -void DMA2_Stream1_IRQHandler(void) { IRQ_ENTER(DMA2_Stream1_IRQn); if (dma_handle[dma_id_9] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_9]); } IRQ_EXIT(DMA2_Stream1_IRQn); } -void DMA2_Stream2_IRQHandler(void) { IRQ_ENTER(DMA2_Stream2_IRQn); if (dma_handle[dma_id_10] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_10]); } IRQ_EXIT(DMA2_Stream2_IRQn); } -void DMA2_Stream3_IRQHandler(void) { IRQ_ENTER(DMA2_Stream3_IRQn); if (dma_handle[dma_id_11] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_11]); } IRQ_EXIT(DMA2_Stream3_IRQn); } -void DMA2_Stream4_IRQHandler(void) { IRQ_ENTER(DMA2_Stream4_IRQn); if (dma_handle[dma_id_12] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_12]); } IRQ_EXIT(DMA2_Stream4_IRQn); } -void DMA2_Stream5_IRQHandler(void) { IRQ_ENTER(DMA2_Stream5_IRQn); if (dma_handle[dma_id_13] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_13]); } IRQ_EXIT(DMA2_Stream5_IRQn); } -void DMA2_Stream6_IRQHandler(void) { IRQ_ENTER(DMA2_Stream6_IRQn); if (dma_handle[dma_id_14] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_14]); } IRQ_EXIT(DMA2_Stream6_IRQn); } -void DMA2_Stream7_IRQHandler(void) { IRQ_ENTER(DMA2_Stream7_IRQn); if (dma_handle[dma_id_15] != NULL) { HAL_DMA_IRQHandler(dma_handle[dma_id_15]); } IRQ_EXIT(DMA2_Stream7_IRQn); } - -static void dma_idle_handler(uint32_t tick); - -// Resets the idle counter for the DMA controller associated with dma_id. -static void dma_tickle(dma_id_t dma_id) { - dma_idle.counter[(dma_id < NSTREAMS_PER_CONTROLLER) ? 0 : 1] = 1; - systick_enable_dispatch(SYSTICK_DISPATCH_DMA, dma_idle_handler); -} - -static void dma_enable_clock(dma_id_t dma_id) { - // We don't want dma_tick_handler() to turn off the clock right after we - // enable it, so we need to mark the channel in use in an atomic fashion. - uint32_t irq_state = disable_irq(); - uint32_t old_enable_mask = dma_enable_mask; - dma_enable_mask |= (1 << dma_id); - enable_irq(irq_state); - - if (dma_id < NSTREAMS_PER_CONTROLLER) { - if (((old_enable_mask & DMA1_ENABLE_MASK) == 0) && !DMA1_IS_CLK_ENABLED()) { - __HAL_RCC_DMA1_CLK_ENABLE(); - - // We just turned on the clock. This means that anything stored - // in dma_last_channel (for DMA1) needs to be invalidated. - - for (int channel = 0; channel < NSTREAMS_PER_CONTROLLER; channel++) { - dma_last_sub_instance[channel] = DMA_INVALID_CHANNEL; - } - } - } - #if defined(DMA2) - else { - if (((old_enable_mask & DMA2_ENABLE_MASK) == 0) && !DMA2_IS_CLK_ENABLED()) { - __HAL_RCC_DMA2_CLK_ENABLE(); - - // We just turned on the clock. This means that anything stored - // in dma_last_channel (for DMA2) needs to be invalidated. - - for (int channel = NSTREAMS_PER_CONTROLLER; channel < NSTREAM; channel++) { - dma_last_sub_instance[channel] = DMA_INVALID_CHANNEL; - } - } - } - #endif -} - -static void dma_disable_clock(dma_id_t dma_id) { - // We just mark the clock as disabled here, but we don't actually disable it. - // We wait for the timer to expire first, which means that back-to-back - // transfers don't have to initialize as much. - dma_tickle(dma_id); - dma_enable_mask &= ~(1 << dma_id); -} - -void dma_init_handle(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, uint32_t dir, void *data) { - // initialise parameters - dma->Instance = dma_descr->instance; - dma->Init = *dma_descr->init; - dma->Init.Direction = dir; - dma->Init.Channel = dma_descr->sub_instance; - // half of __HAL_LINKDMA(data, xxx, *dma) - // caller must implement other half by doing: data->xxx = dma - dma->Parent = data; -} - -void dma_init(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, uint32_t dir, void *data){ - // Some drivers allocate the DMA_HandleTypeDef from the stack - // (i.e. dac, i2c, spi) and for those cases we need to clear the - // structure so we don't get random values from the stack) - memset(dma, 0, sizeof(*dma)); - - if (dma_descr != NULL) { - dma_id_t dma_id = dma_descr->id; - - dma_init_handle(dma, dma_descr, dir, data); - // set global pointer for IRQ handler - dma_handle[dma_id] = dma; - - dma_enable_clock(dma_id); - - // if this stream was previously configured for this channel/request and direction then we - // can skip most of the initialisation - uint8_t sub_inst = DMA_SUB_INSTANCE_AS_UINT8(dma_descr->sub_instance) | (dir == DMA_PERIPH_TO_MEMORY) << 7; - if (dma_last_sub_instance[dma_id] != sub_inst) { - dma_last_sub_instance[dma_id] = sub_inst; - - // reset and configure DMA peripheral - // (dma->State is set to HAL_DMA_STATE_RESET by memset above) - HAL_DMA_DeInit(dma); - HAL_DMA_Init(dma); - svc_setpriority(IRQn_NONNEG(dma_irqn[dma_id]), IRQ_PRI_DMA); - } else { - // only necessary initialization - dma->State = HAL_DMA_STATE_READY; - // calculate DMA base address and bitshift to be used in IRQ handler - extern uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma); - DMA_CalcBaseAndBitshift(dma); - } - - svc_enableIRQ(dma_irqn[dma_id]); - } -} - -void dma_deinit(const dma_descr_t *dma_descr) { - if (dma_descr != NULL) { - svc_disableIRQ(dma_irqn[dma_descr->id]); - dma_handle[dma_descr->id] = NULL; - - dma_disable_clock(dma_descr->id); - } -} - -void dma_invalidate_channel(const dma_descr_t *dma_descr) { - if (dma_descr != NULL) { - dma_id_t dma_id = dma_descr->id; - // Only compare the sub-instance, not the direction bit (MSB) - if ((dma_last_sub_instance[dma_id] & 0x7f) == DMA_SUB_INSTANCE_AS_UINT8(dma_descr->sub_instance) ) { - dma_last_sub_instance[dma_id] = DMA_INVALID_CHANNEL; - } - } -} -// Called from the SysTick handler -// We use LSB of tick to select which controller to process -static void dma_idle_handler(uint32_t tick) { - if (!DMA_IDLE_ENABLED() || !DMA_IDLE_TICK(tick)) { - return; - } - - static const uint32_t controller_mask[] = { - DMA1_ENABLE_MASK, - #if defined(DMA2) - DMA2_ENABLE_MASK, - #endif - }; - { - int controller = (tick >> DMA_SYSTICK_LOG2) & 1; - if (dma_idle.counter[controller] == 0) { - return; - } - if (++dma_idle.counter[controller] > DMA_IDLE_TICK_MAX) { - if ((dma_enable_mask & controller_mask[controller]) == 0) { - // Nothing is active and we've reached our idle timeout, - // Now we'll really disable the clock. - dma_idle.counter[controller] = 0; - if (controller == 0) { - __HAL_RCC_DMA1_CLK_DISABLE(); - } - #if defined(DMA2) - else { - __HAL_RCC_DMA2_CLK_DISABLE(); - } - #endif - } else { - // Something is still active, but the counter never got - // reset, so we'll reset the counter here. - dma_idle.counter[controller] = 1; - } - } - } -} diff --git a/core/embed/trezorhal/stm32f4/dma.h b/core/embed/trezorhal/stm32f4/dma.h deleted file mode 100644 index a1a5883c4..000000000 --- a/core/embed/trezorhal/stm32f4/dma.h +++ /dev/null @@ -1,46 +0,0 @@ -// clang-format off - -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2015 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_STM32_DMA_H -#define MICROPY_INCLUDED_STM32_DMA_H - -#include STM32_HAL_H - -typedef struct _dma_descr_t dma_descr_t; - -extern const dma_descr_t dma_SDIO_0; - -void dma_init(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, uint32_t dir, void *data); -void dma_init_handle(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, uint32_t dir, void *data); -void dma_deinit(const dma_descr_t *dma_descr); -void dma_invalidate_channel(const dma_descr_t *dma_descr); - -void dma_nohal_init(const dma_descr_t *descr, uint32_t config); -void dma_nohal_deinit(const dma_descr_t *descr); -void dma_nohal_start(const dma_descr_t *descr, uint32_t src_addr, uint32_t dst_addr, uint16_t len); - -#endif // MICROPY_INCLUDED_STM32_DMA_H diff --git a/core/embed/trezorhal/stm32f4/sdcard.c b/core/embed/trezorhal/stm32f4/sdcard.c index 6b298f7b6..a3a242b4d 100644 --- a/core/embed/trezorhal/stm32f4/sdcard.c +++ b/core/embed/trezorhal/stm32f4/sdcard.c @@ -47,7 +47,6 @@ #include -#include "dma.h" #include "irq.h" #include "sdcard-set_clr_card_detect.h" #include "sdcard.h" @@ -56,9 +55,17 @@ #define SDMMC_CLK_ENABLE() __HAL_RCC_SDMMC1_CLK_ENABLE() #define SDMMC_CLK_DISABLE() __HAL_RCC_SDMMC1_CLK_DISABLE() #define SDMMC_IRQn SDMMC1_IRQn -#define SDMMC_DMA dma_SDIO_0 -static SD_HandleTypeDef sd_handle; +static SD_HandleTypeDef sd_handle = {0}; +static DMA_HandleTypeDef sd_dma = {0}; + +void DMA2_Stream3_IRQHandler(void) { + IRQ_ENTER(DMA2_Stream3_IRQn); + + HAL_DMA_IRQHandler(&sd_dma); + + IRQ_EXIT(DMA2_Stream3_IRQn); +} static inline void sdcard_default_pin_state(void) { HAL_GPIO_WritePin(GPIOC, GPIO_PIN_0, GPIO_PIN_SET); // SD_ON/PC0 @@ -114,7 +121,10 @@ static inline void sdcard_active_pin_state(void) { HAL_GPIO_Init(GPIOD, &GPIO_InitStructure); } -void sdcard_init(void) { sdcard_default_pin_state(); } +void sdcard_init(void) { + sdcard_default_pin_state(); + __HAL_RCC_DMA2_CLK_ENABLE(); +} void HAL_SD_MspInit(SD_HandleTypeDef *hsd) { if (hsd->Instance == sd_handle.Instance) { @@ -283,8 +293,23 @@ secbool sdcard_read_blocks(uint32_t *dest, uint32_t block_num, // we must disable USB irqs to prevent MSC contention with SD card uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); - DMA_HandleTypeDef sd_dma; - dma_init(&sd_dma, &SDMMC_DMA, DMA_PERIPH_TO_MEMORY, &sd_handle); + sd_dma.Instance = DMA2_Stream3; + sd_dma.State = HAL_DMA_STATE_RESET; + sd_dma.Init.Channel = DMA_CHANNEL_4; + sd_dma.Init.Direction = DMA_PERIPH_TO_MEMORY; + sd_dma.Init.FIFOMode = DMA_FIFOMODE_ENABLE; + sd_dma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; + sd_dma.Init.MemBurst = DMA_MBURST_INC4; + sd_dma.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; + sd_dma.Init.MemInc = DMA_MINC_ENABLE; + sd_dma.Init.Mode = DMA_PFCTRL; + sd_dma.Init.PeriphBurst = DMA_PBURST_INC4; + sd_dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; + sd_dma.Init.PeriphInc = DMA_PINC_DISABLE; + sd_dma.Init.Priority = DMA_PRIORITY_VERY_HIGH; + sd_dma.Parent = &sd_handle; + HAL_DMA_Init(&sd_dma); + sd_handle.hdmarx = &sd_dma; // we need to assign hdmatx even though it's unused @@ -295,6 +320,8 @@ secbool sdcard_read_blocks(uint32_t *dest, uint32_t block_num, memset(&dummy_dma, 0, sizeof(dummy_dma)); sd_handle.hdmatx = &dummy_dma; + svc_enableIRQ(DMA2_Stream3_IRQn); + sdcard_reset_periph(); err = HAL_SD_ReadBlocks_DMA(&sd_handle, (uint8_t *)dest, block_num, num_blocks); @@ -302,7 +329,8 @@ secbool sdcard_read_blocks(uint32_t *dest, uint32_t block_num, err = sdcard_wait_finished(&sd_handle, 5000); } - dma_deinit(&SDMMC_DMA); + svc_disableIRQ(DMA2_Stream3_IRQn); + HAL_DMA_DeInit(&sd_dma); sd_handle.hdmarx = NULL; restore_irq_pri(basepri); @@ -327,8 +355,23 @@ secbool sdcard_write_blocks(const uint32_t *src, uint32_t block_num, // we must disable USB irqs to prevent MSC contention with SD card uint32_t basepri = raise_irq_pri(IRQ_PRI_OTG_FS); - DMA_HandleTypeDef sd_dma; - dma_init(&sd_dma, &SDMMC_DMA, DMA_MEMORY_TO_PERIPH, &sd_handle); + sd_dma.Instance = DMA2_Stream3; + sd_dma.State = HAL_DMA_STATE_RESET; + sd_dma.Init.Channel = DMA_CHANNEL_4; + sd_dma.Init.Direction = DMA_MEMORY_TO_PERIPH; + sd_dma.Init.FIFOMode = DMA_FIFOMODE_ENABLE; + sd_dma.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; + sd_dma.Init.MemBurst = DMA_MBURST_INC4; + sd_dma.Init.MemDataAlignment = DMA_MDATAALIGN_WORD; + sd_dma.Init.MemInc = DMA_MINC_ENABLE; + sd_dma.Init.Mode = DMA_PFCTRL; + sd_dma.Init.PeriphBurst = DMA_PBURST_INC4; + sd_dma.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD; + sd_dma.Init.PeriphInc = DMA_PINC_DISABLE; + sd_dma.Init.Priority = DMA_PRIORITY_VERY_HIGH; + sd_dma.Parent = &sd_handle; + HAL_DMA_Init(&sd_dma); + sd_handle.hdmatx = &sd_dma; // we need to assign hdmarx even though it's unused @@ -339,6 +382,8 @@ secbool sdcard_write_blocks(const uint32_t *src, uint32_t block_num, memset(&dummy_dma, 0, sizeof(dummy_dma)); sd_handle.hdmarx = &dummy_dma; + svc_enableIRQ(DMA2_Stream3_IRQn); + sdcard_reset_periph(); err = HAL_SD_WriteBlocks_DMA(&sd_handle, (uint8_t *)src, block_num, num_blocks); @@ -346,7 +391,8 @@ secbool sdcard_write_blocks(const uint32_t *src, uint32_t block_num, err = sdcard_wait_finished(&sd_handle, 5000); } - dma_deinit(&SDMMC_DMA); + svc_disableIRQ(DMA2_Stream3_IRQn); + HAL_DMA_DeInit(&sd_dma); sd_handle.hdmatx = NULL; restore_irq_pri(basepri); diff --git a/core/embed/trezorhal/stm32f4/systick.c b/core/embed/trezorhal/stm32f4/systick.c index f4d56c62c..5afa8a5bf 100644 --- a/core/embed/trezorhal/stm32f4/systick.c +++ b/core/embed/trezorhal/stm32f4/systick.c @@ -56,8 +56,6 @@ extern __IO uint32_t uwTick; -systick_dispatch_t systick_dispatch_table[SYSTICK_DISPATCH_NUM_SLOTS]; - void SysTick_Handler(void) { SEGGER_SYSVIEW_RecordEnterISR(); // this is a millisecond tick counter that wraps after approximately @@ -67,9 +65,6 @@ void SysTick_Handler(void) { #ifdef RDI rdi_handler(uw_tick); #endif - systick_dispatch_t f = systick_dispatch_table[uw_tick & (SYSTICK_DISPATCH_NUM_SLOTS - 1)]; - if (f != NULL) { - f(uw_tick); - } + SEGGER_SYSVIEW_RecordExitISR(); } diff --git a/core/embed/trezorhal/stm32f4/systick.h b/core/embed/trezorhal/stm32f4/systick.h index 99421ff21..7c94a91a3 100644 --- a/core/embed/trezorhal/stm32f4/systick.h +++ b/core/embed/trezorhal/stm32f4/systick.h @@ -34,23 +34,4 @@ // Works for x between 0 and 16 inclusive #define POW2_CEIL(x) ((((x) - 1) | ((x) - 1) >> 1 | ((x) - 1) >> 2 | ((x) - 1) >> 3) + 1) -enum { - SYSTICK_DISPATCH_DMA = 0, - SYSTICK_DISPATCH_MAX -}; - -#define SYSTICK_DISPATCH_NUM_SLOTS POW2_CEIL(SYSTICK_DISPATCH_MAX) - -typedef void (*systick_dispatch_t)(uint32_t); - -extern systick_dispatch_t systick_dispatch_table[SYSTICK_DISPATCH_NUM_SLOTS]; - -static inline void systick_enable_dispatch(size_t slot, systick_dispatch_t f) { - systick_dispatch_table[slot] = f; -} - -static inline void systick_disable_dispatch(size_t slot) { - systick_dispatch_table[slot] = NULL; -} - #endif // MICROPY_INCLUDED_STM32_SYSTICK_H diff --git a/core/site_scons/boards/trezor_r_v10.py b/core/site_scons/boards/trezor_r_v10.py index fa704d94b..b5e2b6f96 100644 --- a/core/site_scons/boards/trezor_r_v10.py +++ b/core/site_scons/boards/trezor_r_v10.py @@ -53,8 +53,6 @@ def configure( sources += [ "vendor/micropython/lib/stm32lib/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c" ] - sources += ["embed/trezorhal/stm32f4/dma.c"] - if "usb" in features_wanted: sources += [ "embed/trezorhal/stm32f4/usb.c", diff --git a/core/site_scons/boards/trezor_t.py b/core/site_scons/boards/trezor_t.py index 2de5975f3..1bf39befb 100644 --- a/core/site_scons/boards/trezor_t.py +++ b/core/site_scons/boards/trezor_t.py @@ -67,7 +67,6 @@ def configure( sources += [ "vendor/micropython/lib/stm32lib/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c" ] - sources += ["embed/trezorhal/stm32f4/dma.c"] features_available.append("sd_card") if "sbu" in features_wanted: