2017-09-10 19:23:47 +00:00
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.syntax unified
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// Reference:
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// Table 61 - STM32F405 Reference manual (RM0090)
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// Section B1.5 - ARMv7-M Architecture Reference Manual
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.section .vector_table, "a"
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vector_table:
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.word main_stack_base // defined in linker script
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.word reset_handler
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.word NMI_Handler
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.word HardFault_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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.word WWDG_IRQHandler
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.word PVD_IRQHandler
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.word TAMP_STAMP_IRQHandler
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.word RTC_WKUP_IRQHandler
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.word FLASH_IRQHandler
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.word RCC_IRQHandler
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.word EXTI0_IRQHandler
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.word EXTI1_IRQHandler
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.word EXTI2_IRQHandler
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.word EXTI3_IRQHandler
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.word EXTI4_IRQHandler
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.word DMA1_Stream0_IRQHandler
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.word DMA1_Stream1_IRQHandler
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.word DMA1_Stream2_IRQHandler
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.word DMA1_Stream3_IRQHandler
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.word DMA1_Stream4_IRQHandler
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.word DMA1_Stream5_IRQHandler
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.word DMA1_Stream6_IRQHandler
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.word ADC_IRQHandler
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.word CAN1_TX_IRQHandler
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.word CAN1_RX0_IRQHandler
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.word CAN1_RX1_IRQHandler
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.word CAN1_SCE_IRQHandler
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.word EXTI9_5_IRQHandler
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.word TIM1_BRK_TIM9_IRQHandler
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.word TIM1_UP_TIM10_IRQHandler
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.word TIM1_TRG_COM_TIM11_IRQHandler
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.word TIM1_CC_IRQHandler
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.word TIM2_IRQHandler
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.word TIM3_IRQHandler
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.word TIM4_IRQHandler
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.word I2C1_EV_IRQHandler
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.word I2C1_ER_IRQHandler
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.word I2C2_EV_IRQHandler
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.word I2C2_ER_IRQHandler
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.word SPI1_IRQHandler
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.word SPI2_IRQHandler
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.word USART1_IRQHandler
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.word USART2_IRQHandler
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.word USART3_IRQHandler
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.word EXTI15_10_IRQHandler
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.word RTC_Alarm_IRQHandler
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.word OTG_FS_WKUP_IRQHandler
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.word TIM8_BRK_TIM12_IRQHandler
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.word TIM8_UP_TIM13_IRQHandler
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.word TIM8_TRG_COM_TIM14_IRQHandler
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.word TIM8_CC_IRQHandler
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.word DMA1_Stream7_IRQHandler
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.word FSMC_IRQHandler
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.word SDIO_IRQHandler
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.word TIM5_IRQHandler
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.word SPI3_IRQHandler
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.word UART4_IRQHandler
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.word UART5_IRQHandler
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.word TIM6_DAC_IRQHandler
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.word TIM7_IRQHandler
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.word DMA2_Stream0_IRQHandler
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.word DMA2_Stream1_IRQHandler
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.word DMA2_Stream2_IRQHandler
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.word DMA2_Stream3_IRQHandler
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.word DMA2_Stream4_IRQHandler
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.word ETH_IRQHandler
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.word ETH_WKUP_IRQHandler
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.word CAN2_TX_IRQHandler
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.word CAN2_RX0_IRQHandler
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.word CAN2_RX1_IRQHandler
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.word CAN2_SCE_IRQHandler
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.word OTG_FS_IRQHandler
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.word DMA2_Stream5_IRQHandler
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.word DMA2_Stream6_IRQHandler
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.word DMA2_Stream7_IRQHandler
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.word USART6_IRQHandler
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.word I2C3_EV_IRQHandler
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.word I2C3_ER_IRQHandler
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.word OTG_HS_EP1_OUT_IRQHandler
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.word OTG_HS_EP1_IN_IRQHandler
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.word OTG_HS_WKUP_IRQHandler
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.word OTG_HS_IRQHandler
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.word DCMI_IRQHandler
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.word 0
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.word HASH_RNG_IRQHandler
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.word FPU_IRQHandler
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.weak NMI_Handler
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.thumb_set NMI_Handler, default_handler
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.weak HardFault_Handler
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.thumb_set HardFault_Handler, default_handler
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.weak MemManage_Handler
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.thumb_set MemManage_Handler, default_handler
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.weak BusFault_Handler
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.thumb_set BusFault_Handler, default_handler
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.weak UsageFault_Handler
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.thumb_set UsageFault_Handler, default_handler
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.weak SVC_Handler
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.thumb_set SVC_Handler, default_handler
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.weak DebugMon_Handler
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.thumb_set DebugMon_Handler, default_handler
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.weak PendSV_Handler
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.thumb_set PendSV_Handler, default_handler
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.weak SysTick_Handler
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.thumb_set SysTick_Handler, default_handler
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.weak WWDG_IRQHandler
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.thumb_set WWDG_IRQHandler, default_handler
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.weak PVD_IRQHandler
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.thumb_set PVD_IRQHandler, default_handler
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.weak TAMP_STAMP_IRQHandler
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.thumb_set TAMP_STAMP_IRQHandler, default_handler
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.weak RTC_WKUP_IRQHandler
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.thumb_set RTC_WKUP_IRQHandler, default_handler
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.weak FLASH_IRQHandler
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.thumb_set FLASH_IRQHandler, default_handler
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.weak RCC_IRQHandler
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.thumb_set RCC_IRQHandler, default_handler
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.weak EXTI0_IRQHandler
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.thumb_set EXTI0_IRQHandler, default_handler
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.weak EXTI1_IRQHandler
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.thumb_set EXTI1_IRQHandler, default_handler
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.weak EXTI2_IRQHandler
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.thumb_set EXTI2_IRQHandler, default_handler
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.weak EXTI3_IRQHandler
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.thumb_set EXTI3_IRQHandler, default_handler
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.weak EXTI4_IRQHandler
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.thumb_set EXTI4_IRQHandler, default_handler
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.weak DMA1_Stream0_IRQHandler
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.thumb_set DMA1_Stream0_IRQHandler, default_handler
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.weak DMA1_Stream1_IRQHandler
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.thumb_set DMA1_Stream1_IRQHandler, default_handler
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.weak DMA1_Stream2_IRQHandler
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.thumb_set DMA1_Stream2_IRQHandler, default_handler
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.weak DMA1_Stream3_IRQHandler
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.thumb_set DMA1_Stream3_IRQHandler, default_handler
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.weak DMA1_Stream4_IRQHandler
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.thumb_set DMA1_Stream4_IRQHandler, default_handler
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.weak DMA1_Stream5_IRQHandler
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.thumb_set DMA1_Stream5_IRQHandler, default_handler
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.weak DMA1_Stream6_IRQHandler
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.thumb_set DMA1_Stream6_IRQHandler, default_handler
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.weak ADC_IRQHandler
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.thumb_set ADC_IRQHandler, default_handler
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.weak CAN1_TX_IRQHandler
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.thumb_set CAN1_TX_IRQHandler, default_handler
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.weak CAN1_RX0_IRQHandler
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.thumb_set CAN1_RX0_IRQHandler, default_handler
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.weak CAN1_RX1_IRQHandler
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.thumb_set CAN1_RX1_IRQHandler, default_handler
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.weak CAN1_SCE_IRQHandler
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.thumb_set CAN1_SCE_IRQHandler, default_handler
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.weak EXTI9_5_IRQHandler
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.thumb_set EXTI9_5_IRQHandler, default_handler
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.weak TIM1_BRK_TIM9_IRQHandler
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.thumb_set TIM1_BRK_TIM9_IRQHandler, default_handler
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.weak TIM1_UP_TIM10_IRQHandler
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.thumb_set TIM1_UP_TIM10_IRQHandler, default_handler
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.weak TIM1_TRG_COM_TIM11_IRQHandler
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.thumb_set TIM1_TRG_COM_TIM11_IRQHandler, default_handler
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.weak TIM1_CC_IRQHandler
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.thumb_set TIM1_CC_IRQHandler, default_handler
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.weak TIM2_IRQHandler
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.thumb_set TIM2_IRQHandler, default_handler
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.weak TIM3_IRQHandler
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.thumb_set TIM3_IRQHandler, default_handler
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.weak TIM4_IRQHandler
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.thumb_set TIM4_IRQHandler, default_handler
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.weak I2C1_EV_IRQHandler
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.thumb_set I2C1_EV_IRQHandler, default_handler
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.weak I2C1_ER_IRQHandler
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.thumb_set I2C1_ER_IRQHandler, default_handler
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.weak I2C2_EV_IRQHandler
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.thumb_set I2C2_EV_IRQHandler, default_handler
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.weak I2C2_ER_IRQHandler
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.thumb_set I2C2_ER_IRQHandler, default_handler
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.weak SPI1_IRQHandler
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.thumb_set SPI1_IRQHandler, default_handler
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.weak SPI2_IRQHandler
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.thumb_set SPI2_IRQHandler, default_handler
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.weak USART1_IRQHandler
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.thumb_set USART1_IRQHandler, default_handler
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.weak USART2_IRQHandler
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.thumb_set USART2_IRQHandler, default_handler
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.weak USART3_IRQHandler
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.thumb_set USART3_IRQHandler, default_handler
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.weak EXTI15_10_IRQHandler
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.thumb_set EXTI15_10_IRQHandler, default_handler
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.weak RTC_Alarm_IRQHandler
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.thumb_set RTC_Alarm_IRQHandler, default_handler
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.weak OTG_FS_WKUP_IRQHandler
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.thumb_set OTG_FS_WKUP_IRQHandler, default_handler
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.weak TIM8_BRK_TIM12_IRQHandler
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.thumb_set TIM8_BRK_TIM12_IRQHandler, default_handler
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.weak TIM8_UP_TIM13_IRQHandler
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.thumb_set TIM8_UP_TIM13_IRQHandler, default_handler
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.weak TIM8_TRG_COM_TIM14_IRQHandler
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.thumb_set TIM8_TRG_COM_TIM14_IRQHandler, default_handler
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.weak TIM8_CC_IRQHandler
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.thumb_set TIM8_CC_IRQHandler, default_handler
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.weak DMA1_Stream7_IRQHandler
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.thumb_set DMA1_Stream7_IRQHandler, default_handler
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.weak FSMC_IRQHandler
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.thumb_set FSMC_IRQHandler, default_handler
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.weak SDIO_IRQHandler
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.thumb_set SDIO_IRQHandler, default_handler
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.weak TIM5_IRQHandler
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.thumb_set TIM5_IRQHandler, default_handler
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.weak SPI3_IRQHandler
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.thumb_set SPI3_IRQHandler, default_handler
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.weak UART4_IRQHandler
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.thumb_set UART4_IRQHandler, default_handler
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.weak UART5_IRQHandler
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.thumb_set UART5_IRQHandler, default_handler
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.weak TIM6_DAC_IRQHandler
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.thumb_set TIM6_DAC_IRQHandler, default_handler
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.weak TIM7_IRQHandler
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.thumb_set TIM7_IRQHandler, default_handler
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.weak DMA2_Stream0_IRQHandler
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.thumb_set DMA2_Stream0_IRQHandler, default_handler
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.weak DMA2_Stream1_IRQHandler
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.thumb_set DMA2_Stream1_IRQHandler, default_handler
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.weak DMA2_Stream2_IRQHandler
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.thumb_set DMA2_Stream2_IRQHandler, default_handler
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.weak DMA2_Stream3_IRQHandler
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.thumb_set DMA2_Stream3_IRQHandler, default_handler
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.weak DMA2_Stream4_IRQHandler
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.thumb_set DMA2_Stream4_IRQHandler, default_handler
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.weak ETH_IRQHandler
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.thumb_set ETH_IRQHandler, default_handler
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.weak ETH_WKUP_IRQHandler
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.thumb_set ETH_WKUP_IRQHandler, default_handler
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.weak CAN2_TX_IRQHandler
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.thumb_set CAN2_TX_IRQHandler, default_handler
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.weak CAN2_RX0_IRQHandler
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.thumb_set CAN2_RX0_IRQHandler, default_handler
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.weak CAN2_RX1_IRQHandler
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.thumb_set CAN2_RX1_IRQHandler, default_handler
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.weak CAN2_SCE_IRQHandler
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.thumb_set CAN2_SCE_IRQHandler, default_handler
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.weak OTG_FS_IRQHandler
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.thumb_set OTG_FS_IRQHandler, default_handler
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.weak DMA2_Stream5_IRQHandler
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.thumb_set DMA2_Stream5_IRQHandler, default_handler
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.weak DMA2_Stream6_IRQHandler
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.thumb_set DMA2_Stream6_IRQHandler, default_handler
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.weak DMA2_Stream7_IRQHandler
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.thumb_set DMA2_Stream7_IRQHandler, default_handler
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.weak USART6_IRQHandler
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.thumb_set USART6_IRQHandler, default_handler
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.weak I2C3_EV_IRQHandler
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.thumb_set I2C3_EV_IRQHandler, default_handler
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.weak I2C3_ER_IRQHandler
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.thumb_set I2C3_ER_IRQHandler, default_handler
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.weak OTG_HS_EP1_OUT_IRQHandler
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.thumb_set OTG_HS_EP1_OUT_IRQHandler, default_handler
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.weak OTG_HS_EP1_IN_IRQHandler
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.thumb_set OTG_HS_EP1_IN_IRQHandler, default_handler
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.weak OTG_HS_WKUP_IRQHandler
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.thumb_set OTG_HS_WKUP_IRQHandler, default_handler
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.weak OTG_HS_IRQHandler
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.thumb_set OTG_HS_IRQHandler, default_handler
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.weak DCMI_IRQHandler
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.thumb_set DCMI_IRQHandler, default_handler
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.weak HASH_RNG_IRQHandler
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.thumb_set HASH_RNG_IRQHandler, default_handler
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.weak FPU_IRQHandler
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.thumb_set FPU_IRQHandler, default_handler
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.text
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.global memset_reg
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.type memset_reg, STT_FUNC
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memset_reg:
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// call with the following (note that the arguments are not validated prior to use):
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// r0 - address of first word to write (inclusive)
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// r1 - address of first word following the address in r0 to NOT write (exclusive)
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// r2 - word value to be written
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// both addresses in r0 and r1 needs to be divisible by 4!
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.L_loop_begin:
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str r2, [r0], 4 // store the word in r2 to the address in r0, post-indexed
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cmp r0, r1
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bne .L_loop_begin
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bx lr
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.global reset_handler
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.type reset_handler, STT_FUNC
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reset_handler:
|
2017-10-06 09:09:22 +00:00
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|
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bl SystemInit
|
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|
2017-10-06 09:11:43 +00:00
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|
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// read the first rng data and save it
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ldr r0, =0 // r0 - previous value
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ldr r1, =0 // r1 - whether to compare the previous value
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bl rng_read
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// read the next rng data and make sure it is different than previous
|
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// r0 - value returned from previous call
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ldr r1, =1 // r1 - whether to compare the previous value
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|
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bl rng_read
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|
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mov r4, r0 // save TRNG output in r4
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|
|
2017-09-10 19:23:47 +00:00
|
|
|
// wipe memory to remove any possible vestiges of sensitive data
|
2017-10-06 09:11:43 +00:00
|
|
|
// use unpredictable value as a defense against side-channels
|
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|
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ldr r0, =ccmram_start // r0 - point to beginning of CCMRAM
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ldr r1, =ccmram_end // r1 - point to byte after the end of CCMRAM
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mov r2, r4 // r2 - the word-sized value to be written
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|
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bl memset_reg
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ldr r0, =sram_start // r0 - point to beginning of SRAM
|
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ldr r1, =sram_end // r1 - point to byte after the end of SRAM
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|
mov r2, r4 // r2 - the word-sized value to be written
|
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|
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bl memset_reg
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|
|
// setup environment for subsequent stage of code
|
2017-09-10 19:23:47 +00:00
|
|
|
ldr r0, =ccmram_start // r0 - point to beginning of CCMRAM
|
|
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ldr r1, =ccmram_end // r1 - point to byte after the end of CCMRAM
|
|
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|
|
ldr r2, =0 // r2 - the word-sized value to be written
|
|
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|
|
bl memset_reg
|
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ldr r0, =sram_start // r0 - point to beginning of SRAM
|
|
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|
ldr r1, =sram_end // r1 - point to byte after the end of SRAM
|
|
|
|
|
ldr r2, =0 // r2 - the word-sized value to be written
|
|
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|
|
bl memset_reg
|
|
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|
|
// copy data in from flash
|
|
|
|
|
ldr r0, =data_vma // dst addr
|
|
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|
|
ldr r1, =data_lma // src addr
|
|
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|
|
ldr r2, =data_size // size in bytes
|
|
|
|
|
bl memcpy
|
|
|
|
|
|
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|
|
|
// enter the application code
|
|
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|
|
bl main
|
|
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|
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|
|
|
// loop forever if the application code returns
|
|
|
|
|
b .
|
|
|
|
|
|
|
|
|
|
.type default_handler, STT_FUNC
|
|
|
|
|
default_handler:
|
|
|
|
|
b . // loop forever
|
|
|
|
|
|
|
|
|
|
.end
|
