From 148226b9224bc84af38ee009c84d756e23271081 Mon Sep 17 00:00:00 2001 From: fuzhli Date: Mon, 5 Jan 2015 15:32:59 +0800 Subject: [PATCH 1/2] correct the CS:IP presentation for reset vector in 80386 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit I think the author may need introduce the Intel processor's segment register change from 16-bit processor to 32-bit processor. In 16-bit processor, the CS register's value is the (segment offset)/16; while in the 32-bit processor, the CS register is still a 16-bit register, but its value is just a index of the GDT. In 32-bit mode, I think we can use 0xf000:0xfff0 to present the reset vector because the CS's value is 0xf000 and IP's value is 0xfff0. To keep with the 16-bit processor's presentation, we can also use the 0x0ffff000:0xfff0, because the CS segment offset is 0xffff000 and we can calculate the segment's selector by (0xffff0000)/16. In http://en.wikipedia.org/wiki/Reset_vector , it said that "The reset vector for the 80386 and later x86 processors is physical linear address FFFFFFF0h. The value of the selector portion of the CS register at reset is F000h, the value of the base portion of the CS register is FFFF0000h, and the value of the IP register at reset is FFF0h to form the segmented address FFFFF000h:FFF0h in real mode.", so it should be 0xffff000:0xfff0. I also check the <>, in section 9.1.4 "First Instruction Excuted", it said that "The first time the CS register is loaded with a new value after a hardware reset, the processor will follow the normal rule for address translation in real-address mode (that is, [CS base address = CS segment selector * 16]).". So in real mode, the CS base is 0xffff0000, the CS segment selector should be treated as (CS base)/16, which is 0x0ffff000. --- linux-bootstrap-1.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/linux-bootstrap-1.md b/linux-bootstrap-1.md index b0be876..61a80c5 100644 --- a/linux-bootstrap-1.md +++ b/linux-bootstrap-1.md @@ -61,13 +61,13 @@ Ok, now we know about real mode and memory addressing, let's get back to registe `CS` register has two parts: the visible segment selector and hidden base address. We know predefined `CS` base and `IP` value, so our logical address will be: ``` -0xffff0000:0xfff0 +0x0ffff000:0xfff0 ``` which we can translate to the physical address: ```python ->>> hex((0xffff000 << 4) + 0xfff0) +>>> hex((0x0ffff000 << 4) + 0xfff0) '0xfffffff0' ``` From 2ac540827bbf1301e871afdd58bcf77237f066db Mon Sep 17 00:00:00 2001 From: Alex Fu Date: Mon, 5 Jan 2015 17:03:24 +0800 Subject: [PATCH 2/2] add myself to contributors.md --- contributors.md | 1 + 1 file changed, 1 insertion(+) diff --git a/contributors.md b/contributors.md index 1b1d484..f2d3d9d 100644 --- a/contributors.md +++ b/contributors.md @@ -8,3 +8,4 @@ Thank you to all contributors: * [Chris Costes](https://github.com/ccostes) * [nathansoz](https://github.com/nathansoz) * [RubanDeventhiran](https://github.com/RubanDeventhiran) +* [fuzhli](https://github.com/fuzhli)