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mm/fixmaps: read_cr3() was splited on __read_cr3() and read_cr3_pa()
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@ -317,7 +317,7 @@ static unsigned long slot_virt[FIX_BTMAPS_SLOTS] __initdata;
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```C
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static inline pmd_t * __init early_ioremap_pmd(unsigned long addr)
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{
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pgd_t *base = __va(read_cr3());
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pgd_t *base = __va(read_cr3_pa());
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pgd_t *pgd = &base[pgd_index(addr)];
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pud_t *pud = pud_offset(pgd, addr);
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pmd_t *pmd = pmd_offset(pud, addr);
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@ -477,7 +477,7 @@ static inline void __flush_tlb_one(unsigned long addr)
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The `__flush_tlb_one` function invalidates the given address in the [TLB](http://en.wikipedia.org/wiki/Translation_lookaside_buffer). As you just saw we updated the paging structure, but `TLB` is not informed of the changes, that's why we need to do it manually. There are two ways to do it. The first is to update the `cr3` control register and the `__flush_tlb` function does this:
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```C
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native_write_cr3(native_read_cr3());
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native_write_cr3(__native_read_cr3());
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```
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The second method is to use the `invlpg` instruction to invalidate the `TLB` entry. Let's look at the `__flush_tlb_one` implementation. As you can see, first of all the function checks `cpu_has_invlpg` which is defined as:
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