| .. |
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amp_a0.cl
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amp_a1.cl
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amp_a3.cl
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inc_cipher_aes-gcm.cl
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inc_cipher_aes-gcm.h
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inc_cipher_aes.cl
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inc_cipher_aes.h
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inc_cipher_camellia.cl
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inc_cipher_camellia.h
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inc_cipher_des.cl
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inc_cipher_des.h
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inc_cipher_kuznyechik.cl
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inc_cipher_kuznyechik.h
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inc_cipher_rc4.cl
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inc_cipher_rc4.h
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inc_cipher_serpent.cl
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inc_cipher_serpent.h
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inc_cipher_twofish.cl
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inc_cipher_twofish.h
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inc_common.cl
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inc_common.h
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inc_comp_multi_bs.cl
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inc_comp_multi_bs.h
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inc_comp_multi.cl
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inc_comp_multi.h
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inc_comp_single_bs.cl
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inc_comp_single_bs.h
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inc_comp_single.cl
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inc_comp_single.h
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inc_diskcryptor_xts.cl
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inc_diskcryptor_xts.h
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inc_ecc_secp256k1.cl
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AMD GPUs: On Apple OpenCL platform, we ask for the preferred kernel thread size rather than hard-coding 32
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2021-07-27 09:37:31 +02:00 |
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inc_ecc_secp256k1.h
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inc_hash_blake2b.cl
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inc_hash_blake2b.h
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inc_hash_md4.cl
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inc_hash_md4.h
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Revert adding make_u32x() for constants to crypto primitives, fails on OpenCL
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2021-07-20 10:34:34 +02:00 |
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inc_hash_md5.cl
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inc_hash_md5.h
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Revert adding make_u32x() for constants to crypto primitives, fails on OpenCL
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2021-07-20 10:34:34 +02:00 |
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inc_hash_ripemd160.cl
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inc_hash_ripemd160.h
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Revert adding make_u32x() for constants to crypto primitives, fails on OpenCL
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2021-07-20 10:34:34 +02:00 |
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inc_hash_sha1.cl
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inc_hash_sha1.h
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Revert adding make_u32x() for constants to crypto primitives, fails on OpenCL
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2021-07-20 10:34:34 +02:00 |
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inc_hash_sha224.cl
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inc_hash_sha224.h
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inc_hash_sha256.cl
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inc_hash_sha256.h
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inc_hash_sha384.cl
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Fixed datatype in function sha384_hmac_init_vector_128() that could come into effect if vector datatype was manually set
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2021-07-19 15:58:38 +02:00 |
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inc_hash_sha384.h
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Revert adding make_u32x() for constants to crypto primitives, fails on OpenCL
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2021-07-20 10:34:34 +02:00 |
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inc_hash_sha512.cl
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inc_hash_sha512.h
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Revert adding make_u32x() for constants to crypto primitives, fails on OpenCL
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2021-07-20 10:34:34 +02:00 |
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inc_hash_streebog256.cl
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inc_hash_streebog256.h
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inc_hash_streebog512.cl
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inc_hash_streebog512.h
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Fix streebog512_g() in vector datatype mode
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2020-02-20 16:42:12 +01:00 |
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inc_hash_whirlpool.cl
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inc_hash_whirlpool.h
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inc_luks_aes.cl
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inc_luks_aes.h
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inc_luks_af.cl
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inc_luks_af.h
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inc_luks_essiv.cl
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inc_luks_essiv.h
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inc_luks_serpent.cl
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inc_luks_serpent.h
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inc_luks_twofish.cl
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inc_luks_twofish.h
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inc_luks_xts.cl
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inc_luks_xts.h
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inc_platform.cl
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Update module_unstable_warning() for -m 172xx on HIP
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2021-07-23 21:09:55 +02:00 |
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inc_platform.h
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Switch HIP vector datatypes to OpenCL like ext_vector_type()
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2021-07-19 20:24:30 +02:00 |
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inc_rp_optimized.cl
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Add new rule function '3' to switch the case of the first letter after occurrence N of char X
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2021-08-01 00:04:10 +02:00 |
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inc_rp_optimized.h
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Add new rule function '3' to switch the case of the first letter after occurrence N of char X
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2021-08-01 00:04:10 +02:00 |
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inc_rp.cl
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Add new rule function '3' to switch the case of the first letter after occurrence N of char X
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2021-08-01 00:04:10 +02:00 |
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inc_rp.h
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Add new rule function '3' to switch the case of the first letter after occurrence N of char X
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2021-08-01 00:04:10 +02:00 |
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inc_scalar.cl
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inc_scalar.h
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inc_simd.cl
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inc_simd.h
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Fixed false negative in all VeraCrypt hash-modes if both conditions are met: 1. use CPU for cracking and 2. PIM range was used
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2021-07-20 11:31:31 +02:00 |
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inc_truecrypt_crc32.cl
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inc_truecrypt_crc32.h
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inc_truecrypt_keyfile.cl
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inc_truecrypt_keyfile.h
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inc_truecrypt_xts.cl
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inc_truecrypt_xts.h
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inc_types.h
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Add missing u64 vector datatypes mapping for OpenCL
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2021-07-27 09:54:15 +02:00 |
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inc_vendor.h
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Update module_unstable_warning() for -m 172xx on HIP
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2021-07-23 21:09:55 +02:00 |
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inc_veracrypt_keyfile.cl
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inc_veracrypt_keyfile.h
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inc_veracrypt_xts.cl
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inc_veracrypt_xts.h
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inc_zip_inflate.cl
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Add missing u64 vector datatypes mapping for OpenCL
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2021-07-27 09:54:15 +02:00 |
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m00000_a0-optimized.cl
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m00000_a0-pure.cl
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m00000_a1-optimized.cl
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m00000_a1-pure.cl
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m00000_a3-optimized.cl
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m00000_a3-pure.cl
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m00010_a0-optimized.cl
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m00010_a0-pure.cl
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m00010_a1-optimized.cl
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m00010_a1-pure.cl
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m00010_a3-optimized.cl
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m00010_a3-pure.cl
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m00020_a0-optimized.cl
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m00020_a0-pure.cl
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m00020_a1-optimized.cl
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m00020_a1-pure.cl
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m00020_a3-optimized.cl
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m00020_a3-pure.cl
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m00030_a0-optimized.cl
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m00030_a0-pure.cl
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m00030_a1-optimized.cl
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m00030_a1-pure.cl
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m00030_a3-optimized.cl
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m00030_a3-pure.cl
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m00040_a0-optimized.cl
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m00040_a0-pure.cl
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m00040_a1-optimized.cl
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m00040_a1-pure.cl
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m00040_a3-optimized.cl
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m00040_a3-pure.cl
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m00050_a0-optimized.cl
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m00050_a0-pure.cl
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m00050_a1-optimized.cl
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m00050_a1-pure.cl
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m00050_a3-optimized.cl
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Update -a 3 kernels to make use of new parameter salt_repeat
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2021-04-22 19:42:49 +02:00 |
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m00050_a3-pure.cl
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m00060_a0-optimized.cl
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m00060_a0-pure.cl
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m00060_a1-optimized.cl
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m00060_a1-pure.cl
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m00060_a3-optimized.cl
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m00060_a3-pure.cl
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m00070_a0-optimized.cl
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m00070_a0-pure.cl
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m00070_a1-optimized.cl
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m00070_a1-pure.cl
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m00070_a3-optimized.cl
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m00070_a3-pure.cl
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m00100_a0-optimized.cl
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m00100_a0-pure.cl
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m00100_a1-optimized.cl
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m00100_a1-pure.cl
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m00100_a3-optimized.cl
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m00100_a3-pure.cl
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m00110_a0-optimized.cl
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m00110_a0-pure.cl
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m00110_a1-optimized.cl
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m00110_a1-pure.cl
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m00110_a3-optimized.cl
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m00110_a3-pure.cl
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m00120_a0-optimized.cl
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m00120_a0-pure.cl
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m00120_a1-optimized.cl
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m00120_a1-pure.cl
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m00120_a3-optimized.cl
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m00120_a3-pure.cl
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m00130_a0-optimized.cl
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m00130_a0-pure.cl
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m00130_a1-optimized.cl
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m00130_a1-pure.cl
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m00130_a3-optimized.cl
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m00130_a3-pure.cl
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m00140_a0-optimized.cl
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m00140_a0-pure.cl
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m00140_a1-optimized.cl
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m00140_a1-pure.cl
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m00140_a3-optimized.cl
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m00140_a3-pure.cl
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m00150_a0-optimized.cl
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m00150_a0-pure.cl
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m00150_a1-optimized.cl
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m00150_a1-pure.cl
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m00150_a3-optimized.cl
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m00150_a3-pure.cl
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m00160_a0-optimized.cl
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m00160_a0-pure.cl
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m00160_a1-optimized.cl
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m00160_a1-pure.cl
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m00160_a3-optimized.cl
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m00160_a3-pure.cl
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m00170_a0-optimized.cl
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m00170_a0-pure.cl
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m00170_a1-optimized.cl
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m00170_a1-pure.cl
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m00170_a3-optimized.cl
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m00170_a3-pure.cl
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m00200_a0-optimized.cl
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m00200_a1-optimized.cl
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m00200_a3-optimized.cl
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m00300_a0-optimized.cl
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m00300_a0-pure.cl
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m00300_a1-optimized.cl
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m00300_a1-pure.cl
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m00300_a3-optimized.cl
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Update -a 3 kernels to make use of new parameter salt_repeat
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2021-04-22 19:42:49 +02:00 |
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m00300_a3-pure.cl
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m00400-optimized.cl
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m00400-pure.cl
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m00500-optimized.cl
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AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
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2021-07-26 07:59:12 +02:00 |
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m00500-pure.cl
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m00600_a0-optimized.cl
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m00600_a0-pure.cl
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m00600_a1-optimized.cl
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m00600_a1-pure.cl
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m00600_a3-optimized.cl
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m00600_a3-pure.cl
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m00900_a0-optimized.cl
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m00900_a0-pure.cl
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m00900_a1-optimized.cl
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m00900_a1-pure.cl
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m00900_a3-optimized.cl
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m00900_a3-pure.cl
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m01000_a0-optimized.cl
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m01000_a0-pure.cl
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m01000_a1-optimized.cl
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m01000_a1-pure.cl
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New Attack-Mode: Association Attack. Like JtR's single mode. Very early
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2020-09-29 15:56:32 +02:00 |
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m01000_a3-optimized.cl
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m01000_a3-pure.cl
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m01100_a0-optimized.cl
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m01100_a0-pure.cl
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m01100_a1-optimized.cl
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m01100_a1-pure.cl
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m01100_a3-optimized.cl
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m01100_a3-pure.cl
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m01300_a0-optimized.cl
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m01300_a0-pure.cl
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m01300_a1-optimized.cl
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m01300_a1-pure.cl
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New Attack-Mode: Association Attack. Like JtR's single mode. Very early
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2020-09-29 15:56:32 +02:00 |
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m01300_a3-optimized.cl
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m01300_a3-pure.cl
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m01400_a0-optimized.cl
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m01400_a0-pure.cl
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m01400_a1-optimized.cl
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m01400_a1-pure.cl
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m01400_a3-optimized.cl
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m01400_a3-pure.cl
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m01410_a0-optimized.cl
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m01410_a0-pure.cl
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m01410_a1-optimized.cl
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m01410_a1-pure.cl
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m01410_a3-optimized.cl
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m01410_a3-pure.cl
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m01420_a0-optimized.cl
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m01420_a0-pure.cl
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m01420_a1-optimized.cl
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m01420_a1-pure.cl
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m01420_a3-optimized.cl
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m01420_a3-pure.cl
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m01430_a0-optimized.cl
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m01430_a0-pure.cl
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m01430_a1-optimized.cl
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m01430_a1-pure.cl
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m01430_a3-optimized.cl
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m01430_a3-pure.cl
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m01440_a0-optimized.cl
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m01440_a0-pure.cl
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m01440_a1-optimized.cl
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m01440_a1-pure.cl
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m01440_a3-optimized.cl
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m01440_a3-pure.cl
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m01450_a0-optimized.cl
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m01450_a0-pure.cl
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m01450_a1-optimized.cl
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m01450_a1-pure.cl
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m01450_a3-optimized.cl
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m01450_a3-pure.cl
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m01460_a0-optimized.cl
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m01460_a0-pure.cl
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m01460_a1-optimized.cl
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m01460_a1-pure.cl
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m01460_a3-optimized.cl
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m01460_a3-pure.cl
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New Attack-Mode: Association Attack. Like JtR's single mode. Very early
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2020-09-29 15:56:32 +02:00 |
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m01470_a0-optimized.cl
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m01470_a0-pure.cl
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m01470_a1-optimized.cl
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m01470_a1-pure.cl
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m01470_a3-optimized.cl
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m01470_a3-pure.cl
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m01500_a0-pure.cl
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m01500_a1-pure.cl
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m01500_a3-pure.cl
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AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
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2021-07-26 07:59:12 +02:00 |
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m01600-optimized.cl
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AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
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2021-07-26 07:59:12 +02:00 |
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m01600-pure.cl
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m01700_a0-optimized.cl
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m01700_a0-pure.cl
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m01700_a1-optimized.cl
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m01700_a1-pure.cl
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m01700_a3-optimized.cl
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m01700_a3-pure.cl
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m01710_a0-optimized.cl
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m01710_a0-pure.cl
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m01710_a1-optimized.cl
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m01710_a1-pure.cl
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m01710_a3-optimized.cl
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m01710_a3-pure.cl
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m01720_a0-optimized.cl
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m01720_a0-pure.cl
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m01720_a1-optimized.cl
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m01720_a3-optimized.cl
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m01720_a3-pure.cl
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m01730_a0-optimized.cl
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m01730_a0-pure.cl
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m01750_a0-optimized.cl
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m01760_a0-optimized.cl
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m01760_a0-pure.cl
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m01770_a0-optimized.cl
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m01770_a3-optimized.cl
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m01770_a3-pure.cl
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m01800-optimized.cl
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m01800-pure.cl
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m02000_a0-optimized.cl
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m02000_a0-pure.cl
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m02000_a1-optimized.cl
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m02000_a1-pure.cl
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m02000_a3-optimized.cl
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m02000_a3-pure.cl
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m02100-pure.cl
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m02400_a0-optimized.cl
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m02400_a1-optimized.cl
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m02400_a3-optimized.cl
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m02410_a0-optimized.cl
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m02410_a1-optimized.cl
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m02410_a3-optimized.cl
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m02500-pure.cl
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m02501-pure.cl
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m02610_a0-optimized.cl
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m02610_a0-pure.cl
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m02610_a1-optimized.cl
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m02610_a1-pure.cl
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m02610_a3-optimized.cl
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m02610_a3-pure.cl
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m02710_a0-optimized.cl
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m02710_a1-optimized.cl
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m02710_a3-optimized.cl
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m02810_a0-optimized.cl
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m02810_a0-pure.cl
|
New Attack-Mode: Association Attack. Like JtR's single mode. Very early
|
2020-09-29 15:56:32 +02:00 |
|
m02810_a1-optimized.cl
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m02810_a1-pure.cl
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m02810_a3-optimized.cl
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m02810_a3-pure.cl
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m03000_a0-pure.cl
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m03000_a1-pure.cl
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m03000_a3-pure.cl
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m03100_a0-optimized.cl
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m03100_a1-optimized.cl
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m03100_a3-optimized.cl
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m03200-pure.cl
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m03500_a0-optimized.cl
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m03500_a0-pure.cl
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m03500_a1-optimized.cl
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m03500_a1-pure.cl
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m03500_a3-optimized.cl
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m03500_a3-pure.cl
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m03710_a0-optimized.cl
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m03710_a0-pure.cl
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m03710_a1-pure.cl
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m03710_a3-optimized.cl
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m03710_a3-pure.cl
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m03800_a0-optimized.cl
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m03800_a0-pure.cl
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m03800_a1-optimized.cl
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m03800_a1-pure.cl
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m03800_a3-optimized.cl
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m03800_a3-pure.cl
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m03910_a0-optimized.cl
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m03910_a0-pure.cl
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m03910_a1-optimized.cl
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m03910_a1-pure.cl
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m03910_a3-optimized.cl
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m03910_a3-pure.cl
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m04010_a0-optimized.cl
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m04010_a0-pure.cl
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m04010_a1-optimized.cl
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m04010_a1-pure.cl
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m04010_a3-optimized.cl
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m04010_a3-pure.cl
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m04110_a0-optimized.cl
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m04110_a0-pure.cl
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m04110_a3-optimized.cl
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m04110_a3-pure.cl
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m04310_a0-optimized.cl
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m04310_a0-pure.cl
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m04310_a1-optimized.cl
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m04310_a1-pure.cl
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m04310_a3-optimized.cl
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m04310_a3-pure.cl
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m04400_a0-optimized.cl
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m04400_a0-pure.cl
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m04400_a1-optimized.cl
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m04400_a1-pure.cl
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m04400_a3-optimized.cl
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m04400_a3-pure.cl
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m04500_a0-optimized.cl
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m04500_a0-pure.cl
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m04500_a1-optimized.cl
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m04500_a1-pure.cl
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m04500_a3-optimized.cl
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m04500_a3-pure.cl
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m04510_a0-optimized.cl
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m04510_a0-pure.cl
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m04510_a1-optimized.cl
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m04510_a1-pure.cl
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m04510_a3-optimized.cl
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m04510_a3-pure.cl
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m04520_a0-optimized.cl
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m04520_a0-pure.cl
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m04520_a1-optimized.cl
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m04520_a1-pure.cl
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m04520_a3-optimized.cl
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m04520_a3-pure.cl
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m04700_a0-optimized.cl
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m04700_a0-pure.cl
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m04700_a1-optimized.cl
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m04700_a1-pure.cl
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m04700_a3-optimized.cl
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m04700_a3-pure.cl
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m04710_a0-optimized.cl
|
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m04710_a0-pure.cl
|
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m04710_a1-optimized.cl
|
New Attack-Mode: Association Attack. Like JtR's single mode. Very early
|
2020-09-29 15:56:32 +02:00 |
|
m04710_a1-pure.cl
|
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m04710_a3-optimized.cl
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m04710_a3-pure.cl
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m04800_a0-optimized.cl
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m04800_a0-pure.cl
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m04800_a1-optimized.cl
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m04800_a1-pure.cl
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m04800_a3-optimized.cl
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m04800_a3-pure.cl
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m04900_a0-optimized.cl
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m04900_a0-pure.cl
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m04900_a1-optimized.cl
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m04900_a1-pure.cl
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m04900_a3-optimized.cl
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m04900_a3-pure.cl
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m05000_a0-optimized.cl
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m05000_a0-pure.cl
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m05000_a1-optimized.cl
|
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m05000_a1-pure.cl
|
Add files via upload
|
2020-10-26 00:04:58 +00:00 |
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m05000_a3-optimized.cl
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m05000_a3-pure.cl
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m05100_a0-optimized.cl
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m05100_a0-pure.cl
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m05100_a1-optimized.cl
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m05100_a1-pure.cl
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m05100_a3-optimized.cl
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m05100_a3-pure.cl
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m05200-pure.cl
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m05300_a0-optimized.cl
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m05300_a0-pure.cl
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m05300_a1-optimized.cl
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m05300_a1-pure.cl
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m05300_a3-optimized.cl
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m05300_a3-pure.cl
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m05400_a0-optimized.cl
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m05400_a0-pure.cl
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m05400_a1-pure.cl
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m05400_a3-optimized.cl
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m05400_a3-pure.cl
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m05500_a0-optimized.cl
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m05500_a0-pure.cl
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m05500_a1-pure.cl
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m05500_a3-optimized.cl
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m05600_a0-optimized.cl
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m05600_a0-pure.cl
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m05600_a3-optimized.cl
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m05600_a3-pure.cl
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m05800-optimized.cl
|
AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
|
2021-07-26 07:59:12 +02:00 |
|
m05800-pure.cl
|
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m06000_a0-optimized.cl
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m06000_a0-pure.cl
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m06000_a1-optimized.cl
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m06000_a1-pure.cl
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m06000_a3-optimized.cl
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m06000_a3-pure.cl
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m06100_a0-pure.cl
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m06100_a1-pure.cl
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m06100_a3-optimized.cl
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m06100_a3-pure.cl
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m06211-pure.cl
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m06212-pure.cl
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m06213-pure.cl
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m06221-pure.cl
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m06223-pure.cl
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m06231-pure.cl
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m06232-pure.cl
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m06233-pure.cl
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m06300-optimized.cl
|
AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
|
2021-07-26 07:59:12 +02:00 |
|
m06300-pure.cl
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m06400-pure.cl
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m06500-pure.cl
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m06600-pure.cl
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m06700-pure.cl
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m06800-pure.cl
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m06900_a0-optimized.cl
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m06900_a1-optimized.cl
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m06900_a3-optimized.cl
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m07000_a0-optimized.cl
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m07000_a0-pure.cl
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m07000_a1-optimized.cl
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m07000_a1-pure.cl
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m07000_a3-optimized.cl
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m07000_a3-pure.cl
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m07100-pure.cl
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m07300_a0-optimized.cl
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m07300_a0-pure.cl
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m07300_a1-optimized.cl
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m07300_a1-pure.cl
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m07300_a3-optimized.cl
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m07300_a3-pure.cl
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m07400-optimized.cl
|
AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
|
2021-07-26 07:59:12 +02:00 |
|
m07400-pure.cl
|
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m07500_a0-optimized.cl
|
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m07500_a0-pure.cl
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m07500_a1-optimized.cl
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m07500_a1-pure.cl
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m07500_a3-optimized.cl
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m07500_a3-pure.cl
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m07700_a0-optimized.cl
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m07700_a1-optimized.cl
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m07700_a3-optimized.cl
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m07701_a0-optimized.cl
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m07701_a1-optimized.cl
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m07701_a3-optimized.cl
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m07800_a0-optimized.cl
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m07800_a1-optimized.cl
|
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m07800_a3-optimized.cl
|
|
|
|
m07801_a0-optimized.cl
|
New Attack-Mode: Association Attack. Like JtR's single mode. Very early
|
2020-09-29 15:56:32 +02:00 |
|
m07801_a1-optimized.cl
|
|
|
|
m07801_a3-optimized.cl
|
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m07900-pure.cl
|
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m08000_a0-optimized.cl
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m08000_a1-optimized.cl
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m08000_a3-optimized.cl
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m08100_a0-optimized.cl
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m08100_a0-pure.cl
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m08100_a1-optimized.cl
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m08100_a1-pure.cl
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m08100_a3-optimized.cl
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m08100_a3-pure.cl
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m08200-pure.cl
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m08300_a0-optimized.cl
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m08300_a0-pure.cl
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m08300_a1-optimized.cl
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m08300_a1-pure.cl
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m08300_a3-optimized.cl
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m08300_a3-pure.cl
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m08400_a0-optimized.cl
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m08400_a0-pure.cl
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m08400_a1-optimized.cl
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m08400_a1-pure.cl
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m08400_a3-optimized.cl
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m08400_a3-pure.cl
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m08500_a0-pure.cl
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m08500_a1-pure.cl
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m08500_a3-pure.cl
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m08600_a0-pure.cl
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m08600_a1-pure.cl
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m08600_a3-pure.cl
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m08700_a0-optimized.cl
|
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m08700_a1-optimized.cl
|
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m08700_a3-optimized.cl
|
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m08800-pure.cl
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m08900-pure.cl
|
HIP Backend: Added support to support HIP 4.4 and later, but added check to rule out older versions because they are incompatible
|
2021-07-23 16:04:34 +02:00 |
|
m09000-pure.cl
|
Password Safe v2: Backport optimizations reducing bank conflicts in bcrypt
|
2021-07-26 10:17:21 +02:00 |
|
m09100-pure.cl
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m09400-pure.cl
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m09500-pure.cl
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m09600-pure.cl
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m09700_a0-optimized.cl
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m09700_a1-optimized.cl
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m09700_a3-optimized.cl
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m09710_a0-optimized.cl
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m09710_a1-optimized.cl
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m09710_a3-optimized.cl
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m09720_a0-optimized.cl
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m09720_a1-optimized.cl
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m09720_a3-optimized.cl
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m09800_a0-optimized.cl
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m09800_a1-optimized.cl
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m09800_a3-optimized.cl
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m09810_a0-optimized.cl
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m09810_a1-optimized.cl
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m09810_a3-optimized.cl
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m09820_a0-optimized.cl
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m09820_a1-optimized.cl
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m09820_a3-optimized.cl
|
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m09900_a0-optimized.cl
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m09900_a0-pure.cl
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m09900_a1-optimized.cl
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m09900_a1-pure.cl
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m09900_a3-optimized.cl
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m09900_a3-pure.cl
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m10100_a0-optimized.cl
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m10100_a1-optimized.cl
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m10100_a3-optimized.cl
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m10300-pure.cl
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m10400_a0-optimized.cl
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m10400_a1-optimized.cl
|
RC4: Update -m 97x0 and -m 104x0 to new RC4 crypto library code, improving performance by 20% or more
|
2021-05-30 15:40:33 +02:00 |
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m10400_a3-optimized.cl
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m10410_a0-optimized.cl
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m10410_a1-optimized.cl
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m10410_a3-optimized.cl
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m10420_a0-optimized.cl
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m10420_a1-optimized.cl
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m10420_a3-optimized.cl
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m10500-pure.cl
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m10700-optimized.cl
|
AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
|
2021-07-26 07:59:12 +02:00 |
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m10700-pure.cl
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m10800_a0-optimized.cl
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m10800_a0-pure.cl
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m10800_a1-optimized.cl
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m10800_a3-optimized.cl
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m10800_a3-pure.cl
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m10810_a0-optimized.cl
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m10810_a0-pure.cl
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m10810_a1-optimized.cl
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m10810_a1-pure.cl
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m10810_a3-optimized.cl
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m10810_a3-pure.cl
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m10820_a0-optimized.cl
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m10820_a0-pure.cl
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m10820_a1-optimized.cl
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m10820_a3-optimized.cl
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m10820_a3-pure.cl
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m10830_a0-optimized.cl
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m10830_a0-pure.cl
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m10830_a1-optimized.cl
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m10830_a1-pure.cl
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m10830_a3-optimized.cl
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m10830_a3-pure.cl
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m10840_a0-optimized.cl
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m10840_a0-pure.cl
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m10840_a1-optimized.cl
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m10840_a1-pure.cl
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m10840_a3-optimized.cl
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m10870_a0-optimized.cl
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m10870_a3-pure.cl
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m10900-pure.cl
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m11000_a0-optimized.cl
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m11000_a0-pure.cl
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m11000_a1-optimized.cl
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m11000_a1-pure.cl
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m11000_a3-optimized.cl
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m11000_a3-pure.cl
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m11100_a3-optimized.cl
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m11200_a3-optimized.cl
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m11200_a3-pure.cl
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m11300-pure.cl
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m11500_a0-optimized.cl
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m11500_a1-optimized.cl
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m11500_a3-optimized.cl
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m11600-optimized.cl
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m11600-pure.cl
|
AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
|
2021-07-26 07:59:12 +02:00 |
|
m11700_a0-optimized.cl
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m11700_a0-pure.cl
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m11700_a1-optimized.cl
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m11800_a0-optimized.cl
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m11800_a0-pure.cl
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m11800_a1-optimized.cl
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m11800_a1-pure.cl
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m11800_a3-optimized.cl
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m11800_a3-pure.cl
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m11850_a0-pure.cl
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m11850_a3-pure.cl
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m11860_a0-pure.cl
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m11860_a1-pure.cl
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m11860_a3-pure.cl
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m11900-pure.cl
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m12000-pure.cl
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m12200-pure.cl
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m12300-pure.cl
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m12400-pure.cl
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m12500-optimized.cl
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m12500-pure.cl
|
AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
|
2021-07-26 07:59:12 +02:00 |
|
m12600_a0-optimized.cl
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m12600_a0-pure.cl
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m12600_a1-optimized.cl
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m12600_a1-pure.cl
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m12600_a3-optimized.cl
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m12600_a3-pure.cl
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m12700-pure.cl
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m12800-pure.cl
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m12900-pure.cl
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m13000-pure.cl
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m13100_a0-optimized.cl
|
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
|
2021-06-23 08:36:17 +02:00 |
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m13100_a0-pure.cl
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m13100_a1-optimized.cl
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m13100_a1-pure.cl
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m13100_a3-optimized.cl
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m13100_a3-pure.cl
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m13200-pure.cl
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m13300_a0-optimized.cl
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m13300_a0-pure.cl
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m13300_a1-optimized.cl
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m13300_a1-pure.cl
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m13300_a3-optimized.cl
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m13300_a3-pure.cl
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m13400-pure.cl
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m13500_a0-optimized.cl
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m13500_a0-pure.cl
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m13500_a1-optimized.cl
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m13500_a1-pure.cl
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m13500_a3-optimized.cl
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m13500_a3-pure.cl
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m13600-pure.cl
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m13711-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13712-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13713-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13721-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13722-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13723-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13731-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13732-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13733-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13751-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13752-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13753-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13771-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13772-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
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m13773-pure.cl
|
Improve PIM fix for use on macOS
|
2021-07-20 15:10:49 +02:00 |
|
m13800_a0-optimized.cl
|
AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
|
2021-07-26 07:59:12 +02:00 |
|
m13800_a0-pure.cl
|
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m13800_a1-optimized.cl
|
AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
|
2021-07-26 07:59:12 +02:00 |
|
m13800_a1-pure.cl
|
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m13800_a3-optimized.cl
|
AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
|
2021-07-26 07:59:12 +02:00 |
|
m13800_a3-pure.cl
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m13900_a0-optimized.cl
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m13900_a0-pure.cl
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m13900_a1-optimized.cl
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m13900_a1-pure.cl
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m13900_a3-optimized.cl
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m13900_a3-pure.cl
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m14000_a0-pure.cl
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m14100_a3-pure.cl
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m14400_a0-optimized.cl
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m14400_a0-pure.cl
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m14400_a1-optimized.cl
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m14400_a1-pure.cl
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m14400_a3-optimized.cl
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m14400_a3-pure.cl
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New Attack-Mode: Association Attack. Like JtR's single mode. Very early
|
2020-09-29 15:56:32 +02:00 |
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m14511_a0-pure.cl
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m14800-pure.cl
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m14900_a0-optimized.cl
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m14900_a1-optimized.cl
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m14900_a3-optimized.cl
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m15000_a0-optimized.cl
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m15000_a0-pure.cl
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m15000_a3-optimized.cl
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m15000_a3-pure.cl
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m15100-pure.cl
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m15300-pure.cl
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m15400_a0-optimized.cl
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m15400_a1-optimized.cl
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m15400_a3-optimized.cl
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m15500_a0-pure.cl
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m15500_a1-pure.cl
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m15500_a3-optimized.cl
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m15500_a3-pure.cl
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m15600-pure.cl
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m15700-pure.cl
|
HIP Backend: Added support to support HIP 4.4 and later, but added check to rule out older versions because they are incompatible
|
2021-07-23 16:04:34 +02:00 |
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m15900-pure.cl
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m16000_a3-pure.cl
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m16100_a0-optimized.cl
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m16100_a0-pure.cl
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m16100_a1-optimized.cl
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m16100_a1-pure.cl
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m16100_a3-optimized.cl
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m16100_a3-pure.cl
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m16200-pure.cl
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m16300-pure.cl
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m16400_a0-optimized.cl
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m16400_a0-pure.cl
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m16400_a3-optimized.cl
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m16600_a0-optimized.cl
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m16600_a3-optimized.cl
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m16600_a3-pure.cl
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m16800-pure.cl
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m16801-pure.cl
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m17210_a3-pure.cl
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m17220_a1-pure.cl
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m17225_a0-pure.cl
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m17230_a0-pure.cl
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m17230_a1-pure.cl
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m17230_a3-pure.cl
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m17300_a0-optimized.cl
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m17300_a1-optimized.cl
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m17300_a3-optimized.cl
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m17400_a3-optimized.cl
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m17500_a0-optimized.cl
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m17500_a1-optimized.cl
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m17500_a3-optimized.cl
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m17600_a1-optimized.cl
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m17600_a3-optimized.cl
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m17700_a0-optimized.cl
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m17700_a1-optimized.cl
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m17700_a3-optimized.cl
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m17800_a0-optimized.cl
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m17800_a1-optimized.cl
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m17800_a3-optimized.cl
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m17900_a0-optimized.cl
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m17900_a1-optimized.cl
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m17900_a3-optimized.cl
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m18000_a0-optimized.cl
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m18000_a1-optimized.cl
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m18000_a3-optimized.cl
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m18100_a0-pure.cl
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m18100_a1-pure.cl
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m18100_a3-pure.cl
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m18200_a0-optimized.cl
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Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
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2021-06-23 08:36:17 +02:00 |
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m18200_a0-pure.cl
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m18200_a1-optimized.cl
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m18200_a1-pure.cl
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m18200_a3-optimized.cl
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m18200_a3-pure.cl
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m18300-pure.cl
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m18400-pure.cl
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m18500_a0-pure.cl
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m18500_a1-pure.cl
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m18500_a3-pure.cl
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m18600-pure.cl
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Blowfish Kernels: Backport optimizations reducing bank conflicts from bcrypt to Password Safe v2 and Open Document Format (ODF) 1.1
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2021-07-26 13:38:39 +02:00 |
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m18700_a0-optimized.cl
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m18700_a0-pure.cl
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m18700_a1-optimized.cl
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m18700_a3-optimized.cl
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m18700_a3-pure.cl
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m18800-pure.cl
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m18900-pure.cl
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m19000-pure.cl
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m19100-pure.cl
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m19200-pure.cl
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m19900-pure.cl
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m20011-pure.cl
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m20012-pure.cl
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m20013-pure.cl
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m20600-pure.cl
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m20710_a0-optimized.cl
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m20710_a0-pure.cl
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m20800_a0-optimized.cl
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m20800_a0-pure.cl
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m20800_a1-optimized.cl
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m20800_a3-optimized.cl
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m20800_a3-pure.cl
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m20900_a0-optimized.cl
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m20900_a0-pure.cl
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m20900_a3-optimized.cl
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m20900_a3-pure.cl
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m21000_a0-optimized.cl
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m21000_a0-pure.cl
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m21000_a1-optimized.cl
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m21000_a3-optimized.cl
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m21000_a3-pure.cl
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m21100_a0-optimized.cl
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m21100_a1-optimized.cl
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m21100_a1-pure.cl
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m21100_a3-optimized.cl
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m21100_a3-pure.cl
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Fixed vector datatype support in -m 21100 only -P mode and only -a 3 mode were affected
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2021-04-25 21:25:28 +02:00 |
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m21200_a0-optimized.cl
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m21200_a0-pure.cl
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m21200_a3-optimized.cl
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m21400_a0-optimized.cl
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m22200_a0-optimized.cl
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m22200_a3-optimized.cl
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m22200_a3-pure.cl
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m22300_a0-pure.cl
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m22300_a1-optimized.cl
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m22300_a1-pure.cl
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m22300_a3-optimized.cl
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m22300_a3-pure.cl
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m22400-pure.cl
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m22500_a0-optimized.cl
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m22500_a0-pure.cl
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m22500_a1-optimized.cl
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m22500_a1-pure.cl
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m22500_a3-optimized.cl
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m22500_a3-pure.cl
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m22600-pure.cl
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m22700-pure.cl
|
HIP Backend: Added support to support HIP 4.4 and later, but added check to rule out older versions because they are incompatible
|
2021-07-23 16:04:34 +02:00 |
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m22911_a0-pure.cl
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m22911_a1-pure.cl
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m22911_a3-pure.cl
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m22921_a3-pure.cl
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m22931_a0-pure.cl
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m23001_a0-optimized.cl
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m23001_a0-pure.cl
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m23001_a1-optimized.cl
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m23002_a3-optimized.cl
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m23002_a3-pure.cl
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m23003_a3-optimized.cl
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m23003_a3-pure.cl
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m23200-pure.cl
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m23500-pure.cl
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m23600-pure.cl
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m23700-optimized.cl
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m23700-pure.cl
|
AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
|
2021-07-26 07:59:12 +02:00 |
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m23800-optimized.cl
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m23800-pure.cl
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AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
|
2021-07-26 07:59:12 +02:00 |
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m23900-pure.cl
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m24200-pure.cl
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m24300_a0-optimized.cl
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m24300_a0-pure.cl
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m24300_a1-optimized.cl
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m24300_a1-pure.cl
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m24300_a3-optimized.cl
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m24300_a3-pure.cl
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m24410-pure.cl
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m24420-pure.cl
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m24500-pure.cl
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m24620-pure.cl
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m24630-pure.cl
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m24700_a0-optimized.cl
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m24700_a0-pure.cl
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m24700_a1-optimized.cl
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m24700_a1-pure.cl
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m24700_a3-optimized.cl
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m24700_a3-pure.cl
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m24800_a0-optimized.cl
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m24800_a0-pure.cl
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m24800_a1-optimized.cl
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m24800_a1-pure.cl
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m24800_a3-optimized.cl
|
Update -a 3 kernels to make use of new parameter salt_repeat
|
2021-04-22 19:42:49 +02:00 |
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m24800_a3-pure.cl
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m24900_a0-optimized.cl
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m24900_a1-optimized.cl
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m24900_a3-optimized.cl
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m25000-pure.cl
|
using shared buffer between md5 and sha1 SNMPV3_TMP_ELEMS_OPT, fix to crack real hashes
|
2021-07-26 22:25:15 +02:00 |
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m25100-pure.cl
|
fix snmpv3 md5/sha1, tested with real hashes
|
2021-07-26 19:04:30 +02:00 |
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m25200-pure.cl
|
fix snmpv3 md5/sha1, tested with real hashes
|
2021-07-26 19:04:30 +02:00 |
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m25300-pure.cl
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m25400-pure.cl
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m25500-pure.cl
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m25600-pure.cl
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m25700_a0-optimized.cl
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m25700_a1-optimized.cl
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m25700_a3-optimized.cl
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m25800-pure.cl
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m25900-pure.cl
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m26000_a0-pure.cl
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m26000_a1-pure.cl
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m26000_a3-pure.cl
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m26100-pure.cl
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m26200_a0-pure.cl
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m26200_a1-pure.cl
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m26200_a3-pure.cl
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m26300_a0-pure.cl
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m26300_a1-pure.cl
|
Renamed -m 7010 to -m 26300
|
2021-06-08 11:12:54 +02:00 |
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m26300_a3-pure.cl
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m26401_a0-optimized.cl
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m26401_a1-optimized.cl
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m26401_a3-optimized.cl
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m26402_a0-optimized.cl
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m26402_a1-optimized.cl
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m26402_a3-optimized.cl
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m26403_a0-optimized.cl
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m26403_a1-optimized.cl
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m26403_a3-optimized.cl
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m26500-pure.cl
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m26600-pure.cl
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m26700-pure.cl
|
fix to crack real hashes
|
2021-07-26 22:45:02 +02:00 |
|
m26800-pure.cl
|
fix to crack real hashes
|
2021-07-26 23:00:33 +02:00 |
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markov_be.cl
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markov_le.cl
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shared.cl
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