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0bf4e3c34a
- Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
46 lines
1.1 KiB
Common Lisp
46 lines
1.1 KiB
Common Lisp
/**
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* Author......: Jens Steube <jens.steube@gmail.com>
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* License.....: MIT
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*/
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#include "include/constants.h"
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#include "include/kernel_vendor.h"
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#include "types_ocl.c"
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#include "include/rp_gpu.h"
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#include "rp.c"
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__kernel void __attribute__((reqd_work_group_size (64, 1, 1))) amp (__global pw_t *pws, __global pw_t *pws_amp, __global gpu_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, const u32 combs_mode, const u32 gid_max)
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{
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const u32 gid = get_global_id (0);
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if (gid >= gid_max) return;
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const u32 pw_len = pws[gid].pw_len;
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u32 w0[4];
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u32 w1[4];
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w0[0] = pws[gid].i[ 0];
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w0[1] = pws[gid].i[ 1];
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w0[2] = pws[gid].i[ 2];
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w0[3] = pws[gid].i[ 3];
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w1[0] = pws[gid].i[ 4];
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w1[1] = pws[gid].i[ 5];
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w1[2] = pws[gid].i[ 6];
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w1[3] = pws[gid].i[ 7];
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const u32 out_len = apply_rules (rules_buf[0].cmds, w0, w1, pw_len);
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pws_amp[gid].i[0] = w0[0];
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pws_amp[gid].i[1] = w0[1];
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pws_amp[gid].i[2] = w0[2];
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pws_amp[gid].i[3] = w0[3];
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pws_amp[gid].i[4] = w1[0];
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pws_amp[gid].i[5] = w1[1];
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pws_amp[gid].i[6] = w1[2];
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pws_amp[gid].i[7] = w1[3];
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pws_amp[gid].pw_len = out_len;
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}
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