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168 lines
5.5 KiB
168 lines
5.5 KiB
/* Ppmd.h -- PPMD codec common code
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2021-04-13 : Igor Pavlov : Public domain
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This code is based on PPMd var.H (2001): Dmitry Shkarin : Public domain */
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#ifndef __PPMD_H
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#define __PPMD_H
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#include "CpuArch.h"
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EXTERN_C_BEGIN
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#if defined(MY_CPU_SIZEOF_POINTER) && (MY_CPU_SIZEOF_POINTER == 4)
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/*
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PPMD code always uses 32-bit internal fields in PPMD structures to store internal references in main block.
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if (PPMD_32BIT is defined), the PPMD code stores internal pointers to 32-bit reference fields.
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if (PPMD_32BIT is NOT defined), the PPMD code stores internal UInt32 offsets to reference fields.
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if (pointer size is 64-bit), then (PPMD_32BIT) mode is not allowed,
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if (pointer size is 32-bit), then (PPMD_32BIT) mode is optional,
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and it's allowed to disable PPMD_32BIT mode even if pointer is 32-bit.
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PPMD code works slightly faster in (PPMD_32BIT) mode.
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*/
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#define PPMD_32BIT
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#endif
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#define PPMD_INT_BITS 7
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#define PPMD_PERIOD_BITS 7
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#define PPMD_BIN_SCALE (1 << (PPMD_INT_BITS + PPMD_PERIOD_BITS))
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#define PPMD_GET_MEAN_SPEC(summ, shift, round) (((summ) + (1 << ((shift) - (round)))) >> (shift))
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#define PPMD_GET_MEAN(summ) PPMD_GET_MEAN_SPEC((summ), PPMD_PERIOD_BITS, 2)
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#define PPMD_UPDATE_PROB_0(prob) ((prob) + (1 << PPMD_INT_BITS) - PPMD_GET_MEAN(prob))
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#define PPMD_UPDATE_PROB_1(prob) ((prob) - PPMD_GET_MEAN(prob))
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#define PPMD_N1 4
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#define PPMD_N2 4
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#define PPMD_N3 4
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#define PPMD_N4 ((128 + 3 - 1 * PPMD_N1 - 2 * PPMD_N2 - 3 * PPMD_N3) / 4)
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#define PPMD_NUM_INDEXES (PPMD_N1 + PPMD_N2 + PPMD_N3 + PPMD_N4)
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MY_CPU_pragma_pack_push_1
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/* Most compilers works OK here even without #pragma pack(push, 1), but some GCC compilers need it. */
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/* SEE-contexts for PPM-contexts with masked symbols */
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typedef struct
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{
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UInt16 Summ; /* Freq */
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Byte Shift; /* Speed of Freq change; low Shift is for fast change */
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Byte Count; /* Count to next change of Shift */
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} CPpmd_See;
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#define Ppmd_See_Update(p) if ((p)->Shift < PPMD_PERIOD_BITS && --(p)->Count == 0) \
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{ (p)->Summ = (UInt16)((p)->Summ << 1); (p)->Count = (Byte)(3 << (p)->Shift++); }
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typedef struct
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{
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Byte Symbol;
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Byte Freq;
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UInt16 Successor_0;
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UInt16 Successor_1;
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} CPpmd_State;
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typedef struct CPpmd_State2_
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{
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Byte Symbol;
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Byte Freq;
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} CPpmd_State2;
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typedef struct CPpmd_State4_
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{
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UInt16 Successor_0;
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UInt16 Successor_1;
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} CPpmd_State4;
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MY_CPU_pragma_pop
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/*
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PPMD code can write full CPpmd_State structure data to CPpmd*_Context
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at (byte offset = 2) instead of some fields of original CPpmd*_Context structure.
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If we use pointers to different types, but that point to shared
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memory space, we can have aliasing problem (strict aliasing).
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XLC compiler in -O2 mode can change the order of memory write instructions
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in relation to read instructions, if we have use pointers to different types.
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To solve that aliasing problem we use combined CPpmd*_Context structure
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with unions that contain the fields from both structures:
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the original CPpmd*_Context and CPpmd_State.
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So we can access the fields from both structures via one pointer,
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and the compiler doesn't change the order of write instructions
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in relation to read instructions.
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If we don't use memory write instructions to shared memory in
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some local code, and we use only reading instructions (read only),
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then probably it's safe to use pointers to different types for reading.
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*/
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#ifdef PPMD_32BIT
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#define Ppmd_Ref_Type(type) type *
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#define Ppmd_GetRef(p, ptr) (ptr)
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#define Ppmd_GetPtr(p, ptr) (ptr)
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#define Ppmd_GetPtr_Type(p, ptr, note_type) (ptr)
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#else
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#define Ppmd_Ref_Type(type) UInt32
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#define Ppmd_GetRef(p, ptr) ((UInt32)((Byte *)(ptr) - (p)->Base))
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#define Ppmd_GetPtr(p, offs) ((void *)((p)->Base + (offs)))
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#define Ppmd_GetPtr_Type(p, offs, type) ((type *)Ppmd_GetPtr(p, offs))
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#endif // PPMD_32BIT
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typedef Ppmd_Ref_Type(CPpmd_State) CPpmd_State_Ref;
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typedef Ppmd_Ref_Type(void) CPpmd_Void_Ref;
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typedef Ppmd_Ref_Type(Byte) CPpmd_Byte_Ref;
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/*
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#ifdef MY_CPU_LE_UNALIGN
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// the unaligned 32-bit access latency can be too large, if the data is not in L1 cache.
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#define Ppmd_GET_SUCCESSOR(p) ((CPpmd_Void_Ref)*(const UInt32 *)(const void *)&(p)->Successor_0)
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#define Ppmd_SET_SUCCESSOR(p, v) *(UInt32 *)(void *)(void *)&(p)->Successor_0 = (UInt32)(v)
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#else
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*/
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/*
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We can write 16-bit halves to 32-bit (Successor) field in any selected order.
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But the native order is more consistent way.
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So we use the native order, if LE/BE order can be detected here at compile time.
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*/
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#ifdef MY_CPU_BE
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#define Ppmd_GET_SUCCESSOR(p) \
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( (CPpmd_Void_Ref) (((UInt32)(p)->Successor_0 << 16) | (p)->Successor_1) )
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#define Ppmd_SET_SUCCESSOR(p, v) { \
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(p)->Successor_0 = (UInt16)(((UInt32)(v) >> 16) /* & 0xFFFF */); \
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(p)->Successor_1 = (UInt16)((UInt32)(v) /* & 0xFFFF */); }
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#else
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#define Ppmd_GET_SUCCESSOR(p) \
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( (CPpmd_Void_Ref) ((p)->Successor_0 | ((UInt32)(p)->Successor_1 << 16)) )
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#define Ppmd_SET_SUCCESSOR(p, v) { \
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(p)->Successor_0 = (UInt16)((UInt32)(v) /* & 0xFFFF */); \
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(p)->Successor_1 = (UInt16)(((UInt32)(v) >> 16) /* & 0xFFFF */); }
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#endif
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// #endif
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#define PPMD_SetAllBitsIn256Bytes(p) \
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{ size_t z; for (z = 0; z < 256 / sizeof(p[0]); z += 8) { \
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p[z+7] = p[z+6] = p[z+5] = p[z+4] = p[z+3] = p[z+2] = p[z+1] = p[z+0] = ~(size_t)0; }}
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EXTERN_C_END
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#endif
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