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mirror of https://github.com/hashcat/hashcat.git synced 2025-07-23 06:58:31 +00:00
hashcat/src/ext_nvml.c
Jens Steube c87a87f992 Improvements to SCRYPT autotuning strategy
General:

The logic for calculating the SCRYPT workload has been moved
from module_extra_buffer_size() to module_extra_tuningdb_block().
Previously, this function just returned values from a static
tuning file. Now, it actually computes tuning values on the fly
based on the device's resources and SCRYPT parameters. This
was always possible, it just wasn't used that way until now.

After running the calculation, the calculated kernel_accel value
is injected into the tuning database as if it had come from a
file. The tmto value is stored internally.

Users can still override kernel-threads, kernel-accel, and
scrypt-tmto via the command line or via tuningdb file.

module_extra_tuningdb_block():

This is now where kernel_accel and tmto are automatically
calculated.

The logic for accel and tmto is now separated and more
flexible. Whether the user is using defaults, tuningdb entries, or
manual command line overrides, the code logic will try to make
smart choices based on what's actually available on the device.

First, it tries to find a kernel_accel value that fits into
available memory. It starts with a base value and simulates
tmto=1 or 2 (which is typical good on GPU).

It also leaves room for other buffers (like pws[], tmps[], etc.).
If the result is close to the actual processor count,
it gets clamped.

This value is then added to the tuning database, so hashcat can pick
it up during startup.

Once that's set, it derives tmto using available memory, thread
count, and the actual SCRYPT parameters.

module_extra_buffer_size():

This function now just returns the size of the SCRYPT B[] buffer,
based on the tmto that was already calculated.

kernel_threads:

Defaults are now set to 32 threads in most cases. On AMD GPUs,
64 threads might give a slight performance bump, but 32 is more
consistent and reliable.

For very memory-heavy algorithms (like Ethereum Wallet), it
scales down the thread count.

Here's a rough reference for other SCRYPT-based modes:

- 64 MiB: 16 threads
- 256 MiB: 4 threads

Tuning files:

All built-in tuningdb entries have been removed, because they
shouldn’t be needed anymore. But you can still add custom entries
if needed. There’s even a commented-out example in the tuningdb
file for mode 22700.

Free memory handling:

Getting the actual amount of free GPU memory is critical for
this to work right. Unfortunately, none of the common GPGPU APIs
give reliable numbers. We now query low-level interfaces like
SYSFS (AMD) and NVML (NVIDIA). Support for those APIs is in
place already, except for ADL, which still needs to be added.

Because of this, hwmon support (which handles those low-level
queries) can no longer be disabled.
2025-06-09 11:02:34 +02:00

417 lines
11 KiB
C

/**
* Author......: See docs/credits.txt
* License.....: MIT
*/
#include "common.h"
#include "types.h"
#include "memory.h"
#include "shared.h"
#include "event.h"
#include "ext_nvml.h"
#include "dynloader.h"
#if defined (__CYGWIN__)
#include <sys/cygwin.h>
#endif
int nvml_init (void *hashcat_ctx)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
memset (nvml, 0, sizeof (NVML_PTR));
#if defined (_WIN)
nvml->lib = hc_dlopen ("nvml.dll");
if (!nvml->lib)
{
DWORD BufferSize = 1024;
DWORD Type = REG_SZ;
char *Buffer = (char *) hcmalloc (BufferSize + 1);
HKEY hKey = 0;
if (RegOpenKeyExA (HKEY_LOCAL_MACHINE, "SOFTWARE\\NVIDIA Corporation\\Global\\NVSMI", 0, KEY_QUERY_VALUE, &hKey) == ERROR_SUCCESS)
{
if (RegQueryValueExA (hKey, "NVSMIPATH", NULL, &Type, (LPBYTE)Buffer, &BufferSize) == ERROR_SUCCESS)
{
Buffer[BufferSize] = 0;
}
else
{
//if (user_options->quiet == false)
// event_log_error (hashcat_ctx, "NVML library load failed. Proceeding without NVML HWMon enabled.");
return -1;
}
RegCloseKey (hKey);
}
else
{
//if (user_options->quiet == false)
// event_log_error (hashcat_ctx, "NVML library load failed. Proceeding without NVML HWMon enabled.");
return -1;
}
strcat (Buffer, "\\nvml.dll");
nvml->lib = hc_dlopen (Buffer);
hcfree (Buffer);
}
#elif defined (__CYGWIN__)
nvml->lib = hc_dlopen ("nvml.dll");
if (!nvml->lib)
{
HCFILE nvml_lib;
if (hc_fopen (&nvml_lib, "/proc/registry/HKEY_LOCAL_MACHINE/SOFTWARE/NVIDIA Corporation/Global/NVSMI/NVSMIPATH", "rb") == false)
{
//if (user_options->quiet == false)
// event_log_error (hashcat_ctx, "NVML library load failed: %m. Proceeding without NVML HWMon enabled.");
return -1;
}
char *nvml_winpath, *nvml_cygpath;
nvml_winpath = (char *) hcmalloc (100);
hc_fread (nvml_winpath, 100, 1, &nvml_lib);
hc_fclose (&nvml_lib);
ssize_t size = cygwin_conv_path (CCP_WIN_A_TO_POSIX | CCP_PROC_CYGDRIVE, nvml_winpath, NULL, 0);
if (size > 0)
{
nvml_cygpath = (char *) hcmalloc (size + 9);
cygwin_conv_path (CCP_WIN_A_TO_POSIX | CCP_PROC_CYGDRIVE, nvml_winpath, nvml_cygpath, size);
}
else
{
//if (user_options->quiet == false)
// event_log_error (hashcat_ctx, "Could not find NVML on this system. Proceeding without NVML HWMon enabled.");
return -1;
}
strcat (nvml_cygpath, "/nvml.dll");
nvml->lib = hc_dlopen (nvml_cygpath);
}
#elif defined (_POSIX)
nvml->lib = hc_dlopen ("libnvidia-ml.so");
if (!nvml->lib)
{
nvml->lib = hc_dlopen ("libnvidia-ml.so.1");
}
#endif
if (!nvml->lib)
{
//if (user_options->quiet == false)
// event_log_error (hashcat_ctx, "NVML library load failed. Proceeding without NVML HWMon enabled.");
return -1;
}
HC_LOAD_FUNC(nvml, nvmlErrorString, NVML_ERROR_STRING, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlInit, NVML_INIT, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlShutdown, NVML_SHUTDOWN, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetCount, NVML_DEVICE_GET_COUNT, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetName, NVML_DEVICE_GET_NAME, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetHandleByIndex, NVML_DEVICE_GET_HANDLE_BY_INDEX, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetTemperature, NVML_DEVICE_GET_TEMPERATURE, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetFanSpeed, NVML_DEVICE_GET_FAN_SPEED, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetUtilizationRates, NVML_DEVICE_GET_UTILIZATION_RATES, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetClockInfo, NVML_DEVICE_GET_CLOCKINFO, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetTemperatureThreshold, NVML_DEVICE_GET_THRESHOLD, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetCurrPcieLinkGeneration, NVML_DEVICE_GET_CURRPCIELINKGENERATION, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetCurrPcieLinkWidth, NVML_DEVICE_GET_CURRPCIELINKWIDTH, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetCurrentClocksThrottleReasons, NVML_DEVICE_GET_CURRENTCLOCKSTHROTTLEREASONS, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetSupportedClocksThrottleReasons, NVML_DEVICE_GET_SUPPORTEDCLOCKSTHROTTLEREASONS, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetPciInfo, NVML_DEVICE_GET_PCIINFO, NVML, 0);
HC_LOAD_FUNC(nvml, nvmlDeviceGetMemoryInfo, NVML_DEVICE_GET_MEMORYINFO, NVML, 0);
return 0;
}
void nvml_close (void *hashcat_ctx)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
if (nvml)
{
if (nvml->lib)
hc_dlclose (nvml->lib);
hcfree (nvml);
}
}
const char *hm_NVML_nvmlErrorString (NVML_PTR *nvml, const nvmlReturn_t nvml_rc)
{
return nvml->nvmlErrorString (nvml_rc);
}
int hm_NVML_nvmlInit (void *hashcat_ctx)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
const nvmlReturn_t nvml_rc = (nvmlReturn_t) nvml->nvmlInit ();
if (nvml_rc != NVML_SUCCESS && nvml_rc != NVML_ERROR_DRIVER_NOT_LOADED)
{
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
event_log_error (hashcat_ctx, "nvmlInit(): %s", string);
return -1;
}
return 0;
}
int hm_NVML_nvmlShutdown (void *hashcat_ctx)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
const nvmlReturn_t nvml_rc = (nvmlReturn_t) nvml->nvmlShutdown ();
if (nvml_rc != NVML_SUCCESS && nvml_rc != NVML_ERROR_DRIVER_NOT_LOADED)
{
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
event_log_error (hashcat_ctx, "nvmlShutdown(): %s", string);
return -1;
}
return 0;
}
int hm_NVML_nvmlDeviceGetCount (void *hashcat_ctx, unsigned int *deviceCount)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
const nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetCount (deviceCount);
if (nvml_rc != NVML_SUCCESS && nvml_rc != NVML_ERROR_DRIVER_NOT_LOADED)
{
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
event_log_error (hashcat_ctx, "nvmlDeviceGetCount(): %s", string);
return -1;
}
return 0;
}
int hm_NVML_nvmlDeviceGetHandleByIndex (void *hashcat_ctx, unsigned int device_index, nvmlDevice_t *device)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
const nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetHandleByIndex (device_index, device);
if (nvml_rc != NVML_SUCCESS)
{
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
event_log_error (hashcat_ctx, "nvmlDeviceGetHandleByIndex(): %s", string);
return -1;
}
return 0;
}
int hm_NVML_nvmlDeviceGetTemperature (void *hashcat_ctx, nvmlDevice_t device, nvmlTemperatureSensors_t sensorType, unsigned int *temp)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
const nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetTemperature (device, sensorType, temp);
if (nvml_rc != NVML_SUCCESS)
{
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
event_log_error (hashcat_ctx, "nvmlDeviceGetTemperature(): %s", string);
return -1;
}
return 0;
}
int hm_NVML_nvmlDeviceGetFanSpeed (void *hashcat_ctx, nvmlDevice_t device, unsigned int *speed)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
const nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetFanSpeed (device, speed);
if (nvml_rc != NVML_SUCCESS)
{
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
event_log_error (hashcat_ctx, "nvmlDeviceGetFanSpeed(): %s", string);
return -1;
}
return 0;
}
int hm_NVML_nvmlDeviceGetUtilizationRates (void *hashcat_ctx, nvmlDevice_t device, nvmlUtilization_t *utilization)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
const nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetUtilizationRates (device, utilization);
if (nvml_rc != NVML_SUCCESS)
{
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
event_log_error (hashcat_ctx, "nvmlDeviceGetUtilizationRates(): %s", string);
return -1;
}
return 0;
}
int hm_NVML_nvmlDeviceGetClockInfo (void *hashcat_ctx, nvmlDevice_t device, nvmlClockType_t type, unsigned int *clockfreq)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
const nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetClockInfo (device, type, clockfreq);
if (nvml_rc != NVML_SUCCESS)
{
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
event_log_error (hashcat_ctx, "nvmlDeviceGetClockInfo(): %s", string);
return -1;
}
return 0;
}
int hm_NVML_nvmlDeviceGetTemperatureThreshold (void *hashcat_ctx, nvmlDevice_t device, nvmlTemperatureThresholds_t thresholdType, unsigned int *temp)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
const nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetTemperatureThreshold (device, thresholdType, temp);
if (nvml_rc != NVML_SUCCESS)
{
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
event_log_error (hashcat_ctx, "nvmlDeviceGetTemperatureThreshold(): %s", string);
return -1;
}
return 0;
}
int hm_NVML_nvmlDeviceGetCurrPcieLinkWidth (void *hashcat_ctx, nvmlDevice_t device, unsigned int *currLinkWidth)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
const nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetCurrPcieLinkWidth (device, currLinkWidth);
if (nvml_rc != NVML_SUCCESS)
{
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
event_log_error (hashcat_ctx, "nvmlDeviceGetCurrPcieLinkWidth(): %s", string);
return -1;
}
return 0;
}
int hm_NVML_nvmlDeviceGetPciInfo (void *hashcat_ctx, nvmlDevice_t device, nvmlPciInfo_t *pci)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
const nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetPciInfo (device, pci);
if (nvml_rc != NVML_SUCCESS)
{
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
event_log_error (hashcat_ctx, "nvmlDeviceGetPciInfo(): %s", string);
return -1;
}
return 0;
}
int hm_NVML_nvmlDeviceGetMemoryInfo (void *hashcat_ctx, nvmlDevice_t device, nvmlMemory_t *mem)
{
hwmon_ctx_t *hwmon_ctx = ((hashcat_ctx_t *) hashcat_ctx)->hwmon_ctx;
NVML_PTR *nvml = (NVML_PTR *) hwmon_ctx->hm_nvml;
const nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetMemoryInfo (device, mem);
if (nvml_rc != NVML_SUCCESS)
{
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
event_log_error (hashcat_ctx, "nvmlDeviceGetMemoryInfo(): %s", string);
return -1;
}
return 0;
}