mirror of
https://github.com/hashcat/hashcat.git
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15ada5124e
Updated kernel declarations from "KERNEL_FQ void HC_ATTR_SEQ" to "KERNEL_FQ KERNEL_FA void". Please update your custom plugin kernels accordingly. Added spilling size as a factor in calculating usable memory per device. This is based on undocumented variables and may not be 100% accurate, but it works well in practice. Added a compiler hint to scrypt-based kernels indicating the guaranteed maximum thread count per kernel invocation. Removed redundant kernel code 29800, as it is identical to 27700, and updated the plugin.
422 lines
9.6 KiB
Common Lisp
422 lines
9.6 KiB
Common Lisp
/**
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* Author......: See docs/credits.txt
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* License.....: MIT
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*/
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//#define NEW_SIMD_CODE
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#ifdef KERNEL_STATIC
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#include M2S(INCLUDE_PATH/inc_vendor.h)
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#include M2S(INCLUDE_PATH/inc_types.h)
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#include M2S(INCLUDE_PATH/inc_platform.cl)
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#include M2S(INCLUDE_PATH/inc_common.cl)
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#include M2S(INCLUDE_PATH/inc_simd.cl)
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#include M2S(INCLUDE_PATH/inc_hash_sha512.cl)
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#endif
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#define COMPARE_S M2S(INCLUDE_PATH/inc_comp_single.cl)
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#define COMPARE_M M2S(INCLUDE_PATH/inc_comp_multi.cl)
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typedef struct qnx_sha512_tmp
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{
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sha512_ctx_t sha512_ctx;
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u32 sav; // to trigger sha512 bug
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} qnx_sha512_tmp_t;
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DECLSPEC u32 sha512_update_128_qnxbug (PRIVATE_AS sha512_ctx_t *ctx, PRIVATE_AS u32 *w0, PRIVATE_AS u32 *w1, PRIVATE_AS u32 *w2, PRIVATE_AS u32 *w3, PRIVATE_AS u32 *w4, PRIVATE_AS u32 *w5, PRIVATE_AS u32 *w6, PRIVATE_AS u32 *w7, const int len, u32 sav)
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{
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const int pos = ctx->len & 127;
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ctx->len += len;
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if ((pos + len) < 128)
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{
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switch_buffer_by_offset_8x4_be_S (w0, w1, w2, w3, w4, w5, w6, w7, pos);
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ctx->w0[0] |= w0[0];
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ctx->w0[1] |= w0[1];
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ctx->w0[2] |= w0[2];
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ctx->w0[3] |= w0[3];
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ctx->w1[0] |= w1[0];
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ctx->w1[1] |= w1[1];
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ctx->w1[2] |= w1[2];
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ctx->w1[3] |= w1[3];
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ctx->w2[0] |= w2[0];
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ctx->w2[1] |= w2[1];
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ctx->w2[2] |= w2[2];
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ctx->w2[3] |= w2[3];
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ctx->w3[0] |= w3[0];
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ctx->w3[1] |= w3[1];
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ctx->w3[2] |= w3[2];
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ctx->w3[3] |= w3[3];
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ctx->w4[0] |= w4[0];
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ctx->w4[1] |= w4[1];
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ctx->w4[2] |= w4[2];
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ctx->w4[3] |= w4[3];
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ctx->w5[0] |= w5[0];
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ctx->w5[1] |= w5[1];
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ctx->w5[2] |= w5[2];
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ctx->w5[3] |= w5[3];
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ctx->w6[0] |= w6[0];
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ctx->w6[1] |= w6[1];
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ctx->w6[2] |= w6[2];
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ctx->w6[3] |= w6[3];
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ctx->w7[0] |= w7[0];
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ctx->w7[1] |= w7[1];
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ctx->w7[2] |= w7[2];
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ctx->w7[3] |= w7[3];
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}
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else
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{
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u32 c0[4] = { 0 };
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u32 c1[4] = { 0 };
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u32 c2[4] = { 0 };
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u32 c3[4] = { 0 };
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u32 c4[4] = { 0 };
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u32 c5[4] = { 0 };
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u32 c6[4] = { 0 };
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u32 c7[4] = { 0 };
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switch_buffer_by_offset_8x4_carry_be_S (w0, w1, w2, w3, w4, w5, w6, w7, c0, c1, c2, c3, c4, c5, c6, c7, pos);
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ctx->w0[0] |= w0[0];
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ctx->w0[1] |= w0[1];
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ctx->w0[2] |= w0[2];
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ctx->w0[3] |= w0[3];
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ctx->w1[0] |= w1[0];
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ctx->w1[1] |= w1[1];
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ctx->w1[2] |= w1[2];
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ctx->w1[3] |= w1[3];
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ctx->w2[0] |= w2[0];
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ctx->w2[1] |= w2[1];
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ctx->w2[2] |= w2[2];
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ctx->w2[3] |= w2[3];
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ctx->w3[0] |= w3[0];
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ctx->w3[1] |= w3[1];
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ctx->w3[2] |= w3[2];
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ctx->w3[3] |= w3[3];
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ctx->w4[0] |= w4[0];
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ctx->w4[1] |= w4[1];
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ctx->w4[2] |= w4[2];
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ctx->w4[3] |= w4[3];
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ctx->w5[0] |= w5[0];
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ctx->w5[1] |= w5[1];
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ctx->w5[2] |= w5[2];
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ctx->w5[3] |= w5[3];
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ctx->w6[0] |= w6[0];
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ctx->w6[1] |= w6[1];
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ctx->w6[2] |= w6[2];
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ctx->w6[3] |= w6[3];
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ctx->w7[0] |= w7[0];
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ctx->w7[1] |= w7[1];
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ctx->w7[2] |= w7[2];
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ctx->w7[3] |= w7[3];
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sav = ctx->w7[1];
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sha512_transform (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->w4, ctx->w5, ctx->w6, ctx->w7, ctx->h);
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ctx->w0[0] = c0[0];
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ctx->w0[1] = c0[1];
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ctx->w0[2] = c0[2];
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ctx->w0[3] = c0[3];
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ctx->w1[0] = c1[0];
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ctx->w1[1] = c1[1];
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ctx->w1[2] = c1[2];
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ctx->w1[3] = c1[3];
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ctx->w2[0] = c2[0];
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ctx->w2[1] = c2[1];
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ctx->w2[2] = c2[2];
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ctx->w2[3] = c2[3];
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ctx->w3[0] = c3[0];
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ctx->w3[1] = c3[1];
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ctx->w3[2] = c3[2];
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ctx->w3[3] = c3[3];
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ctx->w4[0] = c4[0];
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ctx->w4[1] = c4[1];
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ctx->w4[2] = c4[2];
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ctx->w4[3] = c4[3];
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ctx->w5[0] = c5[0];
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ctx->w5[1] = c5[1];
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ctx->w5[2] = c5[2];
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ctx->w5[3] = c5[3];
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ctx->w6[0] = c6[0];
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ctx->w6[1] = c6[1];
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ctx->w6[2] = c6[2];
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ctx->w6[3] = c6[3];
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ctx->w7[0] = c7[0];
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ctx->w7[1] = c7[1];
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ctx->w7[2] = c7[2];
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ctx->w7[3] = c7[3];
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}
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return sav;
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}
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DECLSPEC u32 sha512_update_qnxbug (PRIVATE_AS sha512_ctx_t *ctx, PRIVATE_AS const u32 *w, const int len, u32 sav)
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{
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u32 w0[4];
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u32 w1[4];
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u32 w2[4];
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u32 w3[4];
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u32 w4[4];
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u32 w5[4];
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u32 w6[4];
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u32 w7[4];
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int pos1;
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int pos4;
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for (pos1 = 0, pos4 = 0; pos1 < len - 128; pos1 += 128, pos4 += 32)
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{
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w0[0] = w[pos4 + 0];
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w0[1] = w[pos4 + 1];
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w0[2] = w[pos4 + 2];
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w0[3] = w[pos4 + 3];
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w1[0] = w[pos4 + 4];
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w1[1] = w[pos4 + 5];
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w1[2] = w[pos4 + 6];
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w1[3] = w[pos4 + 7];
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w2[0] = w[pos4 + 8];
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w2[1] = w[pos4 + 9];
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w2[2] = w[pos4 + 10];
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w2[3] = w[pos4 + 11];
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w3[0] = w[pos4 + 12];
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w3[1] = w[pos4 + 13];
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w3[2] = w[pos4 + 14];
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w3[3] = w[pos4 + 15];
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w4[0] = w[pos4 + 16];
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w4[1] = w[pos4 + 17];
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w4[2] = w[pos4 + 18];
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w4[3] = w[pos4 + 19];
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w5[0] = w[pos4 + 20];
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w5[1] = w[pos4 + 21];
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w5[2] = w[pos4 + 22];
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w5[3] = w[pos4 + 23];
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w6[0] = w[pos4 + 24];
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w6[1] = w[pos4 + 25];
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w6[2] = w[pos4 + 26];
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w6[3] = w[pos4 + 27];
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w7[0] = w[pos4 + 28];
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w7[1] = w[pos4 + 29];
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w7[2] = w[pos4 + 30];
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w7[3] = w[pos4 + 31];
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sav = sha512_update_128_qnxbug (ctx, w0, w1, w2, w3, w4, w5, w6, w7, 128, sav);
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}
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w0[0] = w[pos4 + 0];
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w0[1] = w[pos4 + 1];
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w0[2] = w[pos4 + 2];
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w0[3] = w[pos4 + 3];
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w1[0] = w[pos4 + 4];
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w1[1] = w[pos4 + 5];
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w1[2] = w[pos4 + 6];
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w1[3] = w[pos4 + 7];
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w2[0] = w[pos4 + 8];
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w2[1] = w[pos4 + 9];
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w2[2] = w[pos4 + 10];
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w2[3] = w[pos4 + 11];
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w3[0] = w[pos4 + 12];
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w3[1] = w[pos4 + 13];
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w3[2] = w[pos4 + 14];
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w3[3] = w[pos4 + 15];
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w4[0] = w[pos4 + 16];
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w4[1] = w[pos4 + 17];
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w4[2] = w[pos4 + 18];
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w4[3] = w[pos4 + 19];
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w5[0] = w[pos4 + 20];
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w5[1] = w[pos4 + 21];
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w5[2] = w[pos4 + 22];
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w5[3] = w[pos4 + 23];
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w6[0] = w[pos4 + 24];
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w6[1] = w[pos4 + 25];
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w6[2] = w[pos4 + 26];
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w6[3] = w[pos4 + 27];
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w7[0] = w[pos4 + 28];
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w7[1] = w[pos4 + 29];
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w7[2] = w[pos4 + 30];
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w7[3] = w[pos4 + 31];
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sav = sha512_update_128_qnxbug (ctx, w0, w1, w2, w3, w4, w5, w6, w7, len - pos1, sav);
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return sav;
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}
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DECLSPEC void sha512_final_qnxbug (PRIVATE_AS sha512_ctx_t *ctx, u32 sav)
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{
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const int pos = ctx->len & 127;
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append_0x80_8x4_S (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->w4, ctx->w5, ctx->w6, ctx->w7, pos ^ 3);
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if (pos >= 112)
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{
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sav = ctx->w7[1];
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sha512_transform (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->w4, ctx->w5, ctx->w6, ctx->w7, ctx->h);
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ctx->w0[0] = 0;
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ctx->w0[1] = 0;
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ctx->w0[2] = 0;
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ctx->w0[3] = 0;
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ctx->w1[0] = 0;
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ctx->w1[1] = 0;
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ctx->w1[2] = 0;
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ctx->w1[3] = 0;
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ctx->w2[0] = 0;
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ctx->w2[1] = 0;
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ctx->w2[2] = 0;
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ctx->w2[3] = 0;
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ctx->w3[0] = 0;
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ctx->w3[1] = 0;
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ctx->w3[2] = 0;
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ctx->w3[3] = 0;
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ctx->w4[0] = 0;
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ctx->w4[1] = 0;
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ctx->w4[2] = 0;
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ctx->w4[3] = 0;
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ctx->w5[0] = 0;
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ctx->w5[1] = 0;
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ctx->w5[2] = 0;
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ctx->w5[3] = 0;
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ctx->w6[0] = 0;
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ctx->w6[1] = 0;
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ctx->w6[2] = 0;
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ctx->w6[3] = 0;
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ctx->w7[0] = 0;
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ctx->w7[1] = 0;
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ctx->w7[2] = 0;
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ctx->w7[3] = 0;
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}
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ctx->w7[1] = sav;
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ctx->w7[2] = 0;
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ctx->w7[3] = ctx->len * 8;
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sha512_transform (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->w4, ctx->w5, ctx->w6, ctx->w7, ctx->h);
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}
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KERNEL_FQ KERNEL_FA void m19200_init (KERN_ATTR_TMPS (qnx_sha512_tmp_t))
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{
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/**
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* base
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*/
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const u64 gid = get_global_id (0);
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if (gid >= GID_CNT) return;
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/**
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* init
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*/
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sha512_ctx_t sha512_ctx;
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sha512_init (&sha512_ctx);
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const u32 pw_len = pws[gid].pw_len;
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u32 w[64] = { 0 };
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for (u32 i = 0, idx = 0; i < pw_len; i += 4, idx += 1)
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{
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w[idx] = hc_swap32_S (pws[gid].i[idx]);
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}
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const u32 salt_len = salt_bufs[SALT_POS_HOST].salt_len;
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u32 s[64] = { 0 };
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for (u32 i = 0, idx = 0; i < salt_len; i += 4, idx += 1)
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{
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s[idx] = hc_swap32_S (salt_bufs[SALT_POS_HOST].salt_buf[idx]);
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}
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sha512_update (&sha512_ctx, s, salt_len);
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sha512_update (&sha512_ctx, w, pw_len);
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tmps[gid].sha512_ctx = sha512_ctx;
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tmps[gid].sav = 0;
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}
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KERNEL_FQ KERNEL_FA void m19200_loop (KERN_ATTR_TMPS (qnx_sha512_tmp_t))
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{
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/**
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* base
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*/
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const u64 gid = get_global_id (0);
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if (gid >= GID_CNT) return;
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const u32 pw_len = pws[gid].pw_len;
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u32 w[64] = { 0 };
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for (u32 i = 0, idx = 0; i < pw_len; i += 4, idx += 1)
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{
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w[idx] = hc_swap32_S (pws[gid].i[idx]);
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}
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sha512_ctx_t sha512_ctx = tmps[gid].sha512_ctx;
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u32 sav = tmps[gid].sav;
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for (u32 i = 0; i < LOOP_CNT; i++)
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{
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sav = sha512_update_qnxbug (&sha512_ctx, w, pw_len, sav);
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}
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tmps[gid].sha512_ctx = sha512_ctx;
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tmps[gid].sav = sav;
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}
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KERNEL_FQ KERNEL_FA void m19200_comp (KERN_ATTR_TMPS (qnx_sha512_tmp_t))
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{
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/**
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* modifier
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*/
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const u64 gid = get_global_id (0);
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const u64 lid = get_local_id (0);
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if (gid >= GID_CNT) return;
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sha512_ctx_t sha512_ctx = tmps[gid].sha512_ctx;
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sha512_final (&sha512_ctx);
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const u32 r0 = l32_from_64_S (hc_swap64_S (sha512_ctx.h[0]));
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const u32 r1 = h32_from_64_S (hc_swap64_S (sha512_ctx.h[0]));
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const u32 r2 = l32_from_64_S (hc_swap64_S (sha512_ctx.h[1]));
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const u32 r3 = h32_from_64_S (hc_swap64_S (sha512_ctx.h[1]));
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#define il_pos 0
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#ifdef KERNEL_STATIC
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#include COMPARE_M
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#endif
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// we should also handle the buggy qnx sha512 implementation
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// see https://github.com/magnumripper/JohnTheRipper/blob/bleeding-jumbo/src/sha2.c#L578-L595
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sha512_ctx_t sha512_ctx2 = tmps[gid].sha512_ctx;
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u32 sav = tmps[gid].sav;
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if (sha512_ctx2.len >= 116)
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{
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sha512_final_qnxbug (&sha512_ctx2, sav);
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const u32 r0 = l32_from_64_S (hc_swap64_S (sha512_ctx2.h[0]));
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const u32 r1 = h32_from_64_S (hc_swap64_S (sha512_ctx2.h[0]));
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const u32 r2 = l32_from_64_S (hc_swap64_S (sha512_ctx2.h[1]));
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const u32 r3 = h32_from_64_S (hc_swap64_S (sha512_ctx2.h[1]));
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#ifdef KERNEL_STATIC
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#include COMPARE_M
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#endif
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}
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}
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