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15ada5124e
Updated kernel declarations from "KERNEL_FQ void HC_ATTR_SEQ" to "KERNEL_FQ KERNEL_FA void". Please update your custom plugin kernels accordingly. Added spilling size as a factor in calculating usable memory per device. This is based on undocumented variables and may not be 100% accurate, but it works well in practice. Added a compiler hint to scrypt-based kernels indicating the guaranteed maximum thread count per kernel invocation. Removed redundant kernel code 29800, as it is identical to 27700, and updated the plugin.
299 lines
8.0 KiB
Common Lisp
299 lines
8.0 KiB
Common Lisp
/**
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* Author......: See docs/credits.txt
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* License.....: MIT
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*/
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#define NEW_SIMD_CODE
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#ifdef KERNEL_STATIC
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#include M2S(INCLUDE_PATH/inc_vendor.h)
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#include M2S(INCLUDE_PATH/inc_types.h)
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#include M2S(INCLUDE_PATH/inc_platform.cl)
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#include M2S(INCLUDE_PATH/inc_common.cl)
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#include M2S(INCLUDE_PATH/inc_simd.cl)
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#include M2S(INCLUDE_PATH/inc_hash_md5.cl)
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#endif
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DECLSPEC void cram_md5_transform_vector (PRIVATE_AS const u32x *w0, PRIVATE_AS const u32x *w1, PRIVATE_AS const u32x *w2, PRIVATE_AS const u32x *w3, PRIVATE_AS u32x *digest)
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{
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u32x a = digest[0];
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u32x b = digest[1];
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u32x c = digest[2];
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u32x d = digest[3];
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u32x w0_t = w0[0] ^ 0x5c5c5c5c;
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u32x w1_t = w0[1] ^ 0x5c5c5c5c;
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u32x w2_t = w0[2] ^ 0x5c5c5c5c;
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u32x w3_t = w0[3] ^ 0x5c5c5c5c;
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u32x w4_t = w1[0] ^ 0x5c5c5c5c;
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u32x w5_t = w1[1] ^ 0x5c5c5c5c;
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u32x w6_t = w1[2] ^ 0x5c5c5c5c;
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u32x w7_t = w1[3] ^ 0x5c5c5c5c;
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u32x w8_t = w2[0] ^ 0x5c5c5c5c;
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u32x w9_t = w2[1] ^ 0x5c5c5c5c;
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u32x wa_t = w2[2] ^ 0x5c5c5c5c;
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u32x wb_t = w2[3] ^ 0x5c5c5c5c;
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u32x wc_t = w3[0] ^ 0x5c5c5c5c;
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u32x wd_t = w3[1] ^ 0x5c5c5c5c;
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u32x we_t = w3[2] ^ 0x5c5c5c5c;
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u32x wf_t = w3[3] ^ 0x5c5c5c5c;
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MD5_STEP (MD5_Fo, a, b, c, d, w0_t, MD5C00, MD5S00);
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MD5_STEP (MD5_Fo, d, a, b, c, w1_t, MD5C01, MD5S01);
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MD5_STEP (MD5_Fo, c, d, a, b, w2_t, MD5C02, MD5S02);
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MD5_STEP (MD5_Fo, b, c, d, a, w3_t, MD5C03, MD5S03);
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MD5_STEP (MD5_Fo, a, b, c, d, w4_t, MD5C04, MD5S00);
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MD5_STEP (MD5_Fo, d, a, b, c, w5_t, MD5C05, MD5S01);
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MD5_STEP (MD5_Fo, c, d, a, b, w6_t, MD5C06, MD5S02);
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MD5_STEP (MD5_Fo, b, c, d, a, w7_t, MD5C07, MD5S03);
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MD5_STEP (MD5_Fo, a, b, c, d, w8_t, MD5C08, MD5S00);
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MD5_STEP (MD5_Fo, d, a, b, c, w9_t, MD5C09, MD5S01);
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MD5_STEP (MD5_Fo, c, d, a, b, wa_t, MD5C0a, MD5S02);
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MD5_STEP (MD5_Fo, b, c, d, a, wb_t, MD5C0b, MD5S03);
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MD5_STEP (MD5_Fo, a, b, c, d, wc_t, MD5C0c, MD5S00);
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MD5_STEP (MD5_Fo, d, a, b, c, wd_t, MD5C0d, MD5S01);
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MD5_STEP (MD5_Fo, c, d, a, b, we_t, MD5C0e, MD5S02);
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MD5_STEP (MD5_Fo, b, c, d, a, wf_t, MD5C0f, MD5S03);
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MD5_STEP (MD5_Go, a, b, c, d, w1_t, MD5C10, MD5S10);
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MD5_STEP (MD5_Go, d, a, b, c, w6_t, MD5C11, MD5S11);
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MD5_STEP (MD5_Go, c, d, a, b, wb_t, MD5C12, MD5S12);
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MD5_STEP (MD5_Go, b, c, d, a, w0_t, MD5C13, MD5S13);
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MD5_STEP (MD5_Go, a, b, c, d, w5_t, MD5C14, MD5S10);
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MD5_STEP (MD5_Go, d, a, b, c, wa_t, MD5C15, MD5S11);
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MD5_STEP (MD5_Go, c, d, a, b, wf_t, MD5C16, MD5S12);
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MD5_STEP (MD5_Go, b, c, d, a, w4_t, MD5C17, MD5S13);
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MD5_STEP (MD5_Go, a, b, c, d, w9_t, MD5C18, MD5S10);
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MD5_STEP (MD5_Go, d, a, b, c, we_t, MD5C19, MD5S11);
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MD5_STEP (MD5_Go, c, d, a, b, w3_t, MD5C1a, MD5S12);
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MD5_STEP (MD5_Go, b, c, d, a, w8_t, MD5C1b, MD5S13);
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MD5_STEP (MD5_Go, a, b, c, d, wd_t, MD5C1c, MD5S10);
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MD5_STEP (MD5_Go, d, a, b, c, w2_t, MD5C1d, MD5S11);
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MD5_STEP (MD5_Go, c, d, a, b, w7_t, MD5C1e, MD5S12);
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MD5_STEP (MD5_Go, b, c, d, a, wc_t, MD5C1f, MD5S13);
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u32x t;
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MD5_STEP (MD5_H1, a, b, c, d, w5_t, MD5C20, MD5S20);
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MD5_STEP (MD5_H2, d, a, b, c, w8_t, MD5C21, MD5S21);
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MD5_STEP (MD5_H1, c, d, a, b, wb_t, MD5C22, MD5S22);
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MD5_STEP (MD5_H2, b, c, d, a, we_t, MD5C23, MD5S23);
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MD5_STEP (MD5_H1, a, b, c, d, w1_t, MD5C24, MD5S20);
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MD5_STEP (MD5_H2, d, a, b, c, w4_t, MD5C25, MD5S21);
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MD5_STEP (MD5_H1, c, d, a, b, w7_t, MD5C26, MD5S22);
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MD5_STEP (MD5_H2, b, c, d, a, wa_t, MD5C27, MD5S23);
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MD5_STEP (MD5_H1, a, b, c, d, wd_t, MD5C28, MD5S20);
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MD5_STEP (MD5_H2, d, a, b, c, w0_t, MD5C29, MD5S21);
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MD5_STEP (MD5_H1, c, d, a, b, w3_t, MD5C2a, MD5S22);
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MD5_STEP (MD5_H2, b, c, d, a, w6_t, MD5C2b, MD5S23);
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MD5_STEP (MD5_H1, a, b, c, d, w9_t, MD5C2c, MD5S20);
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MD5_STEP (MD5_H2, d, a, b, c, wc_t, MD5C2d, MD5S21);
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MD5_STEP (MD5_H1, c, d, a, b, wf_t, MD5C2e, MD5S22);
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MD5_STEP (MD5_H2, b, c, d, a, w2_t, MD5C2f, MD5S23);
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MD5_STEP (MD5_I , a, b, c, d, w0_t, MD5C30, MD5S30);
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MD5_STEP (MD5_I , d, a, b, c, w7_t, MD5C31, MD5S31);
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MD5_STEP (MD5_I , c, d, a, b, we_t, MD5C32, MD5S32);
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MD5_STEP (MD5_I , b, c, d, a, w5_t, MD5C33, MD5S33);
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MD5_STEP (MD5_I , a, b, c, d, wc_t, MD5C34, MD5S30);
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MD5_STEP (MD5_I , d, a, b, c, w3_t, MD5C35, MD5S31);
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MD5_STEP (MD5_I , c, d, a, b, wa_t, MD5C36, MD5S32);
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MD5_STEP (MD5_I , b, c, d, a, w1_t, MD5C37, MD5S33);
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MD5_STEP (MD5_I , a, b, c, d, w8_t, MD5C38, MD5S30);
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MD5_STEP (MD5_I , d, a, b, c, wf_t, MD5C39, MD5S31);
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MD5_STEP (MD5_I , c, d, a, b, w6_t, MD5C3a, MD5S32);
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MD5_STEP (MD5_I , b, c, d, a, wd_t, MD5C3b, MD5S33);
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MD5_STEP (MD5_I , a, b, c, d, w4_t, MD5C3c, MD5S30);
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MD5_STEP (MD5_I , d, a, b, c, wb_t, MD5C3d, MD5S31);
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MD5_STEP (MD5_I , c, d, a, b, w2_t, MD5C3e, MD5S32);
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MD5_STEP (MD5_I , b, c, d, a, w9_t, MD5C3f, MD5S33);
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digest[0] += a;
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digest[1] += b;
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digest[2] += c;
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digest[3] += d;
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}
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DECLSPEC void cram_md5_update_vector_64 (PRIVATE_AS md5_ctx_vector_t *ctx, PRIVATE_AS u32x *w0, PRIVATE_AS u32x *w1, PRIVATE_AS u32x *w2, PRIVATE_AS u32x *w3, const int len)
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{
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if (len == 0) return;
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const int pos = ctx->len & 63;
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ctx->len += len;
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switch_buffer_by_offset_le (w0, w1, w2, w3, pos);
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ctx->w0[0] |= w0[0];
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ctx->w0[1] |= w0[1];
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ctx->w0[2] |= w0[2];
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ctx->w0[3] |= w0[3];
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ctx->w1[0] |= w1[0];
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ctx->w1[1] |= w1[1];
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ctx->w1[2] |= w1[2];
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ctx->w1[3] |= w1[3];
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ctx->w2[0] |= w2[0];
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ctx->w2[1] |= w2[1];
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ctx->w2[2] |= w2[2];
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ctx->w2[3] |= w2[3];
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ctx->w3[0] |= w3[0];
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ctx->w3[1] |= w3[1];
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ctx->w3[2] |= w3[2];
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ctx->w3[3] |= w3[3];
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}
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DECLSPEC void cram_md5_update_vector (PRIVATE_AS md5_ctx_vector_t *ctx, PRIVATE_AS const u32x *w, const int len)
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{
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u32x w0[4];
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u32x w1[4];
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u32x w2[4];
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u32x w3[4];
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w0[0] = w[0];
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w0[1] = w[1];
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w0[2] = w[2];
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w0[3] = w[3];
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w1[0] = w[4];
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w1[1] = w[5];
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w1[2] = w[6];
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w1[3] = w[7];
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w2[0] = w[8];
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w2[1] = w[9];
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w2[2] = w[10];
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w2[3] = w[11];
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w3[0] = w[12];
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w3[1] = w[13];
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w3[2] = w[14];
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w3[3] = w[15];
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cram_md5_update_vector_64 (ctx, w0, w1, w2, w3, len);
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}
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DECLSPEC void cram_md5_final_vector (PRIVATE_AS md5_ctx_vector_t *ctx)
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{
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cram_md5_transform_vector (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->h);
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}
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KERNEL_FQ KERNEL_FA void m16400_mxx (KERN_ATTR_VECTOR ())
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{
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/**
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* modifier
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*/
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const u64 lid = get_local_id (0);
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const u64 gid = get_global_id (0);
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if (gid >= GID_CNT) return;
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/**
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* base
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*/
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const u32 pw_len = pws[gid].pw_len;
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u32x w[64] = { 0 };
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for (u32 i = 0, idx = 0; i < pw_len; i += 4, idx += 1)
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{
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w[idx] = pws[gid].i[idx];
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}
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/**
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* loop
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*/
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u32x w0l = w[0];
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for (u32 il_pos = 0; il_pos < IL_CNT; il_pos += VECT_SIZE)
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{
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const u32x w0r = words_buf_r[il_pos / VECT_SIZE];
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const u32x w0 = w0l | w0r;
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w[0] = w0;
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md5_ctx_vector_t ctx;
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md5_init_vector (&ctx);
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cram_md5_update_vector (&ctx, w, pw_len);
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cram_md5_final_vector (&ctx);
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const u32x r0 = ctx.h[DGST_R0];
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const u32x r1 = ctx.h[DGST_R1];
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const u32x r2 = ctx.h[DGST_R2];
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const u32x r3 = ctx.h[DGST_R3];
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COMPARE_M_SIMD (r0, r1, r2, r3);
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}
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}
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KERNEL_FQ KERNEL_FA void m16400_sxx (KERN_ATTR_VECTOR ())
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{
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/**
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* modifier
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*/
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const u64 lid = get_local_id (0);
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const u64 gid = get_global_id (0);
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if (gid >= GID_CNT) return;
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/**
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* digest
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*/
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const u32 search[4] =
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{
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digests_buf[DIGESTS_OFFSET_HOST].digest_buf[DGST_R0],
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digests_buf[DIGESTS_OFFSET_HOST].digest_buf[DGST_R1],
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digests_buf[DIGESTS_OFFSET_HOST].digest_buf[DGST_R2],
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digests_buf[DIGESTS_OFFSET_HOST].digest_buf[DGST_R3]
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};
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/**
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* base
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*/
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const u32 pw_len = pws[gid].pw_len;
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u32x w[64] = { 0 };
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for (u32 i = 0, idx = 0; i < pw_len; i += 4, idx += 1)
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{
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w[idx] = pws[gid].i[idx];
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}
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/**
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* loop
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*/
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u32x w0l = w[0];
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for (u32 il_pos = 0; il_pos < IL_CNT; il_pos += VECT_SIZE)
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{
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const u32x w0r = words_buf_r[il_pos / VECT_SIZE];
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const u32x w0 = w0l | w0r;
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w[0] = w0;
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md5_ctx_vector_t ctx;
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md5_init_vector (&ctx);
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cram_md5_update_vector (&ctx, w, pw_len);
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cram_md5_final_vector (&ctx);
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const u32x r0 = ctx.h[DGST_R0];
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const u32x r1 = ctx.h[DGST_R1];
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const u32x r2 = ctx.h[DGST_R2];
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const u32x r3 = ctx.h[DGST_R3];
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COMPARE_S_SIMD (r0, r1, r2, r3);
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}
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}
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