1
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mirror of https://github.com/hashcat/hashcat.git synced 2024-11-02 05:30:19 +00:00
hashcat/OpenCL
2019-12-07 11:29:39 +01:00
..
amp_a0.cl
amp_a1.cl
amp_a3.cl
inc_cipher_aes.cl
inc_cipher_aes.h
inc_cipher_camellia.cl
inc_cipher_camellia.h
inc_cipher_des.cl
inc_cipher_des.h
inc_cipher_kuznyechik.cl
inc_cipher_kuznyechik.h
inc_cipher_serpent.cl
inc_cipher_serpent.h
inc_cipher_twofish.cl
inc_cipher_twofish.h
inc_common.cl Remove some double code 2019-11-22 23:12:57 +01:00
inc_common.h Added -m 21700 = Electrum 4 and -m 21800 = Electrum 5 2019-11-16 10:48:52 +01:00
inc_comp_multi_bs.cl
inc_comp_multi_bs.h
inc_comp_multi.cl
inc_comp_multi.h
inc_comp_single_bs.cl
inc_comp_single_bs.h
inc_comp_single.cl
inc_comp_single.h
inc_diskcryptor_xts.cl
inc_diskcryptor_xts.h
inc_ecc_secp256k1.cl Use a different code for mod_512() to help some NV GPU to not hang 2019-12-07 11:29:39 +01:00
inc_ecc_secp256k1.h get rid of compiler warning about incompatible types in secp256k1 kernel include 2019-12-05 14:37:00 +01:00
inc_hash_md4.cl
inc_hash_md4.h
inc_hash_md5.cl
inc_hash_md5.h
inc_hash_ripemd160.cl
inc_hash_ripemd160.h
inc_hash_sha1.cl Small optimization for sha1_transform, sha1,transform_vector. 2019-11-29 08:10:26 +01:00
inc_hash_sha1.h
inc_hash_sha224.cl
inc_hash_sha224.h
inc_hash_sha256.cl
inc_hash_sha256.h
inc_hash_sha384.cl
inc_hash_sha384.h
inc_hash_sha512.cl
inc_hash_sha512.h update SolarWinds Orion patch (2) 2019-08-06 20:23:37 +02:00
inc_hash_streebog256.cl
inc_hash_streebog256.h
inc_hash_streebog512.cl
inc_hash_streebog512.h
inc_hash_whirlpool.cl
inc_hash_whirlpool.h
inc_luks_aes.cl
inc_luks_aes.h
inc_luks_af.cl
inc_luks_af.h
inc_luks_essiv.cl
inc_luks_essiv.h
inc_luks_serpent.cl
inc_luks_serpent.h
inc_luks_twofish.cl
inc_luks_twofish.h
inc_luks_xts.cl
inc_luks_xts.h
inc_platform.cl Some more ROCm performance tuning 2019-06-20 10:04:31 +02:00
inc_platform.h Some more ROCm performance tuning 2019-06-20 10:04:31 +02:00
inc_rp_optimized.cl Change out-of-boundary fix in order to re-enable password length 256 with rules in pure kernel mode 2019-11-26 11:26:56 +01:00
inc_rp_optimized.h
inc_rp.cl Change out-of-boundary fix in order to re-enable password length 256 with rules in pure kernel mode 2019-11-26 11:26:56 +01:00
inc_rp.h
inc_scalar.cl
inc_scalar.h
inc_simd.cl
inc_simd.h
inc_truecrypt_crc32.cl
inc_truecrypt_crc32.h
inc_truecrypt_keyfile.cl
inc_truecrypt_keyfile.h
inc_truecrypt_xts.cl
inc_truecrypt_xts.h
inc_types.h
inc_vendor.h
inc_veracrypt_xts.cl
inc_veracrypt_xts.h
inc_zip_inflate.cl electrum 4/5: improve speed (rm hook) 2019-12-05 10:43:42 +01:00
m00000_a0-optimized.cl
m00000_a0-pure.cl
m00000_a1-optimized.cl
m00000_a1-pure.cl
m00000_a3-optimized.cl
m00000_a3-pure.cl
m00010_a0-optimized.cl
m00010_a0-pure.cl
m00010_a1-optimized.cl
m00010_a1-pure.cl
m00010_a3-optimized.cl
m00010_a3-pure.cl
m00020_a0-optimized.cl
m00020_a0-pure.cl
m00020_a1-optimized.cl
m00020_a1-pure.cl
m00020_a3-optimized.cl
m00020_a3-pure.cl
m00030_a0-optimized.cl
m00030_a0-pure.cl
m00030_a1-optimized.cl
m00030_a1-pure.cl
m00030_a3-optimized.cl
m00030_a3-pure.cl
m00040_a0-optimized.cl
m00040_a0-pure.cl
m00040_a1-optimized.cl
m00040_a1-pure.cl
m00040_a3-optimized.cl
m00040_a3-pure.cl
m00050_a0-optimized.cl
m00050_a0-pure.cl
m00050_a1-optimized.cl
m00050_a1-pure.cl
m00050_a3-optimized.cl
m00050_a3-pure.cl
m00060_a0-optimized.cl
m00060_a0-pure.cl
m00060_a1-optimized.cl
m00060_a1-pure.cl
m00060_a3-optimized.cl
m00060_a3-pure.cl
m00100_a0-optimized.cl
m00100_a0-pure.cl
m00100_a1-optimized.cl
m00100_a1-pure.cl
m00100_a3-optimized.cl
m00100_a3-pure.cl
m00110_a0-optimized.cl
m00110_a0-pure.cl
m00110_a1-optimized.cl
m00110_a1-pure.cl
m00110_a3-optimized.cl
m00110_a3-pure.cl
m00120_a0-optimized.cl
m00120_a0-pure.cl
m00120_a1-optimized.cl
m00120_a1-pure.cl
m00120_a3-optimized.cl
m00120_a3-pure.cl
m00130_a0-optimized.cl
m00130_a0-pure.cl
m00130_a1-optimized.cl
m00130_a1-pure.cl
m00130_a3-optimized.cl
m00130_a3-pure.cl
m00140_a0-optimized.cl
m00140_a0-pure.cl
m00140_a1-optimized.cl
m00140_a1-pure.cl
m00140_a3-optimized.cl
m00140_a3-pure.cl
m00150_a0-optimized.cl
m00150_a0-pure.cl
m00150_a1-optimized.cl
m00150_a1-pure.cl
m00150_a3-optimized.cl
m00150_a3-pure.cl
m00160_a0-optimized.cl
m00160_a0-pure.cl
m00160_a1-optimized.cl
m00160_a1-pure.cl
m00160_a3-optimized.cl
m00160_a3-pure.cl
m00200_a0-optimized.cl
m00200_a1-optimized.cl
m00200_a3-optimized.cl
m00300_a0-optimized.cl
m00300_a0-pure.cl
m00300_a1-optimized.cl
m00300_a1-pure.cl
m00300_a3-optimized.cl
m00300_a3-pure.cl
m00400-optimized.cl
m00400-pure.cl
m00500-optimized.cl
m00500-pure.cl
m00600_a0-optimized.cl
m00600_a1-optimized.cl
m00600_a3-optimized.cl
m00900_a0-optimized.cl
m00900_a0-pure.cl
m00900_a1-optimized.cl
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m00900_a3-optimized.cl
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m01000_a0-optimized.cl
m01000_a0-pure.cl
m01000_a1-optimized.cl
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m01000_a3-optimized.cl
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m01100_a0-optimized.cl
m01100_a0-pure.cl
m01100_a1-optimized.cl
m01100_a1-pure.cl
m01100_a3-optimized.cl
m01100_a3-pure.cl
m01300_a0-optimized.cl
m01300_a0-pure.cl
m01300_a1-optimized.cl
m01300_a1-pure.cl
m01300_a3-optimized.cl
m01300_a3-pure.cl
m01400_a0-optimized.cl
m01400_a0-pure.cl
m01400_a1-optimized.cl
m01400_a1-pure.cl
m01400_a3-optimized.cl
m01400_a3-pure.cl
m01410_a0-optimized.cl
m01410_a0-pure.cl
m01410_a1-optimized.cl
m01410_a1-pure.cl
m01410_a3-optimized.cl
m01410_a3-pure.cl
m01420_a0-optimized.cl
m01420_a0-pure.cl
m01420_a1-optimized.cl
m01420_a1-pure.cl
m01420_a3-optimized.cl
m01420_a3-pure.cl
m01430_a0-optimized.cl
m01430_a0-pure.cl
m01430_a1-optimized.cl
m01430_a1-pure.cl
m01430_a3-optimized.cl
m01430_a3-pure.cl
m01440_a0-optimized.cl
m01440_a0-pure.cl
m01440_a1-optimized.cl
m01440_a1-pure.cl
m01440_a3-optimized.cl
m01440_a3-pure.cl
m01450_a0-optimized.cl
m01450_a0-pure.cl
m01450_a1-optimized.cl
m01450_a1-pure.cl
m01450_a3-optimized.cl
m01450_a3-pure.cl
m01460_a0-optimized.cl
m01460_a0-pure.cl
m01460_a1-optimized.cl
m01460_a1-pure.cl
m01460_a3-optimized.cl
m01460_a3-pure.cl
m01500_a0-pure.cl
m01500_a1-pure.cl
m01500_a3-pure.cl
m01600-optimized.cl
m01600-pure.cl
m01700_a0-optimized.cl
m01700_a0-pure.cl
m01700_a1-optimized.cl
m01700_a1-pure.cl
m01700_a3-optimized.cl
m01700_a3-pure.cl
m01710_a0-optimized.cl
m01710_a0-pure.cl
m01710_a1-optimized.cl
m01710_a1-pure.cl
m01710_a3-optimized.cl
m01710_a3-pure.cl
m01720_a0-optimized.cl
m01720_a0-pure.cl
m01720_a1-optimized.cl
m01720_a1-pure.cl
m01720_a3-optimized.cl
m01720_a3-pure.cl
m01730_a0-optimized.cl
m01730_a0-pure.cl
m01730_a1-optimized.cl
m01730_a1-pure.cl
m01730_a3-optimized.cl
m01730_a3-pure.cl
m01740_a0-optimized.cl
m01740_a0-pure.cl
m01740_a1-optimized.cl
m01740_a1-pure.cl
m01740_a3-optimized.cl
m01740_a3-pure.cl
m01750_a0-optimized.cl
m01750_a0-pure.cl
m01750_a1-optimized.cl
m01750_a1-pure.cl
m01750_a3-optimized.cl
m01750_a3-pure.cl
m01760_a0-optimized.cl
m01760_a0-pure.cl
m01760_a1-optimized.cl
m01760_a1-pure.cl
m01760_a3-optimized.cl
m01760_a3-pure.cl
m01800-optimized.cl
m01800-pure.cl
m02000_a0-pure.cl
m02000_a1-pure.cl
m02000_a3-pure.cl
m02100-pure.cl
m02400_a0-optimized.cl
m02400_a1-optimized.cl
m02400_a3-optimized.cl
m02410_a0-optimized.cl
m02410_a1-optimized.cl
m02410_a3-optimized.cl
m02500-pure.cl
m02501-pure.cl
m02610_a0-optimized.cl
m02610_a0-pure.cl
m02610_a1-optimized.cl
m02610_a1-pure.cl
m02610_a3-optimized.cl
m02610_a3-pure.cl
m02710_a0-optimized.cl
m02710_a1-optimized.cl
m02710_a3-optimized.cl
m02810_a0-optimized.cl
m02810_a0-pure.cl
m02810_a1-optimized.cl
m02810_a1-pure.cl
m02810_a3-optimized.cl
m02810_a3-pure.cl
m03000_a0-pure.cl
m03000_a1-pure.cl
m03000_a3-pure.cl
m03100_a0-optimized.cl
m03100_a1-optimized.cl
m03100_a3-optimized.cl
m03200-pure.cl Use __launch_bounds__ in CUDA as replacement for reqd_work_group_size() in OpenCL 2019-06-16 18:01:26 +02:00
m03710_a0-optimized.cl
m03710_a0-pure.cl
m03710_a1-optimized.cl
m03710_a1-pure.cl
m03710_a3-optimized.cl
m03710_a3-pure.cl
m03800_a0-optimized.cl
m03800_a0-pure.cl
m03800_a1-optimized.cl
m03800_a1-pure.cl
m03800_a3-optimized.cl
m03800_a3-pure.cl
m03910_a0-optimized.cl
m03910_a0-pure.cl
m03910_a1-optimized.cl
m03910_a1-pure.cl
m03910_a3-optimized.cl
m03910_a3-pure.cl
m04010_a0-optimized.cl
m04010_a0-pure.cl
m04010_a1-optimized.cl
m04010_a1-pure.cl
m04010_a3-optimized.cl
m04010_a3-pure.cl
m04110_a0-optimized.cl
m04110_a0-pure.cl
m04110_a1-optimized.cl
m04110_a1-pure.cl
m04110_a3-optimized.cl
m04110_a3-pure.cl
m04310_a0-optimized.cl
m04310_a0-pure.cl
m04310_a1-optimized.cl
m04310_a1-pure.cl
m04310_a3-optimized.cl
m04310_a3-pure.cl
m04400_a0-optimized.cl
m04400_a0-pure.cl
m04400_a1-optimized.cl
m04400_a1-pure.cl
m04400_a3-optimized.cl
m04400_a3-pure.cl
m04500_a0-optimized.cl
m04500_a0-pure.cl
m04500_a1-optimized.cl
m04500_a1-pure.cl
m04500_a3-optimized.cl
m04500_a3-pure.cl
m04520_a0-optimized.cl
m04520_a0-pure.cl
m04520_a1-optimized.cl
m04520_a1-pure.cl
m04520_a3-optimized.cl
m04520_a3-pure.cl
m04700_a0-optimized.cl
m04700_a0-pure.cl
m04700_a1-optimized.cl
m04700_a1-pure.cl
m04700_a3-optimized.cl
m04700_a3-pure.cl
m04710_a0-optimized.cl Added hash-mode 4711, Huawei sha1(md5(pass).salt) 2019-08-03 19:53:23 +02:00
m04710_a0-pure.cl switch hash-mode from 4710 to 20800 2019-07-30 14:44:17 +02:00
m04710_a1-optimized.cl Added hash-mode 4711, Huawei sha1(md5(pass).salt) 2019-08-03 19:53:23 +02:00
m04710_a1-pure.cl switch hash-mode from 4710 to 20800 2019-07-30 14:44:17 +02:00
m04710_a3-optimized.cl Added hash-mode 4711, Huawei sha1(md5(pass).salt) 2019-08-03 19:53:23 +02:00
m04710_a3-pure.cl Make -m 4710 more generic 2019-08-02 10:40:32 +02:00
m04800_a0-optimized.cl
m04800_a0-pure.cl
m04800_a1-optimized.cl
m04800_a1-pure.cl
m04800_a3-optimized.cl
m04800_a3-pure.cl
m04900_a0-optimized.cl
m04900_a0-pure.cl
m04900_a1-optimized.cl
m04900_a1-pure.cl
m04900_a3-optimized.cl
m04900_a3-pure.cl
m05100_a0-optimized.cl
m05100_a0-pure.cl
m05100_a1-optimized.cl
m05100_a1-pure.cl
m05100_a3-optimized.cl
m05100_a3-pure.cl
m05200-pure.cl
m05300_a0-optimized.cl
m05300_a0-pure.cl
m05300_a1-optimized.cl
m05300_a1-pure.cl
m05300_a3-optimized.cl
m05300_a3-pure.cl
m05400_a0-optimized.cl
m05400_a0-pure.cl
m05400_a1-optimized.cl
m05400_a1-pure.cl
m05400_a3-optimized.cl
m05400_a3-pure.cl
m05500_a0-optimized.cl
m05500_a0-pure.cl
m05500_a1-optimized.cl
m05500_a1-pure.cl
m05500_a3-optimized.cl
m05500_a3-pure.cl
m05600_a0-optimized.cl
m05600_a0-pure.cl
m05600_a1-optimized.cl
m05600_a1-pure.cl
m05600_a3-optimized.cl
m05600_a3-pure.cl
m05800-optimized.cl
m05800-pure.cl
m06000_a0-optimized.cl
m06000_a0-pure.cl
m06000_a1-optimized.cl
m06000_a1-pure.cl
m06000_a3-optimized.cl
m06000_a3-pure.cl
m06100_a0-optimized.cl
m06100_a0-pure.cl
m06100_a1-optimized.cl
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m06100_a3-optimized.cl
m06100_a3-pure.cl
m06211-pure.cl
m06212-pure.cl
m06213-pure.cl
m06221-pure.cl
m06222-pure.cl
m06223-pure.cl
m06231-pure.cl
m06232-pure.cl
m06233-pure.cl
m06300-optimized.cl
m06300-pure.cl
m06400-pure.cl
m06500-pure.cl
m06600-pure.cl
m06700-pure.cl
m06800-pure.cl
m06900_a0-optimized.cl
m06900_a1-optimized.cl
m06900_a3-optimized.cl
m07000_a0-optimized.cl
m07000_a0-pure.cl
m07000_a1-optimized.cl
m07000_a1-pure.cl
m07000_a3-optimized.cl
m07000_a3-pure.cl
m07100-pure.cl
m07300_a0-optimized.cl
m07300_a0-pure.cl
m07300_a1-optimized.cl
m07300_a1-pure.cl
m07300_a3-optimized.cl
m07300_a3-pure.cl
m07400-optimized.cl
m07400-pure.cl
m07500_a0-optimized.cl
m07500_a0-pure.cl
m07500_a1-optimized.cl
m07500_a1-pure.cl
m07500_a3-optimized.cl
m07500_a3-pure.cl
m07700_a0-optimized.cl Some more ROCm performance tuning for -m 77xx 2019-06-20 16:16:56 +02:00
m07700_a1-optimized.cl Some more ROCm performance tuning for -m 77xx 2019-06-20 16:16:56 +02:00
m07700_a3-optimized.cl Some more ROCm performance tuning for -m 77xx 2019-06-20 16:16:56 +02:00
m07701_a0-optimized.cl Some more ROCm performance tuning for -m 77xx 2019-06-20 16:16:56 +02:00
m07701_a1-optimized.cl Some more ROCm performance tuning for -m 77xx 2019-06-20 16:16:56 +02:00
m07701_a3-optimized.cl Some more ROCm performance tuning for -m 77xx 2019-06-20 16:16:56 +02:00
m07800_a0-optimized.cl
m07800_a1-optimized.cl
m07800_a3-optimized.cl
m07801_a0-optimized.cl
m07801_a1-optimized.cl
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m07900-pure.cl
m08000_a0-optimized.cl
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m08700_a0-optimized.cl
m08700_a1-optimized.cl
m08700_a3-optimized.cl
m08800-pure.cl
m08900-pure.cl Fix CUDA JiT compiler warning in SCRYPT based kernels 2019-08-05 12:41:17 +02:00
m09000-pure.cl Use __launch_bounds__ in CUDA as replacement for reqd_work_group_size() in OpenCL 2019-06-16 18:01:26 +02:00
m09100-pure.cl
m09400-pure.cl
m09500-pure.cl Fixed issue where multiple hashes with the same salt would fail to crack in module/kernel for 9500. Remove unused include in module for 9600. 2019-09-05 05:27:39 -05:00
m09600-pure.cl
m09700_a0-optimized.cl
m09700_a1-optimized.cl
m09700_a3-optimized.cl Fix cracking of -m 97xx hashes in -a 3 mode of passwords of length between 8-15 2019-08-22 14:26:48 +02:00
m09710_a0-optimized.cl
m09710_a1-optimized.cl
m09710_a3-optimized.cl
m09720_a0-optimized.cl
m09720_a1-optimized.cl
m09720_a3-optimized.cl Fix cracking of -m 97xx hashes in -a 3 mode of passwords of length between 8-15 2019-08-22 14:26:48 +02:00
m09800_a0-optimized.cl
m09800_a1-optimized.cl
m09800_a3-optimized.cl
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m10410_a0-optimized.cl
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m10700-optimized.cl
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m10800_a0-optimized.cl
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m11200_a0-pure.cl
m11200_a1-optimized.cl
m11200_a1-pure.cl
m11200_a3-optimized.cl
m11200_a3-pure.cl
m11300-pure.cl formatting: remove extra block/identation for -m 11300 2019-11-21 10:42:36 +01:00
m11400_a0-pure.cl
m11400_a1-pure.cl
m11400_a3-pure.cl
m11500_a0-optimized.cl Speed up -m 11500 in general 2019-06-04 12:15:34 +02:00
m11500_a1-optimized.cl Speed up -m 11500 in general 2019-06-04 12:15:34 +02:00
m11500_a3-optimized.cl Speed up -m 11500 in general 2019-06-04 12:15:34 +02:00
m11600-pure.cl
m11700_a0-optimized.cl
m11700_a0-pure.cl
m11700_a1-optimized.cl
m11700_a1-pure.cl
m11700_a3-optimized.cl
m11700_a3-pure.cl
m11750_a0-pure.cl
m11750_a1-pure.cl
m11750_a3-pure.cl
m11760_a0-pure.cl
m11760_a1-pure.cl
m11760_a3-pure.cl
m11800_a0-optimized.cl
m11800_a0-pure.cl
m11800_a1-optimized.cl
m11800_a1-pure.cl
m11800_a3-optimized.cl
m11800_a3-pure.cl
m11850_a0-pure.cl
m11850_a1-pure.cl
m11850_a3-pure.cl
m11860_a0-pure.cl
m11860_a1-pure.cl
m11860_a3-pure.cl
m11900-pure.cl
m12000-pure.cl
m12200-pure.cl
m12300-pure.cl
m12400-pure.cl
m12500-pure.cl
m12600_a0-optimized.cl
m12600_a0-pure.cl
m12600_a1-optimized.cl
m12600_a1-pure.cl
m12600_a3-optimized.cl
m12600_a3-pure.cl
m12700-pure.cl Fix KERNEL_STATIC check in -m 12700 kernel 2019-10-30 09:02:02 +01:00
m12800-pure.cl
m12900-pure.cl
m13000-pure.cl
m13100_a0-optimized.cl
m13100_a0-pure.cl
m13100_a1-optimized.cl
m13100_a1-pure.cl
m13100_a3-optimized.cl
m13100_a3-pure.cl
m13200-pure.cl
m13300_a0-optimized.cl
m13300_a0-pure.cl
m13300_a1-optimized.cl
m13300_a1-pure.cl
m13300_a3-optimized.cl
m13300_a3-pure.cl
m13400-pure.cl
m13500_a0-optimized.cl
m13500_a0-pure.cl
m13500_a1-optimized.cl
m13500_a1-pure.cl
m13500_a3-optimized.cl
m13500_a3-pure.cl
m13600-pure.cl WipZip cracking: Added two byte early reject, resulting in higher cracking speed 2019-06-16 11:41:42 +02:00
m13711-pure.cl
m13712-pure.cl
m13713-pure.cl
m13721-pure.cl
m13722-pure.cl
m13723-pure.cl
m13731-pure.cl
m13732-pure.cl
m13733-pure.cl
m13751-pure.cl
m13752-pure.cl
m13753-pure.cl
m13771-pure.cl
m13772-pure.cl
m13773-pure.cl
m13800_a0-optimized.cl
m13800_a0-pure.cl
m13800_a1-optimized.cl
m13800_a1-pure.cl
m13800_a3-optimized.cl
m13800_a3-pure.cl
m13900_a0-optimized.cl
m13900_a0-pure.cl
m13900_a1-optimized.cl
m13900_a1-pure.cl
m13900_a3-optimized.cl
m13900_a3-pure.cl
m14000_a0-pure.cl
m14000_a1-pure.cl
m14000_a3-pure.cl
m14100_a0-pure.cl
m14100_a1-pure.cl
m14100_a3-pure.cl
m14400_a0-optimized.cl
m14400_a0-pure.cl
m14400_a1-optimized.cl
m14400_a1-pure.cl
m14400_a3-optimized.cl
m14400_a3-pure.cl
m14611-pure.cl
m14612-pure.cl
m14613-pure.cl
m14621-pure.cl
m14622-pure.cl
m14623-pure.cl
m14631-pure.cl
m14632-pure.cl
m14633-pure.cl
m14641-pure.cl
m14642-pure.cl
m14643-pure.cl
m14700-pure.cl
m14800-pure.cl
m14900_a0-optimized.cl
m14900_a1-optimized.cl
m14900_a3-optimized.cl
m15000_a0-optimized.cl
m15000_a0-pure.cl
m15000_a1-optimized.cl
m15000_a1-pure.cl
m15000_a3-optimized.cl Speed up -m 15000 in optimized -a 3 mode 2019-06-04 10:52:28 +02:00
m15000_a3-pure.cl
m15100-pure.cl
m15300-pure.cl
m15400_a0-optimized.cl
m15400_a1-optimized.cl
m15400_a3-optimized.cl Fix -m 16100 in optimized -a 3 mode 2019-06-04 11:20:32 +02:00
m15500_a0-optimized.cl
m15500_a0-pure.cl
m15500_a1-optimized.cl
m15500_a1-pure.cl
m15500_a3-optimized.cl
m15500_a3-pure.cl
m15600-pure.cl
m15700-pure.cl Fix CUDA JiT compiler warning in SCRYPT based kernels 2019-08-05 12:41:17 +02:00
m15900-pure.cl
m16000_a0-pure.cl
m16000_a1-pure.cl
m16000_a3-pure.cl
m16100_a0-optimized.cl
m16100_a0-pure.cl
m16100_a1-optimized.cl
m16100_a1-pure.cl
m16100_a3-optimized.cl
m16100_a3-pure.cl
m16200-pure.cl
m16300-pure.cl
m16400_a0-optimized.cl
m16400_a0-pure.cl
m16400_a1-optimized.cl
m16400_a1-pure.cl
m16400_a3-optimized.cl
m16400_a3-pure.cl
m16511_a0-pure.cl
m16511_a1-pure.cl
m16511_a3-pure.cl
m16512_a0-pure.cl
m16512_a1-pure.cl
m16512_a3-pure.cl
m16513_a0-pure.cl
m16513_a1-pure.cl
m16513_a3-pure.cl
m16600_a0-optimized.cl
m16600_a0-pure.cl
m16600_a1-optimized.cl
m16600_a1-pure.cl
m16600_a3-optimized.cl
m16600_a3-pure.cl
m16800-pure.cl
m16801-pure.cl
m16900-pure.cl
m17200_a0-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17200_a1-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17200_a3-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17210_a0-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17210_a1-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17210_a3-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17220_a0-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17220_a1-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17220_a3-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17225_a0-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17225_a1-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17225_a3-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17230_a0-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17230_a1-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17230_a3-pure.cl pkzip: for u32 use MAX_DATA / 4 2019-06-07 19:42:28 +02:00
m17300_a0-optimized.cl
m17300_a1-optimized.cl
m17300_a3-optimized.cl
m17400_a0-optimized.cl
m17400_a1-optimized.cl
m17400_a3-optimized.cl
m17500_a0-optimized.cl
m17500_a1-optimized.cl
m17500_a3-optimized.cl
m17600_a0-optimized.cl
m17600_a1-optimized.cl
m17600_a3-optimized.cl
m17700_a0-optimized.cl
m17700_a1-optimized.cl
m17700_a3-optimized.cl
m17800_a0-optimized.cl
m17800_a1-optimized.cl
m17800_a3-optimized.cl
m17900_a0-optimized.cl
m17900_a1-optimized.cl
m17900_a3-optimized.cl
m18000_a0-optimized.cl
m18000_a1-optimized.cl
m18000_a3-optimized.cl
m18100_a0-pure.cl
m18100_a1-pure.cl
m18100_a3-pure.cl
m18200_a0-optimized.cl
m18200_a0-pure.cl
m18200_a1-optimized.cl
m18200_a1-pure.cl
m18200_a3-optimized.cl
m18200_a3-pure.cl
m18300-pure.cl
m18400-pure.cl
m18500_a0-pure.cl
m18500_a1-pure.cl
m18500_a3-pure.cl
m18600-pure.cl Use __launch_bounds__ in CUDA as replacement for reqd_work_group_size() in OpenCL 2019-06-16 18:01:26 +02:00
m18700_a0-optimized.cl
m18700_a0-pure.cl
m18700_a1-optimized.cl
m18700_a1-pure.cl
m18700_a3-optimized.cl
m18700_a3-pure.cl
m18800-pure.cl
m18900-pure.cl
m19000-pure.cl
m19100-pure.cl
m19200-pure.cl
m19300_a0-pure.cl Speed up -m 19300 in general 2019-06-06 15:02:22 +02:00
m19300_a1-pure.cl Speed up -m 19300 in general 2019-06-06 15:02:22 +02:00
m19300_a3-pure.cl Speed up -m 19300 in general 2019-06-06 15:02:22 +02:00
m19500_a0-pure.cl
m19500_a1-pure.cl
m19500_a3-pure.cl
m19600-pure.cl
m19700-pure.cl
m19800-pure.cl
m19900-pure.cl
m20011-pure.cl
m20012-pure.cl
m20013-pure.cl
m20500_a0-pure.cl minor: some code formatting changes for PKZIP 2019-06-07 17:24:13 +02:00
m20500_a1-pure.cl minor: some code formatting changes for PKZIP 2019-06-07 17:24:13 +02:00
m20500_a3-pure.cl minor: some code formatting changes for PKZIP 2019-06-07 17:24:13 +02:00
m20510_a0-pure.cl minor: some code formatting changes for PKZIP 2019-06-07 17:24:13 +02:00
m20510_a1-pure.cl minor: some code formatting changes for PKZIP 2019-06-07 17:24:13 +02:00
m20510_a3-pure.cl minor: some code formatting changes for PKZIP 2019-06-07 17:24:13 +02:00
m20600-pure.cl fix kernel 20600 build error, issue #2094 2019-07-11 18:01:54 +02:00
m20710_a0-optimized.cl update AuthMe patch (3) 2019-08-03 02:37:43 +02:00
m20710_a0-pure.cl update AuthMe patch (1) 2019-07-31 17:36:31 +02:00
m20710_a1-optimized.cl update AuthMe patch (3) 2019-08-03 02:37:43 +02:00
m20710_a1-pure.cl update AuthMe patch (1) 2019-07-31 17:36:31 +02:00
m20710_a3-optimized.cl update AuthMe patch (3) 2019-08-03 02:37:43 +02:00
m20710_a3-pure.cl update AuthMe patch (1) 2019-07-31 17:36:31 +02:00
m20800_a0-optimized.cl switch hash-mode from 4710 to 20800 2019-07-30 14:44:17 +02:00
m20800_a0-pure.cl switch hash-mode from 4710 to 20800 2019-07-30 14:44:17 +02:00
m20800_a1-optimized.cl switch hash-mode from 4710 to 20800 2019-07-30 14:44:17 +02:00
m20800_a1-pure.cl switch hash-mode from 4710 to 20800 2019-07-30 14:44:17 +02:00
m20800_a3-optimized.cl switch hash-mode from 4710 to 20800 2019-07-30 14:44:17 +02:00
m20800_a3-pure.cl switch hash-mode from 4710 to 20800 2019-07-30 14:44:17 +02:00
m20900_a0-optimized.cl switch hash-mode from 4410 to 20900 2019-07-30 15:08:55 +02:00
m20900_a0-pure.cl switch hash-mode from 4410 to 20900 2019-07-30 15:08:55 +02:00
m20900_a1-optimized.cl switch hash-mode from 4410 to 20900 2019-07-30 15:08:55 +02:00
m20900_a1-pure.cl switch hash-mode from 4410 to 20900 2019-07-30 15:08:55 +02:00
m20900_a3-optimized.cl switch hash-mode from 4410 to 20900 2019-07-30 15:08:55 +02:00
m20900_a3-pure.cl switch hash-mode from 4410 to 20900 2019-07-30 15:08:55 +02:00
m21000_a0-optimized.cl switch hash-mode from 1770 to 21000 2019-07-30 15:15:49 +02:00
m21000_a0-pure.cl switch hash-mode from 1770 to 21000 2019-07-30 15:15:49 +02:00
m21000_a1-optimized.cl switch hash-mode from 1770 to 21000 2019-07-30 15:15:49 +02:00
m21000_a1-pure.cl switch hash-mode from 1770 to 21000 2019-07-30 15:15:49 +02:00
m21000_a3-optimized.cl switch hash-mode from 1770 to 21000 2019-07-30 15:15:49 +02:00
m21000_a3-pure.cl fix bug in 21000 a3 kernel 2019-07-31 15:21:03 +02:00
m21100_a0-optimized.cl Added hash-mode 21100 optimized kernels 2019-08-01 02:38:43 +02:00
m21100_a0-pure.cl switch hash-mode from 4720 to 21100 2019-07-30 15:19:22 +02:00
m21100_a1-optimized.cl Added hash-mode 21100 optimized kernels 2019-08-01 02:38:43 +02:00
m21100_a1-pure.cl switch hash-mode from 4720 to 21100 2019-07-30 15:19:22 +02:00
m21100_a3-optimized.cl Added hash-mode 21100 optimized kernels 2019-08-01 02:38:43 +02:00
m21100_a3-pure.cl switch hash-mode from 4720 to 21100 2019-07-30 15:19:22 +02:00
m21200_a0-optimized.cl Added hash-mode 21200 optimized kernels 2019-08-01 05:17:11 +02:00
m21200_a0-pure.cl optimizing 21200 pure kernels: move sha1(salt) outside the loop 2019-08-01 03:10:47 +02:00
m21200_a1-optimized.cl Added hash-mode 21200 optimized kernels 2019-08-01 05:17:11 +02:00
m21200_a1-pure.cl optimizing 21200 pure kernels: move sha1(salt) outside the loop 2019-08-01 03:10:47 +02:00
m21200_a3-optimized.cl removed the debug printf 2019-08-05 13:14:29 +02:00
m21200_a3-pure.cl optimizing 21200 pure kernels: move sha1(salt) outside the loop 2019-08-01 03:10:47 +02:00
m21300_a0-pure.cl switch hash-mode from 4430 to 21300 2019-07-30 15:26:07 +02:00
m21300_a1-pure.cl switch hash-mode from 4430 to 21300 2019-07-30 15:26:07 +02:00
m21300_a3-pure.cl fix bug in 21300 a3 kernel 2019-07-31 14:34:18 +02:00
m21400_a0-optimized.cl switch hash-mode from 1470 to 21400, cleanup credits/readme/changes txt 2019-07-31 15:39:16 +02:00
m21400_a0-pure.cl switch hash-mode from 1470 to 21400, cleanup credits/readme/changes txt 2019-07-31 15:39:16 +02:00
m21400_a1-optimized.cl switch hash-mode from 1470 to 21400, cleanup credits/readme/changes txt 2019-07-31 15:39:16 +02:00
m21400_a1-pure.cl switch hash-mode from 1470 to 21400, cleanup credits/readme/changes txt 2019-07-31 15:39:16 +02:00
m21400_a3-optimized.cl switch hash-mode from 1470 to 21400, cleanup credits/readme/changes txt 2019-07-31 15:39:16 +02:00
m21400_a3-pure.cl switch hash-mode from 1470 to 21400, cleanup credits/readme/changes txt 2019-07-31 15:39:16 +02:00
m21500-pure.cl Fix some code in -m 21500 2019-08-08 10:47:09 +02:00
m21600-pure.cl Fix -m 21600 default hash length 2019-11-27 09:03:17 +01:00
m21700-pure.cl electrum 4/5: improve speed (rm hook) 2019-12-05 10:43:42 +01:00
m21800-pure.cl electrum 4/5: improve speed (rm hook) 2019-12-05 10:43:42 +01:00
markov_be.cl
markov_le.cl