mirror of
https://github.com/hashcat/hashcat.git
synced 2025-07-10 00:28:11 +00:00
573 lines
20 KiB
C++
573 lines
20 KiB
C++
#ifndef SSE2NEONTEST_H
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#define SSE2NEONTEST_H
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#include "common.h"
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#define INTRIN_LIST \
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/* MMX */ \
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_(mm_empty) \
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/* SSE */ \
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_(mm_add_ps) \
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_(mm_add_ss) \
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_(mm_and_ps) \
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_(mm_andnot_ps) \
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_(mm_avg_pu16) \
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_(mm_avg_pu8) \
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_(mm_cmpeq_ps) \
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_(mm_cmpeq_ss) \
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_(mm_cmpge_ps) \
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_(mm_cmpge_ss) \
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_(mm_cmpgt_ps) \
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_(mm_cmpgt_ss) \
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_(mm_cmple_ps) \
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_(mm_cmple_ss) \
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_(mm_cmplt_ps) \
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_(mm_cmplt_ss) \
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_(mm_cmpneq_ps) \
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_(mm_cmpneq_ss) \
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_(mm_cmpnge_ps) \
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_(mm_cmpnge_ss) \
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_(mm_cmpngt_ps) \
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_(mm_cmpngt_ss) \
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_(mm_cmpnle_ps) \
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_(mm_cmpnle_ss) \
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_(mm_cmpnlt_ps) \
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_(mm_cmpnlt_ss) \
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_(mm_cmpord_ps) \
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_(mm_cmpord_ss) \
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_(mm_cmpunord_ps) \
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_(mm_cmpunord_ss) \
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_(mm_comieq_ss) \
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_(mm_comige_ss) \
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_(mm_comigt_ss) \
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_(mm_comile_ss) \
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_(mm_comilt_ss) \
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_(mm_comineq_ss) \
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_(mm_cvt_pi2ps) \
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_(mm_cvt_ps2pi) \
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_(mm_cvt_si2ss) \
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_(mm_cvt_ss2si) \
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_(mm_cvtpi16_ps) \
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_(mm_cvtpi32_ps) \
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_(mm_cvtpi32x2_ps) \
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_(mm_cvtpi8_ps) \
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_(mm_cvtps_pi16) \
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_(mm_cvtps_pi32) \
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_(mm_cvtps_pi8) \
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_(mm_cvtpu16_ps) \
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_(mm_cvtpu8_ps) \
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_(mm_cvtsi32_ss) \
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_(mm_cvtsi64_ss) \
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_(mm_cvtss_f32) \
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_(mm_cvtss_si32) \
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_(mm_cvtss_si64) \
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_(mm_cvtt_ps2pi) \
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_(mm_cvtt_ss2si) \
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_(mm_cvttps_pi32) \
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_(mm_cvttss_si32) \
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_(mm_cvttss_si64) \
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_(mm_div_ps) \
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_(mm_div_ss) \
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_(mm_extract_pi16) \
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_(mm_free) \
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_(mm_get_flush_zero_mode) \
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_(mm_get_rounding_mode) \
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_(mm_getcsr) \
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_(mm_insert_pi16) \
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_(mm_load_ps) \
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_(mm_load_ps1) \
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_(mm_load_ss) \
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_(mm_load1_ps) \
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_(mm_loadh_pi) \
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_(mm_loadl_pi) \
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_(mm_loadr_ps) \
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_(mm_loadu_ps) \
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_(mm_loadu_si16) \
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_(mm_loadu_si64) \
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_(mm_malloc) \
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_(mm_maskmove_si64) \
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_(m_maskmovq) \
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_(mm_max_pi16) \
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_(mm_max_ps) \
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_(mm_max_pu8) \
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_(mm_max_ss) \
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_(mm_min_pi16) \
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_(mm_min_ps) \
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_(mm_min_pu8) \
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_(mm_min_ss) \
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_(mm_move_ss) \
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_(mm_movehl_ps) \
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_(mm_movelh_ps) \
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_(mm_movemask_pi8) \
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_(mm_movemask_ps) \
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_(mm_mul_ps) \
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_(mm_mul_ss) \
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_(mm_mulhi_pu16) \
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_(mm_or_ps) \
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_(m_pavgb) \
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_(m_pavgw) \
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_(m_pextrw) \
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_(m_pinsrw) \
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_(m_pmaxsw) \
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_(m_pmaxub) \
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_(m_pminsw) \
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_(m_pminub) \
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_(m_pmovmskb) \
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_(m_pmulhuw) \
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_(mm_prefetch) \
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_(m_psadbw) \
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_(m_pshufw) \
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_(mm_rcp_ps) \
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_(mm_rcp_ss) \
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_(mm_rsqrt_ps) \
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_(mm_rsqrt_ss) \
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_(mm_sad_pu8) \
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_(mm_set_flush_zero_mode) \
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_(mm_set_ps) \
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_(mm_set_ps1) \
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_(mm_set_rounding_mode) \
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_(mm_set_ss) \
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_(mm_set1_ps) \
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_(mm_setcsr) \
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_(mm_setr_ps) \
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_(mm_setzero_ps) \
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_(mm_sfence) \
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_(mm_shuffle_pi16) \
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_(mm_shuffle_ps) \
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_(mm_sqrt_ps) \
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_(mm_sqrt_ss) \
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_(mm_store_ps) \
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_(mm_store_ps1) \
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_(mm_store_ss) \
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_(mm_store1_ps) \
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_(mm_storeh_pi) \
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_(mm_storel_pi) \
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_(mm_storer_ps) \
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_(mm_storeu_ps) \
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_(mm_storeu_si16) \
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_(mm_storeu_si64) \
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_(mm_stream_pi) \
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_(mm_stream_ps) \
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_(mm_sub_ps) \
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_(mm_sub_ss) \
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_(mm_ucomieq_ss) \
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_(mm_ucomige_ss) \
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_(mm_ucomigt_ss) \
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_(mm_ucomile_ss) \
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_(mm_ucomilt_ss) \
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_(mm_ucomineq_ss) \
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_(mm_undefined_ps) \
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_(mm_unpackhi_ps) \
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_(mm_unpacklo_ps) \
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_(mm_xor_ps) \
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/* SSE2 */ \
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_(mm_add_epi16) \
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_(mm_add_epi32) \
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_(mm_add_epi64) \
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_(mm_add_epi8) \
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_(mm_add_pd) \
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_(mm_add_sd) \
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_(mm_add_si64) \
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_(mm_adds_epi16) \
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_(mm_adds_epi8) \
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_(mm_adds_epu16) \
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_(mm_adds_epu8) \
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_(mm_and_pd) \
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_(mm_and_si128) \
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_(mm_andnot_pd) \
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_(mm_andnot_si128) \
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_(mm_avg_epu16) \
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_(mm_avg_epu8) \
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_(mm_bslli_si128) \
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_(mm_bsrli_si128) \
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_(mm_castpd_ps) \
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_(mm_castpd_si128) \
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_(mm_castps_pd) \
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_(mm_castps_si128) \
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_(mm_castsi128_pd) \
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_(mm_castsi128_ps) \
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_(mm_clflush) \
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_(mm_cmpeq_epi16) \
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_(mm_cmpeq_epi32) \
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_(mm_cmpeq_epi8) \
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_(mm_cmpeq_pd) \
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_(mm_cmpeq_sd) \
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_(mm_cmpge_pd) \
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_(mm_cmpge_sd) \
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_(mm_cmpgt_epi16) \
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_(mm_cmpgt_epi32) \
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_(mm_cmpgt_epi8) \
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_(mm_cmpgt_pd) \
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_(mm_cmpgt_sd) \
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_(mm_cmple_pd) \
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_(mm_cmple_sd) \
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_(mm_cmplt_epi16) \
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_(mm_cmplt_epi32) \
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_(mm_cmplt_epi8) \
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_(mm_cmplt_pd) \
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_(mm_cmplt_sd) \
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_(mm_cmpneq_pd) \
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_(mm_cmpneq_sd) \
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_(mm_cmpnge_pd) \
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_(mm_cmpnge_sd) \
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_(mm_cmpngt_pd) \
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_(mm_cmpngt_sd) \
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_(mm_cmpnle_pd) \
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_(mm_cmpnle_sd) \
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_(mm_cmpnlt_pd) \
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_(mm_cmpnlt_sd) \
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_(mm_cmpord_pd) \
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_(mm_cmpord_sd) \
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_(mm_cmpunord_pd) \
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_(mm_cmpunord_sd) \
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_(mm_comieq_sd) \
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_(mm_comige_sd) \
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_(mm_comigt_sd) \
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_(mm_comile_sd) \
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_(mm_comilt_sd) \
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_(mm_comineq_sd) \
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_(mm_cvtepi32_pd) \
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_(mm_cvtepi32_ps) \
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_(mm_cvtpd_epi32) \
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_(mm_cvtpd_pi32) \
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_(mm_cvtpd_ps) \
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_(mm_cvtpi32_pd) \
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_(mm_cvtps_epi32) \
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_(mm_cvtps_pd) \
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_(mm_cvtsd_f64) \
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_(mm_cvtsd_si32) \
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_(mm_cvtsd_si64) \
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_(mm_cvtsd_si64x) \
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_(mm_cvtsd_ss) \
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_(mm_cvtsi128_si32) \
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_(mm_cvtsi128_si64) \
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_(mm_cvtsi128_si64x) \
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_(mm_cvtsi32_sd) \
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_(mm_cvtsi32_si128) \
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_(mm_cvtsi64_sd) \
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_(mm_cvtsi64_si128) \
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_(mm_cvtsi64x_sd) \
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_(mm_cvtsi64x_si128) \
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_(mm_cvtss_sd) \
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_(mm_cvttpd_epi32) \
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_(mm_cvttpd_pi32) \
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_(mm_cvttps_epi32) \
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_(mm_cvttsd_si32) \
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_(mm_cvttsd_si64) \
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_(mm_cvttsd_si64x) \
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_(mm_div_pd) \
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_(mm_div_sd) \
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_(mm_extract_epi16) \
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_(mm_insert_epi16) \
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_(mm_lfence) \
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_(mm_load_pd) \
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_(mm_load_pd1) \
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_(mm_load_sd) \
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_(mm_load_si128) \
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_(mm_load1_pd) \
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_(mm_loadh_pd) \
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_(mm_loadl_epi64) \
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_(mm_loadl_pd) \
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_(mm_loadr_pd) \
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_(mm_loadu_pd) \
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_(mm_loadu_si128) \
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_(mm_loadu_si32) \
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_(mm_madd_epi16) \
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_(mm_maskmoveu_si128) \
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_(mm_max_epi16) \
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_(mm_max_epu8) \
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_(mm_max_pd) \
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_(mm_max_sd) \
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_(mm_mfence) \
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_(mm_min_epi16) \
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_(mm_min_epu8) \
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_(mm_min_pd) \
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_(mm_min_sd) \
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_(mm_move_epi64) \
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_(mm_move_sd) \
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_(mm_movemask_epi8) \
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_(mm_movemask_pd) \
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_(mm_movepi64_pi64) \
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_(mm_movpi64_epi64) \
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_(mm_mul_epu32) \
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_(mm_mul_pd) \
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_(mm_mul_sd) \
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_(mm_mul_su32) \
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_(mm_mulhi_epi16) \
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_(mm_mulhi_epu16) \
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_(mm_mullo_epi16) \
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_(mm_or_pd) \
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_(mm_or_si128) \
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_(mm_packs_epi16) \
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_(mm_packs_epi32) \
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_(mm_packus_epi16) \
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_(mm_pause) \
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_(mm_sad_epu8) \
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_(mm_set_epi16) \
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_(mm_set_epi32) \
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_(mm_set_epi64) \
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_(mm_set_epi64x) \
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_(mm_set_epi8) \
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_(mm_set_pd) \
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_(mm_set_pd1) \
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_(mm_set_sd) \
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_(mm_set1_epi16) \
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_(mm_set1_epi32) \
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_(mm_set1_epi64) \
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_(mm_set1_epi64x) \
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_(mm_set1_epi8) \
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_(mm_set1_pd) \
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_(mm_setr_epi16) \
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_(mm_setr_epi32) \
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_(mm_setr_epi64) \
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_(mm_setr_epi8) \
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_(mm_setr_pd) \
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_(mm_setzero_pd) \
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_(mm_setzero_si128) \
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_(mm_shuffle_epi32) \
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_(mm_shuffle_pd) \
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_(mm_shufflehi_epi16) \
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_(mm_shufflelo_epi16) \
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_(mm_sll_epi16) \
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_(mm_sll_epi32) \
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_(mm_sll_epi64) \
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_(mm_slli_epi16) \
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_(mm_slli_epi32) \
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_(mm_slli_epi64) \
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_(mm_slli_si128) \
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_(mm_sqrt_pd) \
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_(mm_sqrt_sd) \
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_(mm_sra_epi16) \
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_(mm_sra_epi32) \
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_(mm_srai_epi16) \
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_(mm_srai_epi32) \
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_(mm_srl_epi16) \
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_(mm_srl_epi32) \
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_(mm_srl_epi64) \
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_(mm_srli_epi16) \
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_(mm_srli_epi32) \
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_(mm_srli_epi64) \
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_(mm_srli_si128) \
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_(mm_store_pd) \
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_(mm_store_pd1) \
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_(mm_store_sd) \
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_(mm_store_si128) \
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_(mm_store1_pd) \
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_(mm_storeh_pd) \
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_(mm_storel_epi64) \
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_(mm_storel_pd) \
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_(mm_storer_pd) \
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_(mm_storeu_pd) \
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_(mm_storeu_si128) \
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_(mm_storeu_si32) \
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_(mm_stream_pd) \
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_(mm_stream_si128) \
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_(mm_stream_si32) \
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_(mm_stream_si64) \
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_(mm_sub_epi16) \
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_(mm_sub_epi32) \
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_(mm_sub_epi64) \
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_(mm_sub_epi8) \
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_(mm_sub_pd) \
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_(mm_sub_sd) \
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_(mm_sub_si64) \
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_(mm_subs_epi16) \
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_(mm_subs_epi8) \
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_(mm_subs_epu16) \
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_(mm_subs_epu8) \
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_(mm_ucomieq_sd) \
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_(mm_ucomige_sd) \
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_(mm_ucomigt_sd) \
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_(mm_ucomile_sd) \
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_(mm_ucomilt_sd) \
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_(mm_ucomineq_sd) \
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_(mm_undefined_pd) \
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_(mm_undefined_si128) \
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_(mm_unpackhi_epi16) \
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_(mm_unpackhi_epi32) \
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_(mm_unpackhi_epi64) \
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_(mm_unpackhi_epi8) \
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_(mm_unpackhi_pd) \
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_(mm_unpacklo_epi16) \
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_(mm_unpacklo_epi32) \
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_(mm_unpacklo_epi64) \
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_(mm_unpacklo_epi8) \
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_(mm_unpacklo_pd) \
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_(mm_xor_pd) \
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_(mm_xor_si128) \
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/* SSE3 */ \
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_(mm_addsub_pd) \
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_(mm_addsub_ps) \
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_(mm_hadd_pd) \
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_(mm_hadd_ps) \
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_(mm_hsub_pd) \
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_(mm_hsub_ps) \
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_(mm_lddqu_si128) \
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_(mm_loaddup_pd) \
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_(mm_movedup_pd) \
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_(mm_movehdup_ps) \
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_(mm_moveldup_ps) \
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/* SSSE3 */ \
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_(mm_abs_epi16) \
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_(mm_abs_epi32) \
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_(mm_abs_epi8) \
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_(mm_abs_pi16) \
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_(mm_abs_pi32) \
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_(mm_abs_pi8) \
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_(mm_alignr_epi8) \
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_(mm_alignr_pi8) \
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_(mm_hadd_epi16) \
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_(mm_hadd_epi32) \
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_(mm_hadd_pi16) \
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_(mm_hadd_pi32) \
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_(mm_hadds_epi16) \
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_(mm_hadds_pi16) \
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_(mm_hsub_epi16) \
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_(mm_hsub_epi32) \
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_(mm_hsub_pi16) \
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_(mm_hsub_pi32) \
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_(mm_hsubs_epi16) \
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_(mm_hsubs_pi16) \
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_(mm_maddubs_epi16) \
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_(mm_maddubs_pi16) \
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_(mm_mulhrs_epi16) \
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_(mm_mulhrs_pi16) \
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_(mm_shuffle_epi8) \
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_(mm_shuffle_pi8) \
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_(mm_sign_epi16) \
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_(mm_sign_epi32) \
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_(mm_sign_epi8) \
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_(mm_sign_pi16) \
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_(mm_sign_pi32) \
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_(mm_sign_pi8) \
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/* SSE4.1 */ \
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_(mm_blend_epi16) \
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_(mm_blend_pd) \
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_(mm_blend_ps) \
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_(mm_blendv_epi8) \
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_(mm_blendv_pd) \
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_(mm_blendv_ps) \
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_(mm_ceil_pd) \
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_(mm_ceil_ps) \
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_(mm_ceil_sd) \
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_(mm_ceil_ss) \
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_(mm_cmpeq_epi64) \
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_(mm_cvtepi16_epi32) \
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_(mm_cvtepi16_epi64) \
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_(mm_cvtepi32_epi64) \
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_(mm_cvtepi8_epi16) \
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_(mm_cvtepi8_epi32) \
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_(mm_cvtepi8_epi64) \
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_(mm_cvtepu16_epi32) \
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_(mm_cvtepu16_epi64) \
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_(mm_cvtepu32_epi64) \
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_(mm_cvtepu8_epi16) \
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_(mm_cvtepu8_epi32) \
|
|
_(mm_cvtepu8_epi64) \
|
|
_(mm_dp_pd) \
|
|
_(mm_dp_ps) \
|
|
_(mm_extract_epi32) \
|
|
_(mm_extract_epi64) \
|
|
_(mm_extract_epi8) \
|
|
_(mm_extract_ps) \
|
|
_(mm_floor_pd) \
|
|
_(mm_floor_ps) \
|
|
_(mm_floor_sd) \
|
|
_(mm_floor_ss) \
|
|
_(mm_insert_epi32) \
|
|
_(mm_insert_epi64) \
|
|
_(mm_insert_epi8) \
|
|
_(mm_insert_ps) \
|
|
_(mm_max_epi32) \
|
|
_(mm_max_epi8) \
|
|
_(mm_max_epu16) \
|
|
_(mm_max_epu32) \
|
|
_(mm_min_epi32) \
|
|
_(mm_min_epi8) \
|
|
_(mm_min_epu16) \
|
|
_(mm_min_epu32) \
|
|
_(mm_minpos_epu16) \
|
|
_(mm_mpsadbw_epu8) \
|
|
_(mm_mul_epi32) \
|
|
_(mm_mullo_epi32) \
|
|
_(mm_packus_epi32) \
|
|
_(mm_round_pd) \
|
|
_(mm_round_ps) \
|
|
_(mm_round_sd) \
|
|
_(mm_round_ss) \
|
|
_(mm_stream_load_si128) \
|
|
_(mm_test_all_ones) \
|
|
_(mm_test_all_zeros) \
|
|
_(mm_test_mix_ones_zeros) \
|
|
_(mm_testc_si128) \
|
|
_(mm_testnzc_si128) \
|
|
_(mm_testz_si128) \
|
|
/* SSE4.2 */ \
|
|
_(mm_cmpestra) \
|
|
_(mm_cmpestrc) \
|
|
_(mm_cmpestri) \
|
|
_(mm_cmpestrm) \
|
|
_(mm_cmpestro) \
|
|
_(mm_cmpestrs) \
|
|
_(mm_cmpestrz) \
|
|
_(mm_cmpgt_epi64) \
|
|
_(mm_cmpistra) \
|
|
_(mm_cmpistrc) \
|
|
_(mm_cmpistri) \
|
|
_(mm_cmpistrm) \
|
|
_(mm_cmpistro) \
|
|
_(mm_cmpistrs) \
|
|
_(mm_cmpistrz) \
|
|
_(mm_crc32_u16) \
|
|
_(mm_crc32_u32) \
|
|
_(mm_crc32_u64) \
|
|
_(mm_crc32_u8) \
|
|
/* AES */ \
|
|
_(mm_aesenc_si128) \
|
|
_(mm_aesdec_si128) \
|
|
_(mm_aesenclast_si128) \
|
|
_(mm_aesdeclast_si128) \
|
|
_(mm_aesimc_si128) \
|
|
_(mm_aeskeygenassist_si128) \
|
|
/* Others */ \
|
|
_(mm_clmulepi64_si128) \
|
|
_(mm_get_denormals_zero_mode) \
|
|
_(mm_popcnt_u32) \
|
|
_(mm_popcnt_u64) \
|
|
_(mm_set_denormals_zero_mode) \
|
|
_(rdtsc) \
|
|
_(last) /* This indicates the end of macros */
|
|
|
|
namespace SSE2NEON
|
|
{
|
|
// The way unit tests are implemented is that 10,000 random floating point and
|
|
// integer vec4 numbers are generated as sample data.
|
|
//
|
|
// A short C implementation of every intrinsic is implemented and compared to
|
|
// the actual expected results from the corresponding SSE intrinsic against all
|
|
// of the 10,000 randomized input vectors. When running on ARM, then the results
|
|
// are compared to the NEON approximate version.
|
|
extern const char *instructionString[];
|
|
enum InstructionTest {
|
|
#define _(x) it_##x,
|
|
INTRIN_LIST
|
|
#undef _
|
|
};
|
|
|
|
class SSE2NEONTest
|
|
{
|
|
public:
|
|
static SSE2NEONTest *create(void); // create the test.
|
|
|
|
// Run test of this instruction;
|
|
// Passed: TEST_SUCCESS (1)
|
|
// Failed: TEST_FAIL (0)
|
|
// Unimplemented: TEST_UNIMPL (-1)
|
|
virtual result_t runTest(InstructionTest test) = 0;
|
|
virtual void release(void) = 0;
|
|
};
|
|
|
|
} // namespace SSE2NEON
|
|
|
|
#endif
|