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0bf4e3c34a
- Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
35 lines
809 B
C
35 lines
809 B
C
u32 digest_tp[4];
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digest_tp[0] = r0;
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digest_tp[1] = r1;
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digest_tp[2] = r2;
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digest_tp[3] = r3;
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if (check (digest_tp,
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bitmaps_buf_s1_a,
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bitmaps_buf_s1_b,
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bitmaps_buf_s1_c,
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bitmaps_buf_s1_d,
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bitmaps_buf_s2_a,
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bitmaps_buf_s2_b,
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bitmaps_buf_s2_c,
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bitmaps_buf_s2_d,
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bitmap_mask,
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bitmap_shift1,
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bitmap_shift2))
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{
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int hash_pos = find_hash (digest_tp, digests_cnt, &digests_buf[digests_offset]);
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if (hash_pos != -1)
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{
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const u32 final_hash_pos = digests_offset + hash_pos;
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if (atomic_add (&hashes_shown[final_hash_pos], 1) == 0)
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{
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mark_hash (plains_buf, hashes_shown, final_hash_pos, gid, il_pos + slice);
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d_return_buf[lid] = 1;
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}
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}
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}
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