| .. |
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amp_a0.cl
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Upgrade kernel to support dynamic local work sizes
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2016-01-19 16:06:03 +01:00 |
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amp_a1.cl
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Converted _a3 kernels, use SIMD for CPU and GPU
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2016-01-23 15:32:31 +01:00 |
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amp_a3.cl
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Upgrade kernel to support dynamic local work sizes
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2016-01-19 16:06:03 +01:00 |
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check_multi_comp4_bs.c
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- Dropped all vector code since new GPU's are all scalar, makes the code much easier
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2015-12-15 12:04:22 +01:00 |
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check_multi_comp4.c
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- Dropped all vector code since new GPU's are all scalar, makes the code much easier
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2015-12-15 12:04:22 +01:00 |
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check_single_comp4_bs.c
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- Dropped all vector code since new GPU's are all scalar, makes the code much easier
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2015-12-15 12:04:22 +01:00 |
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check_single_comp4.c
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- Dropped all vector code since new GPU's are all scalar, makes the code much easier
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2015-12-15 12:04:22 +01:00 |
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common.c
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Speed up -m 20 in -a 3 mode
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2016-02-23 12:18:47 +01:00 |
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kernel_aes256.c
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Some cleanups
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2016-02-04 15:47:52 +01:00 |
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kernel_serpent256.c
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Some cleanups
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2016-02-04 15:47:52 +01:00 |
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kernel_twofish256.c
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Some cleanups
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2016-02-04 15:47:52 +01:00 |
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m00000_a0.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00000_a1.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00000_a3.cl
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Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
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2016-01-29 18:38:34 +01:00 |
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m00010_a0.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00010_a1.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00010_a3.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00020_a0.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00020_a1.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00020_a3.cl
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Cleanup of all raw-MD5 based algorithms; small change important for later changes
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2016-02-24 13:40:38 +01:00 |
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m00030_a0.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00030_a1.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00030_a3.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00040_a0.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00040_a1.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00040_a3.cl
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Cleanup of all raw-MD5 based algorithms; small change important for later changes
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2016-02-24 13:40:38 +01:00 |
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m00050_a0.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00050_a1.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00050_a3.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00060_a0.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00060_a1.cl
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Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
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2016-02-24 11:35:13 +01:00 |
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m00060_a3.cl
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Do not use values that can actually crack a hash in autotune
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2016-02-23 15:00:56 +01:00 |
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m00100_a0.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00100_a1.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00100_a3.cl
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Converted _a3 kernels, use SIMD for CPU and GPU
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2016-01-23 15:32:31 +01:00 |
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m00110_a0.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00110_a1.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00110_a3.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00120_a0.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00120_a1.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00120_a3.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00130_a0.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00130_a1.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00130_a3.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00140_a0.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00140_a1.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00140_a3.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00150_a0.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00150_a1.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00150_a3.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00160_a0.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00160_a1.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00160_a3.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00190_a0.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00190_a1.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00190_a3.cl
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Cleanup of all raw-SHA1 based algorithms
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2016-02-24 15:27:02 +01:00 |
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m00200_a0.cl
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Converted to new SIMD: -m 200 -a 0
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2016-02-05 17:43:00 +01:00 |
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m00200_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m00200_a3.cl
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Converted _a3 kernels, use SIMD for CPU and GPU
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2016-01-23 15:32:31 +01:00 |
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m00300_a0.cl
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Converted to new SIMD: -m 300 -a 0
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2016-02-05 17:43:03 +01:00 |
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m00300_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m00300_a3.cl
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Converted _a3 kernels, use SIMD for CPU and GPU
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2016-01-23 15:32:31 +01:00 |
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m00400.cl
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Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
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2016-01-29 18:38:34 +01:00 |
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m00500.cl
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Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
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2016-01-29 18:38:34 +01:00 |
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m00900_a0.cl
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Converted to new SIMD: -m 900 -a 0
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2016-02-05 17:43:07 +01:00 |
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m00900_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m00900_a3.cl
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Converted _a3 kernels, use SIMD for CPU and GPU
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2016-01-23 15:32:31 +01:00 |
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m01000_a0.cl
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Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
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2016-01-29 18:38:34 +01:00 |
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m01000_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m01000_a3.cl
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Converted _a3 kernels, use SIMD for CPU and GPU
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2016-01-23 15:32:31 +01:00 |
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m01100_a0.cl
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Converted to new SIMD: -m 1100 -a 0
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2016-02-05 17:43:10 +01:00 |
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m01100_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m01100_a3.cl
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Converted _a3 kernels, use SIMD for CPU and GPU
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2016-01-23 15:32:31 +01:00 |
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m01400_a0.cl
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Converted to new SIMD: -m 1400 -a 0
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2016-02-05 17:43:13 +01:00 |
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m01400_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m01400_a3.cl
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Converted _a3 kernels, use SIMD for CPU and GPU
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2016-01-23 15:32:31 +01:00 |
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m01410_a0.cl
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Converted to new SIMD: -m 1410 -a 0
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2016-02-05 17:43:16 +01:00 |
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m01410_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m01410_a3.cl
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Converted _a3 kernels, use SIMD for CPU and GPU
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2016-01-23 15:32:31 +01:00 |
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m01420_a0.cl
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Converted to new SIMD: -m 1420 -a 0
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2016-02-05 17:43:19 +01:00 |
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m01420_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m01420_a3.cl
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Prepare NEW_SIMD_MODE for -a 1 kernels
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2016-02-20 16:13:06 +01:00 |
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m01430_a0.cl
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Converted to new SIMD: -m 1430 -a 0
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2016-02-05 17:43:22 +01:00 |
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m01430_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m01430_a3.cl
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Converted _a3 kernels, use SIMD for CPU and GPU
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2016-01-23 15:32:31 +01:00 |
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m01440_a0.cl
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Converted to new SIMD: -m 1440 -a 0
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2016-02-05 17:43:25 +01:00 |
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m01440_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m01440_a3.cl
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Prepare NEW_SIMD_MODE for -a 1 kernels
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2016-02-20 16:13:06 +01:00 |
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m01450_a0.cl
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Converted to new SIMD: -m 1450 -a 0
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2016-02-05 17:43:28 +01:00 |
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m01450_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m01450_a3.cl
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Prepare NEW_SIMD_MODE for -a 1 kernels
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2016-02-20 16:13:06 +01:00 |
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m01460_a0.cl
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Converted to new SIMD: -m 1460 -a 0
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2016-02-05 17:43:31 +01:00 |
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m01460_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m01460_a3.cl
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Prepare NEW_SIMD_MODE for -a 1 kernels
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2016-02-20 16:13:06 +01:00 |
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m01500_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
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m01500_a1.cl
|
Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m01500_a3.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
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m01600.cl
|
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
|
2016-01-29 18:38:34 +01:00 |
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m01700_a0.cl
|
Converted to new SIMD: -m 1700 -a 0
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2016-02-05 17:52:42 +01:00 |
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m01700_a1.cl
|
Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m01700_a3.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
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m01710_a0.cl
|
Converted to new SIMD: -m 1710 -a 0
|
2016-02-05 17:52:52 +01:00 |
|
m01710_a1.cl
|
Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
|
m01710_a3.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m01720_a0.cl
|
Converted to new SIMD: -m 1720 -a 0
|
2016-02-05 17:53:03 +01:00 |
|
m01720_a1.cl
|
Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
|
m01720_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m01730_a0.cl
|
Converted to new SIMD: -m 1730 -a 0
|
2016-02-05 17:54:04 +01:00 |
|
m01730_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m01730_a3.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m01740_a0.cl
|
Converted to new SIMD: -m 1740 -a 0
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2016-02-05 17:55:55 +01:00 |
|
m01740_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m01740_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m01750_a0.cl
|
Converted to new SIMD: -m 1750 -a 0
|
2016-02-05 18:00:47 +01:00 |
|
m01750_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m01750_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m01760_a0.cl
|
Converted to new SIMD: -m 1760 -a 0
|
2016-02-05 18:01:37 +01:00 |
|
m01760_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m01760_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m01800.cl
|
Use a different workaround for a catalyst bug which takes effect in sha512crypt
|
2016-01-31 17:24:12 +01:00 |
|
m02100.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m02400_a0.cl
|
Converted to new SIMD: -m 2400 -a 0
|
2016-02-05 18:11:54 +01:00 |
|
m02400_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m02400_a3.cl
|
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
|
2016-01-29 18:38:34 +01:00 |
|
m02410_a0.cl
|
Converted to new SIMD: -m 2410 -a 0
|
2016-02-05 18:12:12 +01:00 |
|
m02410_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m02410_a3.cl
|
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
|
2016-01-29 18:38:34 +01:00 |
|
m02500.cl
|
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
|
2016-01-29 18:38:34 +01:00 |
|
m02610_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m02610_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m02610_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m02710_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m02710_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m02710_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m02810_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m02810_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m02810_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m03000_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m03000_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m03000_a3.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m03100_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m03100_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m03100_a3.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m03200.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m03710_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m03710_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m03710_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m03800_a0.cl
|
Converted to new SIMD: -m 3800 -a 0
|
2016-02-05 21:53:47 +01:00 |
|
m03800_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m03800_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m04310_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m04310_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m04310_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m04400_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m04400_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m04400_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m04500_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m04500_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m04500_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m04700_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m04700_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m04700_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m04800_a0.cl
|
Converted to new SIMD: -m 4800 -a 0
|
2016-02-06 10:11:07 +01:00 |
|
m04800_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m04800_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m04900_a0.cl
|
Converted to new SIMD: -m 4900 -a 0
|
2016-02-06 10:14:38 +01:00 |
|
m04900_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m04900_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m05000_a0.cl
|
Converted to new SIMD: -m 5000 -a 0
|
2016-02-06 11:29:07 +01:00 |
|
m05000_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m05000_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m05100_a0.cl
|
Converted to new SIMD: -m 5100 -a 0
|
2016-02-06 10:18:38 +01:00 |
|
m05100_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m05100_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m05200.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m05300_a0.cl
|
Converted to new SIMD: -m 5300 -a 0
|
2016-02-06 10:19:54 +01:00 |
|
m05300_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m05300_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m05400_a0.cl
|
Converted to new SIMD: -m 5400 -a 0
|
2016-02-06 10:23:42 +01:00 |
|
m05400_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m05400_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m05500_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m05500_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m05500_a3.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m05600_a0.cl
|
Converted to new SIMD: -m 5600 -a 0
|
2016-02-06 10:35:59 +01:00 |
|
m05600_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m05600_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m05800.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m06000_a0.cl
|
Converted to new SIMD: -m 6000 -a 0
|
2016-02-06 10:38:39 +01:00 |
|
m06000_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m06000_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m06100_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m06100_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m06100_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m06211.cl
|
Some cleanups
|
2016-02-04 15:47:52 +01:00 |
|
m06212.cl
|
Some cleanups
|
2016-02-04 15:47:52 +01:00 |
|
m06213.cl
|
Some cleanups
|
2016-02-04 15:47:52 +01:00 |
|
m06221.cl
|
Some cleanups
|
2016-02-04 15:47:52 +01:00 |
|
m06222.cl
|
Some cleanups
|
2016-02-04 15:47:52 +01:00 |
|
m06223.cl
|
Some cleanups
|
2016-02-04 15:47:52 +01:00 |
|
m06231.cl
|
Fix Truecrypt Whirlpool speed
|
2016-02-16 10:47:40 +01:00 |
|
m06232.cl
|
Some cleanups
|
2016-02-04 15:47:52 +01:00 |
|
m06233.cl
|
Some cleanups
|
2016-02-04 15:47:52 +01:00 |
|
m06300.cl
|
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
|
2016-01-29 18:38:34 +01:00 |
|
m06400.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m06500.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m06600.cl
|
Fixed all gpu code (see PR #179 for details)
|
2016-01-30 23:02:15 +01:00 |
|
m06700.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m06800.cl
|
Fixed all gpu code (see PR #179 for details)
|
2016-01-30 23:02:15 +01:00 |
|
m06900_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m06900_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m06900_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m07100.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m07300_a0.cl
|
Converted to new SIMD: -m 7300 -a 0
|
2016-02-06 10:47:19 +01:00 |
|
m07300_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m07300_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m07400.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m07500_a0.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m07500_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m07500_a3.cl
|
Fixed all gpu code (see PR #179 for details)
|
2016-01-30 23:02:15 +01:00 |
|
m07600_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m07600_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m07600_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m07700_a0.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m07700_a1.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m07700_a3.cl
|
Fixed compiler warnings (unused variable)
|
2016-01-25 13:32:45 +01:00 |
|
m07800_a0.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m07800_a1.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m07800_a3.cl
|
Merge pull request #160 from gm4tr1x/gpu-warnings2
|
2016-01-26 18:13:51 +01:00 |
|
m07900.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m08000_a0.cl
|
Converted to new SIMD: -m 8000 -a 0
|
2016-02-06 10:54:34 +01:00 |
|
m08000_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m08000_a3.cl
|
Fixed all gpu code (see PR #179 for details)
|
2016-01-30 23:02:15 +01:00 |
|
m08100_a0.cl
|
Converted to new SIMD: -m 8100 -a 0
|
2016-02-06 10:57:19 +01:00 |
|
m08100_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m08100_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m08200.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m08300_a0.cl
|
Converted to new SIMD: -m 8300 -a 0
|
2016-02-06 10:58:20 +01:00 |
|
m08300_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m08300_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m08400_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m08400_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m08400_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m08500_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m08500_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m08500_a3.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m08600_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m08600_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m08600_a3.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m08700_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m08700_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m08700_a3.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m08800.cl
|
Fixed all gpu code (see PR #179 for details)
|
2016-01-30 23:02:15 +01:00 |
|
m08900.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m09000.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m09100.cl
|
Fixed all gpu code (see PR #179 for details)
|
2016-01-30 23:02:15 +01:00 |
|
m09400.cl
|
Fixed all gpu code (see PR #179 for details)
|
2016-01-30 23:02:15 +01:00 |
|
m09500.cl
|
Fixed all gpu code (see PR #179 for details)
|
2016-01-30 23:02:15 +01:00 |
|
m09600.cl
|
Fixed all gpu code (see PR #179 for details)
|
2016-01-30 23:02:15 +01:00 |
|
m09700_a0.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m09700_a1.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m09700_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m09710_a0.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m09710_a1.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m09710_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m09720_a0.cl
|
Converted to new SIMD: -m 9720 -a 0
|
2016-02-06 11:29:00 +01:00 |
|
m09720_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m09720_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m09800_a0.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m09800_a1.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m09800_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m09810_a0.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m09810_a1.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m09810_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m09820_a0.cl
|
Converted to new SIMD: -m 9820 -a 0
|
2016-02-06 11:28:55 +01:00 |
|
m09820_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m09820_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m09900_a0.cl
|
Converted to new SIMD: -m 9900 -a 0
|
2016-02-06 11:28:30 +01:00 |
|
m09900_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m09900_a3.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m10100_a0.cl
|
Converted to new SIMD: -m 10100 -a 0
|
2016-02-04 23:12:24 +01:00 |
|
m10100_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m10100_a3.cl
|
Fixed compiler warnings (comparison of integers of different signs) for kernel 7800 and 10100
|
2016-01-25 13:08:31 +01:00 |
|
m10300.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m10400_a0.cl
|
Converted to new SIMD: -m 10100 -a 0
|
2016-02-04 23:12:24 +01:00 |
|
m10400_a1.cl
|
Fixed all gpu code (see PR #179 for details)
|
2016-01-30 23:02:15 +01:00 |
|
m10400_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m10410_a0.cl
|
Fixed __constant in m10410 (see PR #179 for details)
|
2016-01-31 19:17:33 +01:00 |
|
m10410_a1.cl
|
Fixed __constant in m10410 (see PR #179 for details)
|
2016-01-31 19:17:33 +01:00 |
|
m10410_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m10420_a0.cl
|
Converted to new SIMD: -m 10420 -a 0
|
2016-02-04 22:57:50 +01:00 |
|
m10420_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m10420_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m10500.cl
|
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
|
2016-01-29 18:38:34 +01:00 |
|
m10700.cl
|
Autotuning engine prototype
|
2016-02-14 15:45:52 +01:00 |
|
m10800_a0.cl
|
Converted to new SIMD: -m 10800 -a 0
|
2016-02-04 22:52:01 +01:00 |
|
m10800_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m10800_a3.cl
|
Converted _a3 kernels, use SIMD for CPU and GPU
|
2016-01-23 15:32:31 +01:00 |
|
m10900.cl
|
Upgrade kernel to support dynamic local work sizes
|
2016-01-19 16:06:03 +01:00 |
|
m11000_a0.cl
|
Converted to new SIMD: -m 11000 -a 0
|
2016-02-04 22:47:02 +01:00 |
|
m11000_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m11000_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m11100_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m11100_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m11100_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m11200_a0.cl
|
Converted to new SIMD: -m 11200 -a 0
|
2016-02-04 22:31:51 +01:00 |
|
m11200_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m11200_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m11300.cl
|
Fixed all gpu code (see PR #179 for details)
|
2016-01-30 23:02:15 +01:00 |
|
m11400_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m11400_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m11400_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
|
m11500_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m11500_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m11500_a3.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m11600.cl
|
Fixed all gpu code (see PR #179 for details)
|
2016-01-30 23:02:15 +01:00 |
|
m11700_a0.cl
|
Allow and support vector-width 16, which is current maximum for
|
2016-02-18 08:51:45 +01:00 |
|
m11700_a1.cl
|
Revert "Zero pws_buf before reuse"
|
2016-02-22 21:32:38 +01:00 |
|
m11700_a3.cl
|
Prepare NEW_SIMD_MODE for -a 1 kernels
|
2016-02-20 16:13:06 +01:00 |
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m11800_a0.cl
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Allow and support vector-width 16, which is current maximum for
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2016-02-18 08:51:45 +01:00 |
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m11800_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m11800_a3.cl
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Prepare NEW_SIMD_MODE for -a 1 kernels
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2016-02-20 16:13:06 +01:00 |
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m11900.cl
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Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
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2016-01-29 18:38:34 +01:00 |
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m12000.cl
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Upgrade kernel to support dynamic local work sizes
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2016-01-19 16:06:03 +01:00 |
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m12200.cl
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Upgrade kernel to support dynamic local work sizes
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2016-01-19 16:06:03 +01:00 |
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m12300.cl
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Upgrade kernel to support dynamic local work sizes
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2016-01-19 16:06:03 +01:00 |
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m12400.cl
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Fixed all gpu code (see PR #179 for details)
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2016-01-30 23:02:15 +01:00 |
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m12500.cl
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Fixed all gpu code (see PR #179 for details)
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2016-01-30 23:02:15 +01:00 |
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m12600_a0.cl
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Allow and support vector-width 16, which is current maximum for
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2016-02-18 08:51:45 +01:00 |
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m12600_a1.cl
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Revert "Zero pws_buf before reuse"
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2016-02-22 21:32:38 +01:00 |
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m12600_a3.cl
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Prepare NEW_SIMD_MODE for -a 1 kernels
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2016-02-20 16:13:06 +01:00 |
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m12700.cl
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Fixed all gpu code (see PR #179 for details)
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2016-01-30 23:02:15 +01:00 |
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m12800.cl
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Upgrade kernel to support dynamic local work sizes
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2016-01-19 16:06:03 +01:00 |
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m12900.cl
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Fixed compiler warnings (unused variable)
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2016-01-25 13:32:45 +01:00 |
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m13000.cl
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Fixed compiler warnings (unused variable)
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2016-01-25 13:32:45 +01:00 |
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m13100_a0.cl
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Add verification of checksum for -m 13100
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2016-02-19 23:12:46 +01:00 |
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m13100_a1.cl
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Add verification of checksum for -m 13100
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2016-02-19 23:12:46 +01:00 |
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m13100_a3.cl
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Add verification of checksum for -m 13100
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2016-02-19 23:12:46 +01:00 |
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markov_be.cl
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Upgrade kernel to support dynamic local work sizes
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2016-01-19 16:06:03 +01:00 |
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markov_le.cl
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Upgrade kernel to support dynamic local work sizes
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2016-01-19 16:06:03 +01:00 |
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rp.c
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Allow and support vector-width 16, which is current maximum for
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2016-02-18 08:51:45 +01:00 |
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simd.c
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Prepare NEW_SIMD_MODE for -a 1 kernels
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2016-02-20 16:13:06 +01:00 |
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types_ocl.c
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Get rid of old pw_cache mechanism to control host-based vector data-types
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2016-02-22 11:57:37 +01:00 |
