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c87a87f992
General: The logic for calculating the SCRYPT workload has been moved from module_extra_buffer_size() to module_extra_tuningdb_block(). Previously, this function just returned values from a static tuning file. Now, it actually computes tuning values on the fly based on the device's resources and SCRYPT parameters. This was always possible, it just wasn't used that way until now. After running the calculation, the calculated kernel_accel value is injected into the tuning database as if it had come from a file. The tmto value is stored internally. Users can still override kernel-threads, kernel-accel, and scrypt-tmto via the command line or via tuningdb file. module_extra_tuningdb_block(): This is now where kernel_accel and tmto are automatically calculated. The logic for accel and tmto is now separated and more flexible. Whether the user is using defaults, tuningdb entries, or manual command line overrides, the code logic will try to make smart choices based on what's actually available on the device. First, it tries to find a kernel_accel value that fits into available memory. It starts with a base value and simulates tmto=1 or 2 (which is typical good on GPU). It also leaves room for other buffers (like pws[], tmps[], etc.). If the result is close to the actual processor count, it gets clamped. This value is then added to the tuning database, so hashcat can pick it up during startup. Once that's set, it derives tmto using available memory, thread count, and the actual SCRYPT parameters. module_extra_buffer_size(): This function now just returns the size of the SCRYPT B[] buffer, based on the tmto that was already calculated. kernel_threads: Defaults are now set to 32 threads in most cases. On AMD GPUs, 64 threads might give a slight performance bump, but 32 is more consistent and reliable. For very memory-heavy algorithms (like Ethereum Wallet), it scales down the thread count. Here's a rough reference for other SCRYPT-based modes: - 64 MiB: 16 threads - 256 MiB: 4 threads Tuning files: All built-in tuningdb entries have been removed, because they shouldn’t be needed anymore. But you can still add custom entries if needed. There’s even a commented-out example in the tuningdb file for mode 22700. Free memory handling: Getting the actual amount of free GPU memory is critical for this to work right. Unfortunately, none of the common GPGPU APIs give reliable numbers. We now query low-level interfaces like SYSFS (AMD) and NVML (NVIDIA). Support for those APIs is in place already, except for ADL, which still needs to be added. Because of this, hwmon support (which handles those low-level queries) can no longer be disabled.
252 lines
11 KiB
C
252 lines
11 KiB
C
/**
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* Author......: See docs/credits.txt
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* License.....: MIT
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*/
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#ifndef HC_NVML_H
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#define HC_NVML_H
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/**
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* Declarations from nvml.h
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*/
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typedef struct nvmlDevice_st* nvmlDevice_t;
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typedef struct nvmlPciInfo_st
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{
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char busId[16]; //!< The tuple domain:bus:device.function PCI identifier (& NULL terminator)
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unsigned int domain; //!< The PCI domain on which the device's bus resides, 0 to 0xffff
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unsigned int bus; //!< The bus on which the device resides, 0 to 0xff
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unsigned int device; //!< The device's id on the bus, 0 to 31
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unsigned int pciDeviceId; //!< The combined 16-bit device id and 16-bit vendor id
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// Added in NVML 2.285 API
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unsigned int pciSubSystemId; //!< The 32-bit Sub System Device ID
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// NVIDIA reserved for internal use only
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unsigned int reserved0;
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unsigned int reserved1;
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unsigned int reserved2;
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unsigned int reserved3;
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} nvmlPciInfo_t;
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typedef struct nvmlUtilization_st {
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unsigned int gpu; // GPU kernel execution last second, percent
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unsigned int memory; // GPU memory read/write last second, percent
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} nvmlUtilization_t;
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typedef enum nvmlTemperatureSensors_enum {
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NVML_TEMPERATURE_GPU = 0 // Temperature sensor for the GPU die
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} nvmlTemperatureSensors_t;
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typedef enum nvmlReturn_enum {
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NVML_SUCCESS = 0, // The operation was successful
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NVML_ERROR_UNINITIALIZED = 1, // NVML was not first initialized with nvmlInit()
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NVML_ERROR_INVALID_ARGUMENT = 2, // A supplied argument is invalid
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NVML_ERROR_NOT_SUPPORTED = 3, // The requested operation is not available on target device
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NVML_ERROR_NO_PERMISSION = 4, // The current user does not have permission for operation
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NVML_ERROR_ALREADY_INITIALIZED = 5, // Deprecated: Multiple initializations are now allowed through ref counting
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NVML_ERROR_NOT_FOUND = 6, // A query to find an object was unsuccessful
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NVML_ERROR_INSUFFICIENT_SIZE = 7, // An input argument is not large enough
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NVML_ERROR_INSUFFICIENT_POWER = 8, // A device's external power cables are not properly attached
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NVML_ERROR_DRIVER_NOT_LOADED = 9, // NVIDIA driver is not loaded
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NVML_ERROR_TIMEOUT = 10, // User provided timeout passed
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NVML_ERROR_UNKNOWN = 999 // An internal driver error occurred
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} nvmlReturn_t;
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typedef enum nvmlClockType_enum {
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NVML_CLOCK_GRAPHICS = 0,
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NVML_CLOCK_SM = 1,
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NVML_CLOCK_MEM = 2
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} nvmlClockType_t;
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typedef enum nvmlTemperatureThresholds_enum
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{
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NVML_TEMPERATURE_THRESHOLD_SHUTDOWN = 0, // Temperature at which the GPU will shut down
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// for HW protection
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NVML_TEMPERATURE_THRESHOLD_SLOWDOWN = 1, // Temperature at which the GPU will begin slowdown
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// Keep this last
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NVML_TEMPERATURE_THRESHOLD_COUNT
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} nvmlTemperatureThresholds_t;
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/**
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* Compute mode.
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*
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* NVML_COMPUTEMODE_EXCLUSIVE_PROCESS was added in CUDA 4.0.
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* Earlier CUDA versions supported a single exclusive mode,
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* which is equivalent to NVML_COMPUTEMODE_EXCLUSIVE_THREAD in CUDA 4.0 and beyond.
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*/
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typedef enum nvmlComputeMode_enum
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{
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NVML_COMPUTEMODE_DEFAULT = 0, //!< Default compute mode -- multiple contexts per device
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NVML_COMPUTEMODE_EXCLUSIVE_THREAD = 1, //!< Compute-exclusive-thread mode -- only one context per device, usable from one thread at a time
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NVML_COMPUTEMODE_PROHIBITED = 2, //!< Compute-prohibited mode -- no contexts per device
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NVML_COMPUTEMODE_EXCLUSIVE_PROCESS = 3, //!< Compute-exclusive-process mode -- only one context per device, usable from multiple threads at a time
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// Keep this last
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NVML_COMPUTEMODE_COUNT
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} nvmlComputeMode_t;
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/**
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* GPU Operation Mode
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*
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* GOM allows to reduce power usage and optimize GPU throughput by disabling GPU features.
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*
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* Each GOM is designed to meet specific user needs.
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*/
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typedef enum nvmlGom_enum
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{
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NVML_GOM_ALL_ON = 0, //!< Everything is enabled and running at full speed
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NVML_GOM_COMPUTE = 1, //!< Designed for running only compute tasks. Graphics operations
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//!< are not allowed
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NVML_GOM_LOW_DP = 2 //!< Designed for running graphics applications that don't require
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//!< high bandwidth double precision
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} nvmlGpuOperationMode_t;
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/***************************************************************************************************/
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/** @addtogroup nvmlClocksThrottleReasons
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* @{
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*/
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/***************************************************************************************************/
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/** Nothing is running on the GPU and the clocks are dropping to Idle state
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* \note This limiter may be removed in a later release
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*/
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#define nvmlClocksThrottleReasonGpuIdle 0x0000000000000001LL
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/** GPU clocks are limited by current setting of applications clocks
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*
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* @see nvmlDeviceSetApplicationsClocks
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* @see nvmlDeviceGetApplicationsClock
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*/
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#define nvmlClocksThrottleReasonApplicationsClocksSetting 0x0000000000000002LL
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/**
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* @deprecated Renamed to \ref nvmlClocksThrottleReasonApplicationsClocksSetting
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* as the name describes the situation more accurately.
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*/
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#define nvmlClocksThrottleReasonUserDefinedClocks nvmlClocksThrottleReasonApplicationsClocksSetting
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/** SW Power Scaling algorithm is reducing the clocks below requested clocks
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*
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* @see nvmlDeviceGetPowerUsage
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* @see nvmlDeviceSetPowerManagementLimit
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* @see nvmlDeviceGetPowerManagementLimit
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*/
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#define nvmlClocksThrottleReasonSwPowerCap 0x0000000000000004LL
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/** HW Slowdown (reducing the core clocks by a factor of 2 or more) is engaged
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*
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* This is an indicator of:
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* - temperature being too high
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* - External Power Brake Assertion is triggered (e.g. by the system power supply)
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* - Power draw is too high and Fast Trigger protection is reducing the clocks
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* - May be also reported during PState or clock change
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* - This behavior may be removed in a later release.
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*
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* @see nvmlDeviceGetTemperature
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* @see nvmlDeviceGetTemperatureThreshold
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* @see nvmlDeviceGetPowerUsage
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*/
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#define nvmlClocksThrottleReasonHwSlowdown 0x0000000000000008LL
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/** Some other unspecified factor is reducing the clocks */
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#define nvmlClocksThrottleReasonUnknown 0x8000000000000000LL
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/** Bit mask representing no clocks throttling
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*
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* Clocks are as high as possible.
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* */
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#define nvmlClocksThrottleReasonNone 0x0000000000000000LL
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/**
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* Memory allocation information for a device (v1).
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* The total amount is equal to the sum of the amounts of free and used memory.
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*/
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typedef struct nvmlMemory_st
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{
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unsigned long long total; //!< Total physical device memory (in bytes)
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unsigned long long free; //!< Unallocated device memory (in bytes)
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unsigned long long used; //!< Sum of Reserved and Allocated device memory (in bytes).
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//!< Note that the driver/GPU always sets aside a small amount of memory for bookkeeping
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} nvmlMemory_t;
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/*
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* End of declarations from nvml.h
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**/
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typedef nvmlDevice_t HM_ADAPTER_NVML;
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#if defined(_WIN32) || defined(__WIN32__)
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#define NVML_API_CALL __stdcall
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#else
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#define NVML_API_CALL
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#endif
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typedef const char * (*NVML_API_CALL NVML_ERROR_STRING) (nvmlReturn_t);
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typedef int (*NVML_API_CALL NVML_INIT) (void);
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typedef int (*NVML_API_CALL NVML_SHUTDOWN) (void);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_COUNT) (unsigned int *);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_NAME) (nvmlDevice_t, char *, unsigned int);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_HANDLE_BY_INDEX) (unsigned int, nvmlDevice_t *);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_TEMPERATURE) (nvmlDevice_t, nvmlTemperatureSensors_t, unsigned int *);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_FAN_SPEED) (nvmlDevice_t, unsigned int *);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_UTILIZATION_RATES) (nvmlDevice_t, nvmlUtilization_t *);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_CLOCKINFO) (nvmlDevice_t, nvmlClockType_t, unsigned int *);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_THRESHOLD) (nvmlDevice_t, nvmlTemperatureThresholds_t, unsigned int *);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_CURRPCIELINKGENERATION) (nvmlDevice_t, unsigned int *);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_CURRPCIELINKWIDTH) (nvmlDevice_t, unsigned int *);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_CURRENTCLOCKSTHROTTLEREASONS) (nvmlDevice_t, unsigned long long *);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_SUPPORTEDCLOCKSTHROTTLEREASONS) (nvmlDevice_t, unsigned long long *);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_SET_COMPUTEMODE) (nvmlDevice_t, nvmlComputeMode_t);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_SET_OPERATIONMODE) (nvmlDevice_t, nvmlGpuOperationMode_t);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_PCIINFO) (nvmlDevice_t, nvmlPciInfo_t *);
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typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_MEMORYINFO) (nvmlDevice_t, nvmlMemory_t *);
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typedef struct hm_nvml_lib
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{
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hc_dynlib_t lib;
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NVML_ERROR_STRING nvmlErrorString;
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NVML_INIT nvmlInit;
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NVML_SHUTDOWN nvmlShutdown;
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NVML_DEVICE_GET_COUNT nvmlDeviceGetCount;
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NVML_DEVICE_GET_NAME nvmlDeviceGetName;
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NVML_DEVICE_GET_HANDLE_BY_INDEX nvmlDeviceGetHandleByIndex;
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NVML_DEVICE_GET_TEMPERATURE nvmlDeviceGetTemperature;
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NVML_DEVICE_GET_FAN_SPEED nvmlDeviceGetFanSpeed;
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NVML_DEVICE_GET_UTILIZATION_RATES nvmlDeviceGetUtilizationRates;
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NVML_DEVICE_GET_CLOCKINFO nvmlDeviceGetClockInfo;
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NVML_DEVICE_GET_THRESHOLD nvmlDeviceGetTemperatureThreshold;
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NVML_DEVICE_GET_CURRPCIELINKGENERATION nvmlDeviceGetCurrPcieLinkGeneration;
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NVML_DEVICE_GET_CURRPCIELINKWIDTH nvmlDeviceGetCurrPcieLinkWidth;
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NVML_DEVICE_GET_CURRENTCLOCKSTHROTTLEREASONS nvmlDeviceGetCurrentClocksThrottleReasons;
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NVML_DEVICE_GET_SUPPORTEDCLOCKSTHROTTLEREASONS nvmlDeviceGetSupportedClocksThrottleReasons;
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NVML_DEVICE_GET_PCIINFO nvmlDeviceGetPciInfo;
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NVML_DEVICE_GET_MEMORYINFO nvmlDeviceGetMemoryInfo;
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} hm_nvml_lib_t;
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typedef hm_nvml_lib_t NVML_PTR;
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int nvml_init (void *hashcat_ctx);
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void nvml_close (void *hashcat_ctx);
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const char *hm_NVML_nvmlErrorString (NVML_PTR *nvml, const nvmlReturn_t nvml_rc);
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int hm_NVML_nvmlInit (void *hashcat_ctx);
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int hm_NVML_nvmlShutdown (void *hashcat_ctx);
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int hm_NVML_nvmlDeviceGetCount (void *hashcat_ctx, unsigned int *deviceCount);
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int hm_NVML_nvmlDeviceGetHandleByIndex (void *hashcat_ctx, unsigned int device_index, nvmlDevice_t *device);
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int hm_NVML_nvmlDeviceGetTemperature (void *hashcat_ctx, nvmlDevice_t device, nvmlTemperatureSensors_t sensorType, unsigned int *temp);
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int hm_NVML_nvmlDeviceGetFanSpeed (void *hashcat_ctx, nvmlDevice_t device, unsigned int *speed);
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int hm_NVML_nvmlDeviceGetUtilizationRates (void *hashcat_ctx, nvmlDevice_t device, nvmlUtilization_t *utilization);
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int hm_NVML_nvmlDeviceGetClockInfo (void *hashcat_ctx, nvmlDevice_t device, nvmlClockType_t type, unsigned int *clockfreq);
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int hm_NVML_nvmlDeviceGetTemperatureThreshold (void *hashcat_ctx, nvmlDevice_t device, nvmlTemperatureThresholds_t thresholdType, unsigned int *temp);
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int hm_NVML_nvmlDeviceGetCurrPcieLinkWidth (void *hashcat_ctx, nvmlDevice_t device, unsigned int *currLinkWidth);
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int hm_NVML_nvmlDeviceGetPciInfo (void *hashcat_ctx, nvmlDevice_t device, nvmlPciInfo_t *pci);
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int hm_NVML_nvmlDeviceGetMemoryInfo (void *hashcat_ctx, nvmlDevice_t device, nvmlMemory_t *mem);
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#endif // HC_NVML_H
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