mirror of
https://github.com/hashcat/hashcat.git
synced 2025-07-19 13:08:19 +00:00
0a3be95445
This works because CPUs support hardware 64-bit rotate. Added hc_umullo() and rewrote trunc_mul() for Argon2. No performance impact, but trunc_mul() is now easier to read. Re-enabled USE_BITSELECT, USE_ROTATE, and USE_SWIZZLE for OpenCL. We have a new unit test script; let's see if OpenCL runtimes have improved. Previous fix for -m 21800 in multihash mode was incomplete. Now shows the correct cracked hash. Re-enabled --hwmon-disable for users. While it's important for SCRYPT and Argon2 performance, a warning is now shown when it affects speed. Updated hash modes with OPTS_TYPE_NATIVE_THREADS: 1376x, 1377x, 1378x, 14800, 19500 and 2300x.
181 lines
5.1 KiB
C
181 lines
5.1 KiB
C
/**
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* Author......: Netherlands Forensic Institute
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* License.....: MIT
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*/
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#ifndef INC_HASH_ARGON2_H
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#define INC_HASH_ARGON2_H
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#define MIN(a,b) (((a) < (b)) ? (a) : (b))
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#define ARGON2_VERSION_10 0x10
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#define ARGON2_VERSION_13 0x13
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#ifndef THREADS_PER_LANE
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#define THREADS_PER_LANE 32
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#endif
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#define FULL_MASK 0xffffffff
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#define BLAKE2B_OUTBYTES 64
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#define ARGON2_SYNC_POINTS 4
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#define ARGON2_ADDRESSES_IN_BLOCK 128
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#define TYPE_D 0
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#define TYPE_I 1
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#define TYPE_ID 2
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#if defined IS_CUDA
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#define hc__shfl_sync(shfbuf,mask,var,srcLane,argon2_thread,argon2_lsz) __shfl_sync ((mask),(var),(srcLane))
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#elif defined IS_HIP
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// attention hard coded 32 warps for hip here
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#define hc__shfl_sync(shfbuf,mask,var,srcLane,argon2_thread,argon2_lsz) __shfl ((var),(srcLane),32)
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#elif defined IS_OPENCL
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#define hc__shfl_sync(shfbuf,mask,var,srcLane,argon2_thread,argon2_lsz) hc__shfl ((shfbuf),(var),(srcLane),(argon2_thread),(argon2_lsz))
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#if defined IS_AMD && defined IS_GPU
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DECLSPEC u64 hc__shfl (MAYBE_UNUSED LOCAL_AS u64 *shuffle_buf, const u64 var, const int src_lane, const u32 argon2_thread, const u32 argon2_lsz)
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{
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const u32 idx = src_lane << 2;
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const u32 l32 = l32_from_64_S (var);
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const u32 h32 = h32_from_64_S (var);
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const u32 l32r = __builtin_amdgcn_ds_bpermute (idx, l32);
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const u32 h32r = __builtin_amdgcn_ds_bpermute (idx, h32);
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const u64 out = hl32_to_64_S (h32r, l32r);
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return out;
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}
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#elif defined IS_NV && defined IS_GPU
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DECLSPEC u64 hc__shfl (MAYBE_UNUSED LOCAL_AS u64 *shuffle_buf, const u64 var, const int src_lane, const u32 argon2_thread, const u32 argon2_lsz)
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{
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const u32 l32 = l32_from_64_S (var);
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const u32 h32 = h32_from_64_S (var);
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u32 l32r;
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u32 h32r;
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asm("shfl.sync.idx.b32 %0, %1, %2, 0x1f, 0;"
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: "=r"(l32r)
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: "r"(l32), "r"(src_lane));
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asm("shfl.sync.idx.b32 %0, %1, %2, 0x1f, 0;"
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: "=r"(h32r)
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: "r"(h32), "r"(src_lane));
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const u64 out = hl32_to_64_S (h32r, l32r);
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return out;
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}
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#else
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DECLSPEC u64 hc__shfl (MAYBE_UNUSED LOCAL_AS u64 *shuffle_buf, const u64 var, const int src_lane, const u32 argon2_thread, const u32 argon2_lsz)
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{
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shuffle_buf[argon2_thread] = var;
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barrier (CLK_LOCAL_MEM_FENCE);
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const u64 out = shuffle_buf[src_lane & (argon2_lsz - 1)];
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barrier (CLK_LOCAL_MEM_FENCE);
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return out;
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}
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#endif
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#elif defined IS_METAL
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#define hc__shfl_sync(shfbuf,mask,var,srcLane,argon2_thread,argon2_lsz) simd_shuffle_64 ((var),(srcLane),(argon2_lsz))
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DECLSPEC u64 simd_shuffle_64 (const u64 var, const int src_lane, const u32 argon2_lsz)
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{
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const u32 idx = src_lane & (argon2_lsz - 1);
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const u32 l32 = l32_from_64_S (var);
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const u32 h32 = h32_from_64_S (var);
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u32 l32r = simd_shuffle (l32, idx);
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u32 h32r = simd_shuffle (h32, idx);
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const u64 out = hl32_to_64_S (h32r, l32r);
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return out;
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}
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#endif
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#ifdef IS_CPU
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#define ARGON2_G(a,b,c,d) \
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{ \
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a = a + b + 2 * trunc_mul(a, b); \
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d = hc_rotr64_S (d ^ a, 32); \
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c = c + d + 2 * trunc_mul(c, d); \
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b = hc_rotr64_S (b ^ c, 24); \
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a = a + b + 2 * trunc_mul(a, b); \
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d = hc_rotr64_S (d ^ a, 16); \
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c = c + d + 2 * trunc_mul(c, d); \
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b = hc_rotr64_S (b ^ c, 63); \
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}
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#else
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#define ARGON2_G(a,b,c,d) \
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{ \
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a = a + b + 2 * trunc_mul(a, b); \
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d = blake2b_rot32_S (d ^ a); \
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c = c + d + 2 * trunc_mul(c, d); \
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b = blake2b_rot24_S (b ^ c); \
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a = a + b + 2 * trunc_mul(a, b); \
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d = blake2b_rot16_S (d ^ a); \
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c = c + d + 2 * trunc_mul(c, d); \
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b = hc_rotr64_S (b ^ c, 63); \
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}
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#endif
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#define ARGON2_P() \
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{ \
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ARGON2_G(v[0], v[4], v[8], v[12]); \
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ARGON2_G(v[1], v[5], v[9], v[13]); \
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ARGON2_G(v[2], v[6], v[10], v[14]); \
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ARGON2_G(v[3], v[7], v[11], v[15]); \
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\
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ARGON2_G(v[0], v[5], v[10], v[15]); \
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ARGON2_G(v[1], v[6], v[11], v[12]); \
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ARGON2_G(v[2], v[7], v[8], v[13]); \
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ARGON2_G(v[3], v[4], v[9], v[14]); \
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}
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typedef struct argon2_block
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{
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u64 values[128];
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} argon2_block_t;
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typedef struct argon2_options
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{
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u32 type;
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u32 version;
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u32 iterations;
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u32 parallelism;
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u32 memory_usage_in_kib;
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u32 segment_length;
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u32 lane_length;
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u32 memory_block_count;
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u32 digest_len;
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} argon2_options_t;
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typedef struct argon2_pos
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{
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u32 pass;
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u32 slice;
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u32 lane;
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} argon2_pos_t;
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DECLSPEC void argon2_init (GLOBAL_AS const pw_t *pw, GLOBAL_AS const salt_t *salt, PRIVATE_AS const argon2_options_t *options, GLOBAL_AS argon2_block_t *out);
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DECLSPEC void argon2_fill_segment (GLOBAL_AS argon2_block_t *blocks, PRIVATE_AS const argon2_options_t *options, PRIVATE_AS const argon2_pos_t *pos, LOCAL_AS u64 *shuffle_buf, const u32 argon2_thread, const u32 argon2_lsz);
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DECLSPEC void argon2_final (GLOBAL_AS argon2_block_t *blocks, PRIVATE_AS const argon2_options_t *options, PRIVATE_AS u32 *out);
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DECLSPEC GLOBAL_AS argon2_block_t *get_argon2_block (PRIVATE_AS const argon2_options_t *options, GLOBAL_AS void *buf, const int idx);
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#endif // INC_HASH_ARGON2_H
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