hashcat

Author	SHA1	Message	Date
jsteube	e3c0c80b6f	Prepare new SIMD code for kernel, -m 0, 10, 20, 1000 should work in -a 3 mode and other hopefully stay unaffected	9 years ago
jsteube	331188167c	Replace the substring GPU to a more appropriate "device" or "kernel" substring depending on the context	9 years ago
jsteube	5f7c47b461	Fix path to includes	9 years ago
jsteube	bd16fd4cfc	Declare word_buf_r as __constant for _a3 kernel AMD's runtime compiler does that automatically, NV's does not or with different (but worse) thresholds	9 years ago
jsteube	0bf4e3c34a	- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor	9 years ago