Jens Steube
cd0e287827
Cleanup -m 1740 kernels to latest standard
2016-03-04 14:49:44 +01:00
Jens Steube
b6e2392713
Cleanup -m 1730 kernels to latest standard
2016-03-04 14:42:51 +01:00
Jens Steube
2dad9c9d55
Cleanup -m 1720 kernels to latest standard
2016-03-04 14:31:30 +01:00
Jens Steube
549ff72f2e
Cleanup -m 1710 kernels to latest standard
2016-03-04 14:23:27 +01:00
Jens Steube
2bb1116be7
Cleanup -m 1700 kernels to latest standard
2016-03-04 14:09:34 +01:00
Jens Steube
180f71f291
Cleanup -m 1460 kernels to latest standard
2016-03-03 17:10:43 +01:00
Jens Steube
4f1d33216b
Cleanup -m 1450 kernels to latest standard
2016-03-03 16:58:46 +01:00
Jens Steube
e5c8cea390
Cleanup -m 1440 kernels to latest standard
2016-03-03 16:41:47 +01:00
Jens Steube
4ec867f9bb
Cleanup -m 1430 kernels to latest standard
2016-03-03 16:33:39 +01:00
Jens Steube
c0ccfacea6
Cleanup -m 1420 kernels to latest standard
2016-03-03 16:28:23 +01:00
Jens Steube
70fac6ec16
Cleanup -m 1410 kernels to latest standard
2016-03-03 16:20:32 +01:00
Jens Steube
8f8d98665b
Cleanup -m 1400 kernels to latest standard
2016-03-03 16:15:33 +01:00
Jens Steube
9ba3498e4b
Cleanup -m 1400 kernels to latest standard
2016-03-03 16:05:55 +01:00
Fist0urs
b0f1cb8a98
New format -m 13300 AxCrypt in memory SHA1
2016-03-02 14:35:10 +01:00
Fist0urs
ad17fba9b6
New format -m 13200 AxCrypt
2016-03-01 19:11:13 +01:00
Jens Steube
eaaeac4aca
New SIMD code for -a 1 -m 1460
2016-02-28 19:58:16 +01:00
Jens Steube
c788ecdb80
New SIMD code for -a 1 -m 1450
2016-02-28 19:58:13 +01:00
Jens Steube
7b10348f7b
New SIMD code for -a 1 -m 1440
2016-02-28 19:58:09 +01:00
Jens Steube
91c2052e59
New SIMD code for -a 1 -m 1430
2016-02-28 19:58:06 +01:00
Jens Steube
9157996a91
New SIMD code for -a 1 -m 1420
2016-02-28 19:58:02 +01:00
Jens Steube
4931824b26
New SIMD code for -a 1 -m 1410
2016-02-28 19:57:59 +01:00
Jens Steube
6cf3e8324d
New SIMD code for -a 1 -m 1400
2016-02-28 19:57:55 +01:00
Jens Steube
575dcbfd25
Add missing function append_0x01_2x4_S()
2016-02-27 17:29:27 +01:00
jsteube
dad03e394d
Fixed two major problems
...
1) SIMD code for all attack-mode
Macro vector_accessible() was not refactored and missing completely.
Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way.
2) SIMD code for attack-mode 0
With new SIMD code, apply_rules_vect() has to return u32 not u32x.
This has massive impact on all *_a0 kernels.
I've rewritten most of them. Deep testing using test.sh is still required.
Some kernel need more fixes:
- Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c
- Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them
This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this.
This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 17:18:54 +01:00
Jens Steube
18ec554ea0
Cleanup of all raw-SHA1 based algorithms
2016-02-24 15:27:02 +01:00
Jens Steube
12fa3d6bfc
Cleanup of all raw-MD5 based algorithms; small change important for later changes
2016-02-24 13:40:38 +01:00
Jens Steube
7e9fee2155
Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
2016-02-24 11:35:13 +01:00
Jens Steube
01c847ba94
Do not use values that can actually crack a hash in autotune
2016-02-23 15:00:56 +01:00
Jens Steube
a81162b087
Speed up -m 20 in -a 3 mode
2016-02-23 12:18:47 +01:00
Jens Steube
d9fcf87e1c
Increase salt length for raw-md5 based algorithms
2016-02-22 21:35:37 +01:00
Jens Steube
e6e5005a6b
Revert "Zero pws_buf before reuse"
...
This reverts commit b409e5e9e1
2016-02-22 21:32:38 +01:00
Jens Steube
b409e5e9e1
Zero pws_buf before reuse
2016-02-22 21:20:16 +01:00
Jens Steube
6bc98368ba
Get rid of old pw_cache mechanism to control host-based vector data-types
2016-02-22 11:57:37 +01:00
Jens Steube
c7a1a1e84d
New SIMD code for -a 1 -m 100
2016-02-22 10:09:16 +01:00
Jens Steube
b4665607f7
New SIMD code for -a 1 -m 60
2016-02-22 10:02:23 +01:00
Jens Steube
797f03b424
New SIMD code for -a 1 -m 40
2016-02-22 10:01:55 +01:00
Jens Steube
d6c6af040b
New SIMD code for -a 1 -m 40
2016-02-22 10:01:53 +01:00
Jens Steube
097650423a
New SIMD code for -a 1 -m 30
2016-02-22 10:01:49 +01:00
Jens Steube
913dfa058c
New SIMD code for -a 1 -m 20
2016-02-21 18:40:10 +01:00
Jens Steube
0b29be3f86
New SIMD code for -a 1 -m 10
2016-02-21 18:40:06 +01:00
Jens Steube
21c66ea301
New SIMD code for -a 1 -m 0
2016-02-21 18:40:01 +01:00
Jens Steube
7ae2510f11
New SIMD code for -a 1 prepare
2016-02-21 18:39:44 +01:00
Jens Steube
7190dcf855
Prepare NEW_SIMD_MODE for -a 1 kernels
2016-02-20 16:13:06 +01:00
Fist0urs
62bed36638
Add verification of checksum for -m 13100
...
This avoid collisions by arc4'ing all data then hmac-md5
when valid ASN1 structures headers are found.
Performance should not be impacted.
2016-02-19 23:12:46 +01:00
magnum
a5be8a75ed
Allow and support vector-width 16, which is current maximum for
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OpenCL. Closes #226 .
2016-02-18 08:51:45 +01:00
Fist0urs
223ab0b3db
Cosmetic change -m 13100
...
Removed commented part (the commented part was there to implement full last arc4'ing + hmac-md5)
We will see if some people find collision. In this case we will add this last check
2016-02-17 13:32:07 +01:00
Fist0urs
c3dabdd69e
Initial commit
2016-02-16 16:34:46 +01:00
jsteube
7645a6f00f
Fix warp bug on -m 8500
2016-02-16 13:24:36 +01:00
Jens Steube
138ea7ed11
Fix Truecrypt Whirlpool speed
2016-02-16 10:47:40 +01:00
Jens Steube
c09bc848f7
Autotuning engine prototype
2016-02-14 15:45:52 +01:00
