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Commit Graph

23 Commits

Author SHA1 Message Date
jsteube
c918173fcf Get rid of comb_t which can be safely replace with pw_t now 2017-06-25 00:56:25 +02:00
jsteube
71d4926afa Converted -m 400 to password length 256 support
Something weird happend here, read on!

I've expected some performance drop because this algorithm is using the password data itself inside the iteration loop.
That is different to PBKDF2, which I've converted in mode 2100 before and which did not show any performance as expected.

So after I've finished converting this kernel and testing everything works using the unit test, I did some benchmarks to see how much the
performance drop is.

On my 750ti, the speed dropped (minimal) from 981kH/s -> 948kH/s, that's mostly because of the SIMD support i had to drop.
If I'd turn off the SIMD support in the original, the drop would be even less, that us 967kH/s -> 948kH/s which is a bit of a more reasable
comparison in case we just want to rate the drop that is actually caused by the code change itself.

The drop was acceptable for me, so I've decided to check on my GTX1080.Now the weird thing: The performance increased from 6619kH/s to
7134kH/s!!

When I gave it a second thought, it turned out that:

1. The GTX1080 is a scalar GPU so it wont suffer from the drop of the SIMD code as the 750ti did
2. There's a change in how the global data (password) is read into the registers, it reads only that amount of data it actually needs by using
the pw_len information
3. I've added a barrier for CLK_GLOBAL_MEM_FENCE as it turned out to increase the performance in the 750ti

Note that this kernel is now branched into password length < 40 and larger.

There's a large drop on performance where SIMD is really important, for example CPU.

We could workaround this issue by sticking to SIMD inside the length < 40 branch, but I don't know yet how this can be done efficiently.
2017-06-22 13:49:15 +02:00
jsteube
2ece9742e1 Compress multiple newlines to one 2017-02-26 15:42:56 +01:00
jsteube
d0fa9d059d Remove some unused macros 2017-02-26 15:34:45 +01:00
jsteube
bbb4c74e85 OpenCL Kernel: Remove "static" keyword from function declarations; Causes older Intel OpenCL runtimes to fail compiling 2017-02-17 10:11:05 +01:00
Gabriele Gristina
60c3514e0b Fix kernel build warnings (no previous prototypes and/or incompatible function parameters ... 2016-11-27 23:59:23 +01:00
Jens Steube
7fe575e204 Add const qualifier to variable declaration of matching global memory objects 2016-11-22 20:20:34 +01:00
jsteube
8d1809cacb Fix slow-hash-simd exits in _loop kernels 2016-10-29 13:49:08 +02:00
jsteube
3daf0af480 Added docs/credits.txt
Added docs/team.txt
2016-09-11 22:20:15 +02:00
jsteube
8702d0e3e1 Workaround memory allocation limit from OpenCL by using multiple buffers for scrypt 2016-06-28 11:03:04 +02:00
Jens Steube
ed1863c263 Move macros DGST_R0 - DGST_R3 to host, define dgst_size for opencl kernel from host; both at runtime 2016-06-26 23:39:42 +02:00
Jens Steube
2899f53a15 Move files from include/ to OpenCL/ if they are used within kernels
Rename includes in OpenCL so that it's easier to recognize them as such
2016-05-25 23:04:26 +02:00
Jens Steube
0ddb264a5a Use packv() and unpackv() for slow hash SIMD handling in kernels 2016-05-15 00:37:46 +02:00
Jens Steube
9d74f2958d Added SIMD code for WPA/WPA2 2016-05-14 19:45:51 +02:00
Jens Steube
0b3743ce94 - Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance
- Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility
- Added -cl-std=CL1.1 to all kernel build options
- Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache
- Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 23:15:26 +02:00
jsteube
9b3d18f87d SIMD for slow hashes prototype 2016-05-01 18:34:59 +02:00
jsteube
dad03e394d Fixed two major problems
1) SIMD code for all attack-mode

Macro vector_accessible() was not refactored and missing completely.
Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way.

2) SIMD code for attack-mode 0

With new SIMD code, apply_rules_vect() has to return u32 not u32x.
This has massive impact on all *_a0 kernels.

I've rewritten most of them. Deep testing using test.sh is still required.

Some kernel need more fixes:

- Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c
- Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them

This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this.
This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 17:18:54 +01:00
Jens Steube
eb60d6bb23 Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically 2016-01-29 18:38:34 +01:00
Gabriele 'matrix' Gristina
44c3f16bcb Fixed compiler warnings (unused variable) 2016-01-25 13:32:45 +01:00
Jens Steube
a62b7ed06e Upgrade kernel to support dynamic local work sizes 2016-01-19 16:06:03 +01:00
jsteube
331188167c Replace the substring GPU to a more appropriate "device" or "kernel" substring depending on the context 2016-01-05 08:26:44 +01:00
jsteube
5f7c47b461 Fix path to includes 2016-01-03 01:48:05 +01:00
jsteube
0bf4e3c34a - Dropped all vector code since new GPU's are all scalar, makes the code much easier
- Some performance on low-end GPU may drop because of that, but only for a few hash-modes
- Dropped scalar code (aka warp) since we do not have any vector datatypes anymore
- Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4
- Still need to fix kernels to new function names, needs to be done manually
- Temperature Management needs to be rewritten partially because of conflicting datatypes names
- Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id)
- Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD)
- First tests working for -m 0, for example
- Great performance increases in general for NV so far
- Tested amp_* and markov_* kernel
- Migrated special NV optimizations for rule processor
2015-12-15 12:04:22 +01:00