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Commit Graph

12 Commits

Author SHA1 Message Date
jsteube
df3f4a439a We can safely replace atomic_add() with atomic_inc() 2016-05-21 10:58:58 +02:00
jsteube
f2598025c6 Some fixes for rare kernels 2016-05-20 19:05:54 +02:00
Jens Steube
37953cdc8f Optimize handling of cracked hashes, was a bottleneck if too many at once 2016-05-20 18:24:33 +02:00
jsteube
eea3424c38 Added SIMD code for all generic PBKDF2-HMAC-* modes 2016-05-15 19:54:56 +02:00
Jens Steube
0ddb264a5a Use packv() and unpackv() for slow hash SIMD handling in kernels 2016-05-15 00:37:46 +02:00
Jens Steube
0b3743ce94 - Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance
- Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility
- Added -cl-std=CL1.1 to all kernel build options
- Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache
- Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 23:15:26 +02:00
jsteube
dad03e394d Fixed two major problems
1) SIMD code for all attack-mode

Macro vector_accessible() was not refactored and missing completely.
Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way.

2) SIMD code for attack-mode 0

With new SIMD code, apply_rules_vect() has to return u32 not u32x.
This has massive impact on all *_a0 kernels.

I've rewritten most of them. Deep testing using test.sh is still required.

Some kernel need more fixes:

- Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c
- Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them

This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this.
This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 17:18:54 +01:00
Jens Steube
7190dcf855 Prepare NEW_SIMD_MODE for -a 1 kernels 2016-02-20 16:13:06 +01:00
magnum
a5be8a75ed Allow and support vector-width 16, which is current maximum for
OpenCL. Closes #226.
2016-02-18 08:51:45 +01:00
Jens Steube
acbae91750 Prepare SIMD for slow hashes macro 2016-02-08 19:49:28 +01:00
Jens Steube
1d3795a3ab Converted _a3 kernels, use SIMD for CPU and GPU 2016-01-23 15:32:31 +01:00
jsteube
e3c0c80b6f Prepare new SIMD code for kernel, -m 0, 10, 20, 1000 should work in -a 3 mode and other hopefully stay unaffected 2016-01-17 22:17:50 +01:00