Jens Steube
4931824b26
New SIMD code for -a 1 -m 1410
2016-02-28 19:57:59 +01:00
Jens Steube
6cf3e8324d
New SIMD code for -a 1 -m 1400
2016-02-28 19:57:55 +01:00
Jens Steube
22796465e4
Merge pull request #243 from philsmd/master
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cast to uint is required with some gcc versions, otherwise we get a shift-negative-value warning
2016-02-28 13:28:29 +01:00
philsmd
93a134e9b6
cast to uint is required with some gcc versions, otherwise we get a shift-negative-value warning
2016-02-27 19:56:20 +01:00
Jens Steube
575dcbfd25
Add missing function append_0x01_2x4_S()
2016-02-27 17:29:27 +01:00
Jens Steube
6a2c293457
Merge pull request #241 from philsmd/master
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minor: reformatting of recently changed code + use uint instead of unsigned int
2016-02-27 17:20:08 +01:00
jsteube
dad03e394d
Fixed two major problems
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1) SIMD code for all attack-mode
Macro vector_accessible() was not refactored and missing completely.
Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way.
2) SIMD code for attack-mode 0
With new SIMD code, apply_rules_vect() has to return u32 not u32x.
This has massive impact on all *_a0 kernels.
I've rewritten most of them. Deep testing using test.sh is still required.
Some kernel need more fixes:
- Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c
- Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them
This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this.
This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 17:18:54 +01:00
philsmd
0ea05ab292
minor: reformatting of recently changed code + use uint instead of unsigned int
2016-02-25 11:13:11 +01:00
Jens Steube
e688e94384
Merge pull request #239 from philsmd/master
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this fixes the beta issue #163 (-d and --opencl-platforms not within valid range)
2016-02-24 19:53:17 +01:00
philsmd
2ea295171c
this fixes the beta issue #163 (-d and --opencl-platforms not within valid range)
2016-02-24 19:50:05 +01:00
Jens Steube
31ee4e67d1
Merge pull request #237 from gpuhash/master
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Fairly strict stamping of WPA salt components
2016-02-24 15:56:02 +01:00
Jens Steube
18ec554ea0
Cleanup of all raw-SHA1 based algorithms
2016-02-24 15:27:02 +01:00
Jens Steube
12fa3d6bfc
Cleanup of all raw-MD5 based algorithms; small change important for later changes
2016-02-24 13:40:38 +01:00
Jens Steube
7e9fee2155
Cleanup of all raw-MD5 based algorithms; Should be done for all raw-SHA1, -SHA256 and -SHA512 based algorithms as well
2016-02-24 11:35:13 +01:00
Jens Steube
531f72c905
Fix this evil bug, pw->i is u32, not u8
2016-02-23 21:24:03 +01:00
Jens Steube
b50637b26e
Add another example of an old budget GPU that benefits from higher vector width than returned by preferred
2016-02-23 20:53:55 +01:00
gpuhash
541f231c23
Minor bugfix
2016-02-23 22:01:55 +03:00
gpuhash
d56394c849
Fairly strict stamping of WPA salt components
2016-02-23 21:31:18 +03:00
Jens Steube
8c89ef0490
Ensure a minimum length for password candidates in autotune
2016-02-23 18:51:28 +01:00
Jens Steube
2236bb972c
We still need on initial testrun in autotune
2016-02-23 15:36:06 +01:00
Jens Steube
01c847ba94
Do not use values that can actually crack a hash in autotune
2016-02-23 15:00:56 +01:00
Jens Steube
a81162b087
Speed up -m 20 in -a 3 mode
2016-02-23 12:18:47 +01:00
Jens Steube
75c6d28a5f
Fix missing memset after previous fix
2016-02-23 10:52:02 +01:00
Jens Steube
efad2bafac
Evil Bug: Because of not-zeroing a buffer it's possible a hash was cracked but not reported as cracked because it was not in scope, but when it was in scope it was already marked as cracked and therefore not reported
2016-02-23 10:36:43 +01:00
Jens Steube
61f87b2981
Try to load libOpenCL.so.1 if libOpenCL.so was not found
2016-02-23 07:57:52 +01:00
Jens Steube
d9fcf87e1c
Increase salt length for raw-md5 based algorithms
2016-02-22 21:35:37 +01:00
Jens Steube
f9834f3dfa
Zero pws_buf before reuse
2016-02-22 21:33:33 +01:00
Jens Steube
e6e5005a6b
Revert "Zero pws_buf before reuse"
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This reverts commit b409e5e9e1
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2016-02-22 21:32:38 +01:00
Jens Steube
b409e5e9e1
Zero pws_buf before reuse
2016-02-22 21:20:16 +01:00
Jens Steube
6c10ca5853
Fix use of find_kernel_power_div()
2016-02-22 12:50:04 +01:00
Jens Steube
6bc98368ba
Get rid of old pw_cache mechanism to control host-based vector data-types
2016-02-22 11:57:37 +01:00
Jens Steube
ec869595d1
Add auto-append for 0x01 and 0x80 in ATTACK_MODE_HYBRID2
2016-02-22 10:36:04 +01:00
Jens Steube
c7a1a1e84d
New SIMD code for -a 1 -m 100
2016-02-22 10:09:16 +01:00
Jens Steube
b4665607f7
New SIMD code for -a 1 -m 60
2016-02-22 10:02:23 +01:00
Jens Steube
797f03b424
New SIMD code for -a 1 -m 40
2016-02-22 10:01:55 +01:00
Jens Steube
d6c6af040b
New SIMD code for -a 1 -m 40
2016-02-22 10:01:53 +01:00
Jens Steube
097650423a
New SIMD code for -a 1 -m 30
2016-02-22 10:01:49 +01:00
Jens Steube
913dfa058c
New SIMD code for -a 1 -m 20
2016-02-21 18:40:10 +01:00
Jens Steube
0b29be3f86
New SIMD code for -a 1 -m 10
2016-02-21 18:40:06 +01:00
Jens Steube
21c66ea301
New SIMD code for -a 1 -m 0
2016-02-21 18:40:01 +01:00
Jens Steube
7ae2510f11
New SIMD code for -a 1 prepare
2016-02-21 18:39:44 +01:00
Jens Steube
bb732686b1
Autotune should respect --quiet parameter
2016-02-21 18:23:04 +01:00
Jens Steube
9a128ce667
Fix force_jit_compilation usage
2016-02-21 13:30:28 +01:00
Jens Steube
7190dcf855
Prepare NEW_SIMD_MODE for -a 1 kernels
2016-02-20 16:13:06 +01:00
Jens Steube
4338d71d62
Merge pull request #233 from Fist0urs/format_krb5tgs
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Fix test.pl verify -m 13100
2016-02-20 12:47:01 +01:00
Fist0urs
233cdd009c
Fix test.pl verify
2016-02-20 01:39:58 +01:00
Jens Steube
990f973c48
Add hard-wired Device-Name for Tuning-Database which matches all Device-Types:
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- DEVICE_TYPE_CPU
- DEVICE_TYPE_GPU
- DEVICE_TYPE_ACCELERATOR
Optimized IRIS GPU workaround settings
2016-02-20 00:58:22 +01:00
Jens Steube
b996858751
Merge pull request #232 from Fist0urs/format_krb5tgs
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Add verification of checksum for -m 13100
2016-02-20 00:05:30 +01:00
Fist0urs
62bed36638
Add verification of checksum for -m 13100
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This avoid collisions by arc4'ing all data then hmac-md5
when valid ASN1 structures headers are found.
Performance should not be impacted.
2016-02-19 23:12:46 +01:00
Jens Steube
96bde85378
Allow mixed settings auto and fixed values for parameter and inside tuningdb for loops and accel
2016-02-19 18:58:03 +01:00