1
0
mirror of https://github.com/hashcat/hashcat.git synced 2024-11-16 04:49:24 +00:00
Commit Graph

15 Commits

Author SHA1 Message Date
philsmd
5ef522ed8f
whitespace and code style fixes 2021-10-08 17:38:54 +02:00
Jens Steube
fd2cb59d26 AMD GPUs: On Apple OpenCL platform, we ask for the preferred kernel thread size rather than hard-coding 32
ECC secp256k1: Removed the inline assembly code for AMD GPUs because the latest JIT compilers optimize it with the same efficiency
2021-07-27 09:37:31 +02:00
Jens Steube
cf512faa53 Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend 2021-07-14 17:06:20 +02:00
Royce Williams
1e88990b46 minor whitespace fixes, per #2841 2021-06-21 07:47:22 -08:00
Bernard Ladenthin
b85ffd63fb Refactoring: Extract transform_public, point_mul_xy and set_precomputed_basepoint_g. Add constants and documentation. 2021-02-08 23:02:47 +01:00
Bernard Ladenthin
19f4b44840 Refactoring: Extract convert_to_window_naf and add some documentation. 2020-11-17 21:33:51 +01:00
philsmd
53d2e45795
fixes #2341: electrum 4/5 mod_512 () infinite loop fix 2020-03-31 11:01:47 +02:00
Jens Steube
0378a01422 Fix more rocm compiler warning 2020-01-12 11:22:26 +01:00
philsmd
4338f100e9
remove condition which is always true 2019-12-27 11:50:02 +01:00
philsmd
7ef92379d8
Electrum 4/5: speedup by using w-NAF (Non-Adjacent Form) 2019-12-27 09:12:22 +01:00
Jens Steube
75b4164498 Use a different code for mod_512() to help some NV GPU to not hang 2019-12-07 11:29:39 +01:00
Jens Steube
53254b45aa Backport inc_ecc_secp256k1 inline assembly code for AMD ISA 2019-12-05 15:43:01 +01:00
Jens Steube
cb24236067 Inline assembly optimization for 256 bit ADD and SUB in inc_ecc_secp256k1.cl 2019-12-05 14:49:51 +01:00
philsmd
6d822e04a1
fix minor typos in inc_ecc_secp256k1.cl 2019-12-05 12:23:54 +01:00
philsmd
d07f002337 electrum 4/5: improve speed (rm hook) 2019-12-05 10:43:42 +01:00