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Commit Graph

24 Commits

Author SHA1 Message Date
jsteube
eea3424c38 Added SIMD code for all generic PBKDF2-HMAC-* modes 2016-05-15 19:54:56 +02:00
Jens Steube
5987029441 Added SIMD code for DCC2 2016-05-15 01:13:09 +02:00
Jens Steube
9d74f2958d Added SIMD code for WPA/WPA2 2016-05-14 19:45:51 +02:00
Jens Steube
0891989404 Fix WinZip multihash 2016-05-12 13:05:12 +02:00
jsteube
9b3d18f87d SIMD for slow hashes prototype 2016-05-01 18:34:59 +02:00
Fist0urs
52b17a602f New format -m 13400, Keepass 1 (AES/Twofish) and Keepass 2 (AES) 2016-04-02 14:45:05 +02:00
Fist0urs
c3dabdd69e Initial commit 2016-02-16 16:34:46 +01:00
Jens Steube
6846348602 Use a different workaround for a catalyst bug which takes effect in sha512crypt 2016-01-31 17:24:12 +01:00
Jens Steube
eb60d6bb23 Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically 2016-01-29 18:38:34 +01:00
Jens Steube
1d3795a3ab Converted _a3 kernels, use SIMD for CPU and GPU 2016-01-23 15:32:31 +01:00
jsteube
f0a84a2410 Added new hash mode -m 13000 = RAR5 2016-01-09 20:34:12 +01:00
jsteube
332b3c35e5 Added new hash mode -m 12900 = Android FDE (Samsung DEK) 2016-01-09 00:49:54 +01:00
jsteube
e8229af09b Fix for -m 1500, -m 3000: Missing "defined" keyword
Fix for -m 1000: MD4_H1 copy/paste error
Fix for -m 8900, -m 9300: Invalid value for device_processor_cores for CPU devices
Fix for -m 9100: Variable salt2 initializer needed some clauses for clearness
Temporary limit gpu_accel for CPU devices to 1 for development phase
Mark pocl as too bleeding edge for production use, recommend native drivers
Remove workarounds for pocl
Rename VENDOR_ID_UNKNOWN to VENDOR_ID_GENERIC in host code
Rename IS_UNKNOWN to IS_GENERIC in kernel code
2016-01-07 20:14:34 +01:00
jsteube
6e680aa31c Workaround for either pocl or llvm fails and produces invalid optimized code 2016-01-06 11:48:18 +01:00
jsteube
c4b1c8e7ca small fix for unknown opencl platforms 2016-01-04 16:13:10 +01:00
jsteube
3b589e3aac Prepare for allow other OpenCL platforms thans AMD and NVidia 2016-01-04 13:17:20 +01:00
jsteube
7be2c2fd8d Fixed some speeds:
1800
3200
7100
7200
7400
8200
9300
9000
9600
11300
11600
2015-12-21 14:29:04 +01:00
jsteube
9115547601 Revert "Fix -m 10700"
This reverts commit 15da53da38.
2015-12-19 18:18:28 +01:00
jsteube
15da53da38 Fix -m 10700 2015-12-19 18:17:19 +01:00
jsteube
91249942ab Fix -m 1800 for NV 2015-12-17 19:19:31 +01:00
jsteube
9c392b472e Removed useless comments 2015-12-16 11:18:57 +01:00
jsteube
c29c7c093f Fix use of LOP3 2015-12-16 11:11:31 +01:00
jsteube
0bf4e3c34a - Dropped all vector code since new GPU's are all scalar, makes the code much easier
- Some performance on low-end GPU may drop because of that, but only for a few hash-modes
- Dropped scalar code (aka warp) since we do not have any vector datatypes anymore
- Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4
- Still need to fix kernels to new function names, needs to be done manually
- Temperature Management needs to be rewritten partially because of conflicting datatypes names
- Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id)
- Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD)
- First tests working for -m 0, for example
- Great performance increases in general for NV so far
- Tested amp_* and markov_* kernel
- Migrated special NV optimizations for rule processor
2015-12-15 12:04:22 +01:00
Jens Steube
5065474b4e Initial commit 2015-12-04 15:47:52 +01:00