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Commit Graph

15 Commits

Author SHA1 Message Date
Jens Steube
7fe575e204 Add const qualifier to variable declaration of matching global memory objects 2016-11-22 20:20:34 +01:00
jsteube
3daf0af480 Added docs/credits.txt
Added docs/team.txt
2016-09-11 22:20:15 +02:00
jsteube
8702d0e3e1 Workaround memory allocation limit from OpenCL by using multiple buffers for scrypt 2016-06-28 11:03:04 +02:00
Jens Steube
ed1863c263 Move macros DGST_R0 - DGST_R3 to host, define dgst_size for opencl kernel from host; both at runtime 2016-06-26 23:39:42 +02:00
Jens Steube
2899f53a15 Move files from include/ to OpenCL/ if they are used within kernels
Rename includes in OpenCL so that it's easier to recognize them as such
2016-05-25 23:04:26 +02:00
Jens Steube
0b3743ce94 - Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance
- Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility
- Added -cl-std=CL1.1 to all kernel build options
- Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache
- Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 23:15:26 +02:00
Jens Steube
ceb72629ae Cleanup -m 38xx kernels to latest standard 2016-04-10 11:01:10 +02:00
jsteube
dad03e394d Fixed two major problems
1) SIMD code for all attack-mode

Macro vector_accessible() was not refactored and missing completely.
Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way.

2) SIMD code for attack-mode 0

With new SIMD code, apply_rules_vect() has to return u32 not u32x.
This has massive impact on all *_a0 kernels.

I've rewritten most of them. Deep testing using test.sh is still required.

Some kernel need more fixes:

- Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c
- Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them

This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this.
This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 17:18:54 +01:00
Jens Steube
7190dcf855 Prepare NEW_SIMD_MODE for -a 1 kernels 2016-02-20 16:13:06 +01:00
Jens Steube
1d3795a3ab Converted _a3 kernels, use SIMD for CPU and GPU 2016-01-23 15:32:31 +01:00
Jens Steube
a62b7ed06e Upgrade kernel to support dynamic local work sizes 2016-01-19 16:06:03 +01:00
jsteube
331188167c Replace the substring GPU to a more appropriate "device" or "kernel" substring depending on the context 2016-01-05 08:26:44 +01:00
jsteube
5f7c47b461 Fix path to includes 2016-01-03 01:48:05 +01:00
jsteube
50f39b3563 Fix append_* function calls 2015-12-15 13:42:37 +01:00
jsteube
0bf4e3c34a - Dropped all vector code since new GPU's are all scalar, makes the code much easier
- Some performance on low-end GPU may drop because of that, but only for a few hash-modes
- Dropped scalar code (aka warp) since we do not have any vector datatypes anymore
- Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4
- Still need to fix kernels to new function names, needs to be done manually
- Temperature Management needs to be rewritten partially because of conflicting datatypes names
- Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id)
- Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD)
- First tests working for -m 0, for example
- Great performance increases in general for NV so far
- Tested amp_* and markov_* kernel
- Migrated special NV optimizations for rule processor
2015-12-15 12:04:22 +01:00