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Commit Graph

2347 Commits

Author SHA1 Message Date
Jens Steube
2a1ee5d218
Merge pull request #2915 from philsmd/master
fix buffer sizes for -m 13600 = WinZip
2021-08-02 10:33:21 +02:00
Jens Steube
f4e52ca533 Add new rule function '3' to switch the case of the first letter after occurrence N of char X 2021-08-01 00:04:10 +02:00
Jens Steube
bb1ead3b01
Merge branch 'master' into snmpv3_sha256 2021-07-30 18:57:44 +02:00
Jens Steube
8801855b14
Merge branch 'master' into snmpv3_sha224 2021-07-30 18:56:20 +02:00
philsmd
51adbbbe53 fix buffer sizes for -m 13600 = WinZip 2021-07-30 15:23:33 +02:00
Jens Steube
c9d79374a5 Add missing u64 vector datatypes mapping for OpenCL
Improve u64 usage in OpenCL/inc_zip_inflate.cl
2021-07-27 09:54:15 +02:00
Jens Steube
f6de3e61e0
Merge pull request #2906 from hashcat/master
Backports
2021-07-27 09:48:56 +02:00
Jens Steube
e5ac568afb
Merge pull request #2903 from matrix/snmpv3_mod
fix snmpv3 md5/sha1, tested with real hashes
2021-07-27 09:47:47 +02:00
Jens Steube
e627288c04
Merge pull request #2897 from matrix/snmpv3_md5_sha1
Added hash-mode: SNMPv3 HMAC-MD5-96/HMAC-SHA1-96
2021-07-27 09:47:11 +02:00
Jens Steube
fd2cb59d26 AMD GPUs: On Apple OpenCL platform, we ask for the preferred kernel thread size rather than hard-coding 32
ECC secp256k1: Removed the inline assembly code for AMD GPUs because the latest JIT compilers optimize it with the same efficiency
2021-07-27 09:37:31 +02:00
Gabriele Gristina
d711c593de fix to crack real hashes 2021-07-26 23:00:33 +02:00
Gabriele Gristina
d62fa617fb fix to crack real hashes 2021-07-26 22:45:02 +02:00
Gabriele Gristina
c20ff01c39 using shared buffer between md5 and sha1 SNMPV3_TMP_ELEMS_OPT, fix to crack real hashes 2021-07-26 22:25:15 +02:00
Gabriele Gristina
45fce5d3a3 fix snmpv3 md5/sha1, tested with real hashes 2021-07-26 19:04:30 +02:00
Jens Steube
7f419c68af Blowfish Kernels: Backport optimizations reducing bank conflicts from bcrypt to Password Safe v2 and Open Document Format (ODF) 1.1 2021-07-26 13:38:39 +02:00
Jens Steube
f3f6cfadb7 Password Safe v2: Backport optimizations reducing bank conflicts in bcrypt 2021-07-26 10:17:21 +02:00
Jens Steube
b66c093c17
Merge pull request #2902 from hashcat/master
Backports
2021-07-26 08:18:35 +02:00
Jens Steube
1e3bd2c8a0 AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+ 2021-07-26 07:59:12 +02:00
Jens Steube
84a4058edf
Merge pull request #2900 from hashcat/master
Backport changes
2021-07-25 10:34:05 +02:00
Gabriele Gristina
58bb2b69b4 Added hash-mode: SNMPv3 HMAC-SHA256-192 2021-07-24 18:57:25 +02:00
Gabriele Gristina
7683ca19a3 Added hash-mode: SNMPv3 HMAC-SHA224-128 2021-07-24 18:36:10 +02:00
Gabriele Gristina
7c8d7f7831 Added hash-mode: SNMPv3 HMAC-MD5-96/HMAC-SHA1-96 2021-07-24 17:03:50 +02:00
Gabriele Gristina
4f10377703 Added hash-mode: SNMPv3 HMAC-MD5-96 2021-07-24 13:56:49 +02:00
Jens Steube
3a31b669b5 Optimize and clean up -m 25200 code.
Speed on CPU: 1521 -> 2066 (35% faster)
Speed on GPU: 16610 -> 157754 (9.4 times faster)
Works for all password lengths
2021-07-24 11:58:36 +02:00
Jens Steube
3f6c5a0042 Update module_unstable_warning() for -m 172xx on HIP 2021-07-23 21:09:55 +02:00
Jens Steube
5ffcaa980d HIP Backend: Added support to support HIP 4.4 and later, but added check to rule out older versions because they are incompatible 2021-07-23 16:04:34 +02:00
Gabriele Gristina
6d83a69f7d using hex_encode/hex_decode + small fixes 2021-07-22 19:10:34 +02:00
Gabriele Gristina
db7cb16a3b using sha1_hmac_update_global 2021-07-21 10:19:05 +02:00
Gabriele Gristina
7ea5da51a8 Added hash-mode: SNMPv3 HMAC-SHA1-96 2021-07-20 22:24:35 +02:00
Jens Steube
41156bb0a5 Improve PIM fix for use on macOS 2021-07-20 15:10:49 +02:00
Jens Steube
a026171fb3
Merge pull request #2879 from jtojanen/master
Implement gpu_bzero
2021-07-20 13:00:37 +02:00
Jens Steube
777512e862 Fixed false negative in all VeraCrypt hash-modes if both conditions are met: 1. use CPU for cracking and 2. PIM range was used 2021-07-20 11:31:31 +02:00
Jukka Ojanen
4c0f6dd263
Merge branch 'hashcat:master' into master 2021-07-20 12:00:41 +03:00
Jens Steube
92dc57df28 Revert adding make_u32x() for constants to crypto primitives, fails on OpenCL 2021-07-20 10:34:34 +02:00
Jens Steube
bdb7999f07 Switch HIP vector datatypes to OpenCL like ext_vector_type() 2021-07-19 20:24:30 +02:00
Jens Steube
9421e1f89d Fixed datatype in function sha384_hmac_init_vector_128() that could come into effect if vector datatype was manually set 2021-07-19 15:58:38 +02:00
Jens Steube
0d8b4b74ad More CUDA special backports to HIP 2021-07-18 22:56:22 +02:00
Jens Steube
257098a301 Get rid of hip/hip_runtime.h dependancy 2021-07-18 21:14:45 +02:00
Jens Steube
bd92589af1 Optimize BLAKE2B_ROUND() 64 bit rotates 2021-07-17 18:18:22 +02:00
Jens Steube
3becb253d3 Enable vector datatypes for HIP 2021-07-17 18:01:01 +02:00
Jukka Ojanen
a2a1d04bcf Implement gpu_bzero 2021-07-17 19:00:10 +03:00
Jens Steube
141b59b80e
Merge pull request #2883 from hashcat/HIP
Merge HIP branch into master
2021-07-16 19:54:00 +02:00
Jens Steube
45e65dd05a Backport more ROCm based optimizations to HIP 2021-07-15 23:34:27 +02:00
Jens Steube
4730cf6e79 WinZip Kernel: Increase supported data length from 8k to 16mb 2021-07-15 16:42:29 +02:00
Jens Steube
d130cc66b3 Optimize ISA code on HIP for V_ALIGNBIT_B32 using a different template for inline assembly 2021-07-15 09:57:41 +02:00
Jens Steube
cf512faa53 Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend 2021-07-14 17:06:20 +02:00
Jens Steube
4b68a8fb4f
Merge pull request #2878 from hashcat/master
Backports
2021-07-13 22:26:28 +02:00
Jens Steube
4e773f32b2 Fix variable declaration block level in -m 19600 and -m 19700 2021-07-13 22:22:53 +02:00
Jens Steube
7faf6859d6 Backport hand-optimized compiler settings in modules from ROCM to HIP
Backport DECLSPEC settings from ROCM to HIP
2021-07-13 20:45:01 +02:00
Jens Steube
674ca7d88f Add GPU threads to kernel cache checksum because it has an influence on HIP offline compile options
Add V_ALIGNBIT_B32 inline assembly wrapper because HIP does not provide amd_bitalign()
2021-07-12 11:27:05 +02:00