Jens Steube
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2a1ee5d218
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Merge pull request #2915 from philsmd/master
fix buffer sizes for -m 13600 = WinZip
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2021-08-02 10:33:21 +02:00 |
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Jens Steube
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f4e52ca533
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Add new rule function '3' to switch the case of the first letter after occurrence N of char X
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2021-08-01 00:04:10 +02:00 |
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Jens Steube
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bb1ead3b01
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Merge branch 'master' into snmpv3_sha256
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2021-07-30 18:57:44 +02:00 |
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Jens Steube
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8801855b14
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Merge branch 'master' into snmpv3_sha224
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2021-07-30 18:56:20 +02:00 |
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philsmd
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51adbbbe53
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fix buffer sizes for -m 13600 = WinZip
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2021-07-30 15:23:33 +02:00 |
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Jens Steube
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c9d79374a5
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Add missing u64 vector datatypes mapping for OpenCL
Improve u64 usage in OpenCL/inc_zip_inflate.cl
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2021-07-27 09:54:15 +02:00 |
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Jens Steube
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f6de3e61e0
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Merge pull request #2906 from hashcat/master
Backports
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2021-07-27 09:48:56 +02:00 |
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Jens Steube
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e5ac568afb
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Merge pull request #2903 from matrix/snmpv3_mod
fix snmpv3 md5/sha1, tested with real hashes
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2021-07-27 09:47:47 +02:00 |
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Jens Steube
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e627288c04
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Merge pull request #2897 from matrix/snmpv3_md5_sha1
Added hash-mode: SNMPv3 HMAC-MD5-96/HMAC-SHA1-96
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2021-07-27 09:47:11 +02:00 |
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Jens Steube
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fd2cb59d26
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AMD GPUs: On Apple OpenCL platform, we ask for the preferred kernel thread size rather than hard-coding 32
ECC secp256k1: Removed the inline assembly code for AMD GPUs because the latest JIT compilers optimize it with the same efficiency
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2021-07-27 09:37:31 +02:00 |
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Gabriele Gristina
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d711c593de
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fix to crack real hashes
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2021-07-26 23:00:33 +02:00 |
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Gabriele Gristina
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d62fa617fb
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fix to crack real hashes
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2021-07-26 22:45:02 +02:00 |
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Gabriele Gristina
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c20ff01c39
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using shared buffer between md5 and sha1 SNMPV3_TMP_ELEMS_OPT, fix to crack real hashes
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2021-07-26 22:25:15 +02:00 |
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Gabriele Gristina
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45fce5d3a3
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fix snmpv3 md5/sha1, tested with real hashes
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2021-07-26 19:04:30 +02:00 |
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Jens Steube
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7f419c68af
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Blowfish Kernels: Backport optimizations reducing bank conflicts from bcrypt to Password Safe v2 and Open Document Format (ODF) 1.1
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2021-07-26 13:38:39 +02:00 |
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Jens Steube
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f3f6cfadb7
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Password Safe v2: Backport optimizations reducing bank conflicts in bcrypt
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2021-07-26 10:17:21 +02:00 |
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Jens Steube
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b66c093c17
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Merge pull request #2902 from hashcat/master
Backports
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2021-07-26 08:18:35 +02:00 |
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Jens Steube
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1e3bd2c8a0
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AMD GPUs: Add inline assembly code for md5crypt/sha256crypt, PDF 1.7, 7-Zip, RAR3, Samsung Android and Windows Phone 8+
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2021-07-26 07:59:12 +02:00 |
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Jens Steube
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84a4058edf
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Merge pull request #2900 from hashcat/master
Backport changes
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2021-07-25 10:34:05 +02:00 |
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Gabriele Gristina
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58bb2b69b4
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Added hash-mode: SNMPv3 HMAC-SHA256-192
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2021-07-24 18:57:25 +02:00 |
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Gabriele Gristina
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7683ca19a3
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Added hash-mode: SNMPv3 HMAC-SHA224-128
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2021-07-24 18:36:10 +02:00 |
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Gabriele Gristina
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7c8d7f7831
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Added hash-mode: SNMPv3 HMAC-MD5-96/HMAC-SHA1-96
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2021-07-24 17:03:50 +02:00 |
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Gabriele Gristina
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4f10377703
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Added hash-mode: SNMPv3 HMAC-MD5-96
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2021-07-24 13:56:49 +02:00 |
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Jens Steube
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3a31b669b5
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Optimize and clean up -m 25200 code.
Speed on CPU: 1521 -> 2066 (35% faster)
Speed on GPU: 16610 -> 157754 (9.4 times faster)
Works for all password lengths
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2021-07-24 11:58:36 +02:00 |
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Jens Steube
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3f6c5a0042
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Update module_unstable_warning() for -m 172xx on HIP
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2021-07-23 21:09:55 +02:00 |
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Jens Steube
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5ffcaa980d
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HIP Backend: Added support to support HIP 4.4 and later, but added check to rule out older versions because they are incompatible
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2021-07-23 16:04:34 +02:00 |
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Gabriele Gristina
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6d83a69f7d
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using hex_encode/hex_decode + small fixes
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2021-07-22 19:10:34 +02:00 |
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Gabriele Gristina
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db7cb16a3b
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using sha1_hmac_update_global
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2021-07-21 10:19:05 +02:00 |
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Gabriele Gristina
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7ea5da51a8
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Added hash-mode: SNMPv3 HMAC-SHA1-96
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2021-07-20 22:24:35 +02:00 |
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Jens Steube
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41156bb0a5
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Improve PIM fix for use on macOS
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2021-07-20 15:10:49 +02:00 |
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Jens Steube
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a026171fb3
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Merge pull request #2879 from jtojanen/master
Implement gpu_bzero
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2021-07-20 13:00:37 +02:00 |
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Jens Steube
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777512e862
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Fixed false negative in all VeraCrypt hash-modes if both conditions are met: 1. use CPU for cracking and 2. PIM range was used
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2021-07-20 11:31:31 +02:00 |
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Jukka Ojanen
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4c0f6dd263
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Merge branch 'hashcat:master' into master
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2021-07-20 12:00:41 +03:00 |
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Jens Steube
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92dc57df28
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Revert adding make_u32x() for constants to crypto primitives, fails on OpenCL
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2021-07-20 10:34:34 +02:00 |
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Jens Steube
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bdb7999f07
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Switch HIP vector datatypes to OpenCL like ext_vector_type()
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2021-07-19 20:24:30 +02:00 |
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Jens Steube
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9421e1f89d
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Fixed datatype in function sha384_hmac_init_vector_128() that could come into effect if vector datatype was manually set
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2021-07-19 15:58:38 +02:00 |
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Jens Steube
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0d8b4b74ad
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More CUDA special backports to HIP
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2021-07-18 22:56:22 +02:00 |
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Jens Steube
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257098a301
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Get rid of hip/hip_runtime.h dependancy
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2021-07-18 21:14:45 +02:00 |
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Jens Steube
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bd92589af1
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Optimize BLAKE2B_ROUND() 64 bit rotates
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2021-07-17 18:18:22 +02:00 |
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Jens Steube
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3becb253d3
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Enable vector datatypes for HIP
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2021-07-17 18:01:01 +02:00 |
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Jukka Ojanen
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a2a1d04bcf
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Implement gpu_bzero
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2021-07-17 19:00:10 +03:00 |
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Jens Steube
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141b59b80e
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Merge pull request #2883 from hashcat/HIP
Merge HIP branch into master
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2021-07-16 19:54:00 +02:00 |
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Jens Steube
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45e65dd05a
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Backport more ROCm based optimizations to HIP
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2021-07-15 23:34:27 +02:00 |
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Jens Steube
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4730cf6e79
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WinZip Kernel: Increase supported data length from 8k to 16mb
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2021-07-15 16:42:29 +02:00 |
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Jens Steube
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d130cc66b3
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Optimize ISA code on HIP for V_ALIGNBIT_B32 using a different template for inline assembly
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2021-07-15 09:57:41 +02:00 |
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Jens Steube
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cf512faa53
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Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
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2021-07-14 17:06:20 +02:00 |
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Jens Steube
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4b68a8fb4f
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Merge pull request #2878 from hashcat/master
Backports
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2021-07-13 22:26:28 +02:00 |
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Jens Steube
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4e773f32b2
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Fix variable declaration block level in -m 19600 and -m 19700
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2021-07-13 22:22:53 +02:00 |
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Jens Steube
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7faf6859d6
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Backport hand-optimized compiler settings in modules from ROCM to HIP
Backport DECLSPEC settings from ROCM to HIP
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2021-07-13 20:45:01 +02:00 |
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Jens Steube
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674ca7d88f
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Add GPU threads to kernel cache checksum because it has an influence on HIP offline compile options
Add V_ALIGNBIT_B32 inline assembly wrapper because HIP does not provide amd_bitalign()
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2021-07-12 11:27:05 +02:00 |
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