9 Commits

Author	SHA1	Message	Date
Jens Steube	18ec554ea0	Cleanup of all raw-SHA1 based algorithms	2016-02-24 15:27:02 +01:00
Jens Steube	c7a1a1e84d	New SIMD code for -a 1 -m 100	2016-02-22 10:09:16 +01:00
Jens Steube	1d3795a3ab	Converted _a3 kernels, use SIMD for CPU and GPU	2016-01-23 15:32:31 +01:00
Jens Steube	a62b7ed06e	Upgrade kernel to support dynamic local work sizes	2016-01-19 16:06:03 +01:00
jsteube	331188167c	Replace the substring GPU to a more appropriate "device" or "kernel" substring depending on the context	2016-01-05 08:26:44 +01:00
jsteube	5f7c47b461	Fix path to includes	2016-01-03 01:48:05 +01:00
jsteube	2283d5c843	Fix more append_* functions in kernels	2015-12-15 16:50:21 +01:00
jsteube	50f39b3563	Fix append_* function calls	2015-12-15 13:42:37 +01:00
jsteube	0bf4e3c34a	- Dropped all vector code since new GPU's are all scalar, makes the code much easier ... - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor	2015-12-15 12:04:22 +01:00