mirror of
https://github.com/hashcat/hashcat.git
synced 2024-12-01 20:38:14 +00:00
Add hm_NVML_nvmlDeviceGetPciInfo() for later use
This commit is contained in:
parent
d259f96790
commit
ee6b81aa62
@ -12,13 +12,22 @@
|
|||||||
|
|
||||||
typedef struct nvmlDevice_st* nvmlDevice_t;
|
typedef struct nvmlDevice_st* nvmlDevice_t;
|
||||||
|
|
||||||
typedef struct nvmlPciInfo_st {
|
typedef struct nvmlPciInfo_st
|
||||||
char busId[16];
|
{
|
||||||
unsigned int domain;
|
char busId[16]; //!< The tuple domain:bus:device.function PCI identifier (& NULL terminator)
|
||||||
unsigned int bus;
|
unsigned int domain; //!< The PCI domain on which the device's bus resides, 0 to 0xffff
|
||||||
unsigned int device;
|
unsigned int bus; //!< The bus on which the device resides, 0 to 0xff
|
||||||
unsigned int pciDeviceId;
|
unsigned int device; //!< The device's id on the bus, 0 to 31
|
||||||
unsigned int pciSubSystemId;
|
unsigned int pciDeviceId; //!< The combined 16-bit device id and 16-bit vendor id
|
||||||
|
|
||||||
|
// Added in NVML 2.285 API
|
||||||
|
unsigned int pciSubSystemId; //!< The 32-bit Sub System Device ID
|
||||||
|
|
||||||
|
// NVIDIA reserved for internal use only
|
||||||
|
unsigned int reserved0;
|
||||||
|
unsigned int reserved1;
|
||||||
|
unsigned int reserved2;
|
||||||
|
unsigned int reserved3;
|
||||||
} nvmlPciInfo_t;
|
} nvmlPciInfo_t;
|
||||||
|
|
||||||
typedef struct nvmlUtilization_st {
|
typedef struct nvmlUtilization_st {
|
||||||
@ -186,6 +195,7 @@ typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_SET_OPERATIONMODE) (nvmlDevice_
|
|||||||
typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_POWERMANAGEMENTLIMITCONSTRAINTS) (nvmlDevice_t, unsigned int *, unsigned int *);
|
typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_POWERMANAGEMENTLIMITCONSTRAINTS) (nvmlDevice_t, unsigned int *, unsigned int *);
|
||||||
typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_SET_POWERMANAGEMENTLIMIT) (nvmlDevice_t, unsigned int);
|
typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_SET_POWERMANAGEMENTLIMIT) (nvmlDevice_t, unsigned int);
|
||||||
typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_POWERMANAGEMENTLIMIT) (nvmlDevice_t, unsigned int *);
|
typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_POWERMANAGEMENTLIMIT) (nvmlDevice_t, unsigned int *);
|
||||||
|
typedef nvmlReturn_t (*NVML_API_CALL NVML_DEVICE_GET_PCIINFO) (nvmlDevice_t, nvmlPciInfo_t *);
|
||||||
|
|
||||||
#if defined (_POSIX)
|
#if defined (_POSIX)
|
||||||
typedef void *NVML_LIB;
|
typedef void *NVML_LIB;
|
||||||
@ -218,6 +228,7 @@ typedef struct hm_nvml_lib
|
|||||||
NVML_DEVICE_GET_POWERMANAGEMENTLIMITCONSTRAINTS nvmlDeviceGetPowerManagementLimitConstraints;
|
NVML_DEVICE_GET_POWERMANAGEMENTLIMITCONSTRAINTS nvmlDeviceGetPowerManagementLimitConstraints;
|
||||||
NVML_DEVICE_SET_POWERMANAGEMENTLIMIT nvmlDeviceSetPowerManagementLimit;
|
NVML_DEVICE_SET_POWERMANAGEMENTLIMIT nvmlDeviceSetPowerManagementLimit;
|
||||||
NVML_DEVICE_GET_POWERMANAGEMENTLIMIT nvmlDeviceGetPowerManagementLimit;
|
NVML_DEVICE_GET_POWERMANAGEMENTLIMIT nvmlDeviceGetPowerManagementLimit;
|
||||||
|
NVML_DEVICE_GET_PCIINFO nvmlDeviceGetPciInfo;
|
||||||
|
|
||||||
} hm_nvml_lib_t;
|
} hm_nvml_lib_t;
|
||||||
|
|
||||||
|
21
src/hwmon.c
21
src/hwmon.c
@ -584,6 +584,7 @@ static int nvml_init (hashcat_ctx_t *hashcat_ctx)
|
|||||||
HC_LOAD_FUNC(nvml, nvmlDeviceGetPowerManagementLimitConstraints, NVML_DEVICE_GET_POWERMANAGEMENTLIMITCONSTRAINTS, NVML, 0)
|
HC_LOAD_FUNC(nvml, nvmlDeviceGetPowerManagementLimitConstraints, NVML_DEVICE_GET_POWERMANAGEMENTLIMITCONSTRAINTS, NVML, 0)
|
||||||
HC_LOAD_FUNC(nvml, nvmlDeviceSetPowerManagementLimit, NVML_DEVICE_SET_POWERMANAGEMENTLIMIT, NVML, 0)
|
HC_LOAD_FUNC(nvml, nvmlDeviceSetPowerManagementLimit, NVML_DEVICE_SET_POWERMANAGEMENTLIMIT, NVML, 0)
|
||||||
HC_LOAD_FUNC(nvml, nvmlDeviceGetPowerManagementLimit, NVML_DEVICE_GET_POWERMANAGEMENTLIMIT, NVML, 0)
|
HC_LOAD_FUNC(nvml, nvmlDeviceGetPowerManagementLimit, NVML_DEVICE_GET_POWERMANAGEMENTLIMIT, NVML, 0)
|
||||||
|
HC_LOAD_FUNC(nvml, nvmlDeviceGetPciInfo, NVML_DEVICE_GET_PCIINFO, NVML, 0)
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@ -1022,6 +1023,26 @@ static int hm_NVML_nvmlDeviceGetPowerManagementLimit (hashcat_ctx_t *hashcat_ctx
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int hm_NVML_nvmlDeviceGetPciInfo (hashcat_ctx_t *hashcat_ctx, nvmlDevice_t device, nvmlPciInfo_t *pci)
|
||||||
|
{
|
||||||
|
hwmon_ctx_t *hwmon_ctx = hashcat_ctx->hwmon_ctx;
|
||||||
|
|
||||||
|
NVML_PTR *nvml = hwmon_ctx->hm_nvml;
|
||||||
|
|
||||||
|
const nvmlReturn_t nvml_rc = nvml->nvmlDeviceGetPciInfo (device, pci);
|
||||||
|
|
||||||
|
if (nvml_rc != NVML_SUCCESS)
|
||||||
|
{
|
||||||
|
const char *string = hm_NVML_nvmlErrorString (nvml, nvml_rc);
|
||||||
|
|
||||||
|
event_log_error (hashcat_ctx, "nvmlDeviceGetPciInfo(): %s", string);
|
||||||
|
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
// nvapi functions
|
// nvapi functions
|
||||||
|
|
||||||
static int nvapi_init (hashcat_ctx_t *hashcat_ctx)
|
static int nvapi_init (hashcat_ctx_t *hashcat_ctx)
|
||||||
|
Loading…
Reference in New Issue
Block a user