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Code Issues Releases Wiki Activity

Query PCI-Express bus/device/function and store for later use

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This commit is contained in:
jsteube 2016-11-05 20:23:05 +01:00
parent 6fdb2bfca4
commit e63bc4d328
3 changed files with 50 additions and 5 deletions
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18
include/ext_OpenCL.h
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@ -25,6 +25,24 @@
#include <CL/cl.h> #include <CL/cl.h>
#endif #endif
// NVIDIA extras
#define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV 0x4000
#define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV 0x4001
#define CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV 0x4005
#define CL_DEVICE_PCI_BUS_ID_NV 0x4008
#define CL_DEVICE_PCI_SLOT_ID_NV 0x4009
// AMD extras
#define CL_DEVICE_TOPOLOGY_AMD 0x4037
typedef union
{
struct { cl_uint type; cl_uint data[5]; } raw;
struct { cl_uint type; cl_char unused[17]; cl_char bus; cl_char device; cl_char function; } pcie;
} cl_device_topology_amd;
#define CL_PLATFORMS_MAX 16 #define CL_PLATFORMS_MAX 16
typedef cl_int (CL_API_CALL *OCL_CLBUILDPROGRAM) (cl_program, cl_uint, const cl_device_id *, const char *, void (CL_CALLBACK *)(cl_program, void *), void *); typedef cl_int (CL_API_CALL *OCL_CLBUILDPROGRAM) (cl_program, cl_uint, const cl_device_id *, const char *, void (CL_CALLBACK *)(cl_program, void *), void *);

4
include/types.h
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@ -828,6 +828,10 @@ typedef struct hc_device_param
u32 sm_minor; u32 sm_minor;
u32 kernel_exec_timeout; u32 kernel_exec_timeout;
u8 pcie_bus;
u8 pcie_device;
u8 pcie_function;
u32 device_processors; u32 device_processors;
u64 device_maxmem_alloc; u64 device_maxmem_alloc;
u64 device_global_mem; u64 device_global_mem;

33
src/opencl.c
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@ -2608,11 +2608,37 @@ int opencl_ctx_devices_init (hashcat_ctx_t *hashcat_ctx, const int comptime)
if (device_type & CL_DEVICE_TYPE_GPU) if (device_type & CL_DEVICE_TYPE_GPU)
{ {
if (device_vendor_id == VENDOR_ID_AMD)
{
cl_device_topology_amd amdtopo;
CL_rc = hc_clGetDeviceInfo (hashcat_ctx, device_param->device, CL_DEVICE_TOPOLOGY_AMD, sizeof (amdtopo), &amdtopo, NULL);
if (CL_rc == -1) return -1;
device_param->pcie_bus = amdtopo.pcie.bus;
device_param->pcie_device = amdtopo.pcie.device;
device_param->pcie_function = amdtopo.pcie.function;
}
if (device_vendor_id == VENDOR_ID_NV) if (device_vendor_id == VENDOR_ID_NV)
{ {
cl_uint kernel_exec_timeout = 0; cl_uint pci_bus_id_nv; // is cl_uint the right type for them??
cl_uint pci_slot_id_nv;
#define CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV 0x4005 CL_rc = hc_clGetDeviceInfo (hashcat_ctx, device_param->device, CL_DEVICE_PCI_BUS_ID_NV, sizeof (pci_bus_id_nv), &pci_bus_id_nv, NULL);
if (CL_rc == -1) return -1;
CL_rc = hc_clGetDeviceInfo (hashcat_ctx, device_param->device, CL_DEVICE_PCI_SLOT_ID_NV, sizeof (pci_slot_id_nv), &pci_slot_id_nv, NULL);
if (CL_rc == -1) return -1;
device_param->pcie_bus = (u8) (pci_bus_id_nv);
device_param->pcie_device = (u8) (pci_slot_id_nv >> 3);
device_param->pcie_function = (u8) (pci_slot_id_nv & 7);
cl_uint kernel_exec_timeout = 0;
CL_rc = hc_clGetDeviceInfo (hashcat_ctx, device_param->device, CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV, sizeof (kernel_exec_timeout), &kernel_exec_timeout, NULL); CL_rc = hc_clGetDeviceInfo (hashcat_ctx, device_param->device, CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV, sizeof (kernel_exec_timeout), &kernel_exec_timeout, NULL);
@ -2623,9 +2649,6 @@ int opencl_ctx_devices_init (hashcat_ctx_t *hashcat_ctx, const int comptime)
cl_uint sm_minor = 0; cl_uint sm_minor = 0;
cl_uint sm_major = 0; cl_uint sm_major = 0;
#define CL_DEVICE_COMPUTE_CAPABILITY_MAJOR_NV 0x4000
#define CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV 0x4001
CL_rc = hc_clGetDeviceInfo (hashcat_ctx, device_param->device, CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV, sizeof (sm_minor), &sm_minor, NULL); CL_rc = hc_clGetDeviceInfo (hashcat_ctx, device_param->device, CL_DEVICE_COMPUTE_CAPABILITY_MINOR_NV, sizeof (sm_minor), &sm_minor, NULL);
if (CL_rc == -1) return -1; if (CL_rc == -1) return -1;