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Disable inline assembly instruction tests for CUDA and refer to documented requirements
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@ -280,6 +280,7 @@ static bool setup_opencl_device_types_filter (hashcat_ctx_t *hashcat_ctx, const
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return true;
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return true;
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}
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}
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/*
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static bool cuda_test_instruction (hashcat_ctx_t *hashcat_ctx, const int sm_major, const int sm_minor, const char *kernel_buf)
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static bool cuda_test_instruction (hashcat_ctx_t *hashcat_ctx, const int sm_major, const int sm_minor, const char *kernel_buf)
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{
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{
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nvrtcProgram program;
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nvrtcProgram program;
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@ -356,6 +357,7 @@ static bool cuda_test_instruction (hashcat_ctx_t *hashcat_ctx, const int sm_majo
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return true;
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return true;
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}
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}
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*/
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static bool opencl_test_instruction (hashcat_ctx_t *hashcat_ctx, cl_context context, cl_device_id device, const char *kernel_buf)
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static bool opencl_test_instruction (hashcat_ctx_t *hashcat_ctx, cl_context context, cl_device_id device, const char *kernel_buf)
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{
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{
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@ -5444,6 +5446,18 @@ int backend_ctx_devices_init (hashcat_ctx_t *hashcat_ctx, const int comptime)
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//
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//
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//if (rc_cuCtxSetCacheConfig == -1) return -1;
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//if (rc_cuCtxSetCacheConfig == -1) return -1;
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const int sm = (device_param->sm_major * 10) + device_param->sm_minor;
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device_param->has_add = (sm >= 12) ? true : false;
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device_param->has_addc = (sm >= 12) ? true : false;
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device_param->has_sub = (sm >= 12) ? true : false;
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device_param->has_subc = (sm >= 12) ? true : false;
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device_param->has_bfe = (sm >= 20) ? true : false;
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device_param->has_lop3 = (sm >= 50) ? true : false;
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device_param->has_mov64 = (sm >= 10) ? true : false;
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device_param->has_prmt = (sm >= 20) ? true : false;
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/*
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#define RUN_INSTRUCTION_CHECKS() \
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#define RUN_INSTRUCTION_CHECKS() \
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device_param->has_add = cuda_test_instruction (hashcat_ctx, sm_major, sm_minor, "__global__ void test () { unsigned int r; asm volatile (\"add.cc.u32 %0, 0, 0;\" : \"=r\"(r)); }"); \
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device_param->has_add = cuda_test_instruction (hashcat_ctx, sm_major, sm_minor, "__global__ void test () { unsigned int r; asm volatile (\"add.cc.u32 %0, 0, 0;\" : \"=r\"(r)); }"); \
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device_param->has_addc = cuda_test_instruction (hashcat_ctx, sm_major, sm_minor, "__global__ void test () { unsigned int r; asm volatile (\"addc.cc.u32 %0, 0, 0;\" : \"=r\"(r)); }"); \
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device_param->has_addc = cuda_test_instruction (hashcat_ctx, sm_major, sm_minor, "__global__ void test () { unsigned int r; asm volatile (\"addc.cc.u32 %0, 0, 0;\" : \"=r\"(r)); }"); \
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@ -5480,6 +5494,7 @@ int backend_ctx_devices_init (hashcat_ctx_t *hashcat_ctx, const int comptime)
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}
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}
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#undef RUN_INSTRUCTION_CHECKS
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#undef RUN_INSTRUCTION_CHECKS
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*/
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// device_available_mem
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// device_available_mem
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@ -6214,6 +6229,18 @@ int backend_ctx_devices_init (hashcat_ctx_t *hashcat_ctx, const int comptime)
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if ((device_param->opencl_device_type & CL_DEVICE_TYPE_GPU) && (device_param->opencl_platform_vendor_id == VENDOR_ID_NV))
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if ((device_param->opencl_device_type & CL_DEVICE_TYPE_GPU) && (device_param->opencl_platform_vendor_id == VENDOR_ID_NV))
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{
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{
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const int sm = (device_param->sm_major * 10) + device_param->sm_minor;
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device_param->has_add = (sm >= 12) ? true : false;
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device_param->has_addc = (sm >= 12) ? true : false;
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device_param->has_sub = (sm >= 12) ? true : false;
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device_param->has_subc = (sm >= 12) ? true : false;
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device_param->has_bfe = (sm >= 20) ? true : false;
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device_param->has_lop3 = (sm >= 50) ? true : false;
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device_param->has_mov64 = (sm >= 10) ? true : false;
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device_param->has_prmt = (sm >= 20) ? true : false;
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/*
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#define RUN_INSTRUCTION_CHECKS() \
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#define RUN_INSTRUCTION_CHECKS() \
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device_param->has_add = opencl_test_instruction (hashcat_ctx, context, device_param->opencl_device, "__kernel void test () { uint r; asm volatile (\"add.cc.u32 %0, 0, 0;\" : \"=r\"(r)); }"); \
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device_param->has_add = opencl_test_instruction (hashcat_ctx, context, device_param->opencl_device, "__kernel void test () { uint r; asm volatile (\"add.cc.u32 %0, 0, 0;\" : \"=r\"(r)); }"); \
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device_param->has_addc = opencl_test_instruction (hashcat_ctx, context, device_param->opencl_device, "__kernel void test () { uint r; asm volatile (\"addc.cc.u32 %0, 0, 0;\" : \"=r\"(r)); }"); \
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device_param->has_addc = opencl_test_instruction (hashcat_ctx, context, device_param->opencl_device, "__kernel void test () { uint r; asm volatile (\"addc.cc.u32 %0, 0, 0;\" : \"=r\"(r)); }"); \
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@ -6250,6 +6277,7 @@ int backend_ctx_devices_init (hashcat_ctx_t *hashcat_ctx, const int comptime)
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}
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}
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#undef RUN_INSTRUCTION_CHECKS
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#undef RUN_INSTRUCTION_CHECKS
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*/
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}
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}
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// device_available_mem
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// device_available_mem
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