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Replace code in switch_buffer_by_offset_be_S() with code generated with code generators
This commit is contained in:
jsteube
parent
84bc2edd5b
commit
cd5223eb2f
@ -8390,7 +8390,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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#if defined IS_AMD || defined IS_GENERIC
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switch (offset / 4)
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{
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case 0:
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case 0:
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w3[3] = amd_bytealign_S (w3[2], w3[3], offset);
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w3[2] = amd_bytealign_S (w3[1], w3[2], offset);
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w3[1] = amd_bytealign_S (w3[0], w3[1], offset);
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@ -8407,9 +8407,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = amd_bytealign_S (w0[1], w0[2], offset);
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w0[1] = amd_bytealign_S (w0[0], w0[1], offset);
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w0[0] = amd_bytealign_S ( 0, w0[0], offset);
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break;
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case 1:
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case 1:
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w3[3] = amd_bytealign_S (w3[1], w3[2], offset);
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w3[2] = amd_bytealign_S (w3[0], w3[1], offset);
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w3[1] = amd_bytealign_S (w2[3], w3[0], offset);
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@ -8426,9 +8427,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = amd_bytealign_S (w0[0], w0[1], offset);
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w0[1] = amd_bytealign_S ( 0, w0[0], offset);
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w0[0] = 0;
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break;
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case 2:
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case 2:
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w3[3] = amd_bytealign_S (w3[0], w3[1], offset);
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w3[2] = amd_bytealign_S (w2[3], w3[0], offset);
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w3[1] = amd_bytealign_S (w2[2], w2[3], offset);
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@ -8445,9 +8447,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = amd_bytealign_S ( 0, w0[0], offset);
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 3:
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case 3:
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w3[3] = amd_bytealign_S (w2[3], w3[0], offset);
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w3[2] = amd_bytealign_S (w2[2], w2[3], offset);
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w3[1] = amd_bytealign_S (w2[1], w2[2], offset);
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@ -8464,9 +8467,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 4:
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case 4:
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w3[3] = amd_bytealign_S (w2[2], w2[3], offset);
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w3[2] = amd_bytealign_S (w2[1], w2[2], offset);
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w3[1] = amd_bytealign_S (w2[0], w2[1], offset);
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@ -8483,9 +8487,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 5:
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case 5:
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w3[3] = amd_bytealign_S (w2[1], w2[2], offset);
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w3[2] = amd_bytealign_S (w2[0], w2[1], offset);
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w3[1] = amd_bytealign_S (w1[3], w2[0], offset);
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@ -8502,9 +8507,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 6:
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case 6:
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w3[3] = amd_bytealign_S (w2[0], w2[1], offset);
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w3[2] = amd_bytealign_S (w1[3], w2[0], offset);
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w3[1] = amd_bytealign_S (w1[2], w1[3], offset);
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@ -8521,9 +8527,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 7:
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case 7:
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w3[3] = amd_bytealign_S (w1[3], w2[0], offset);
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w3[2] = amd_bytealign_S (w1[2], w1[3], offset);
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w3[1] = amd_bytealign_S (w1[1], w1[2], offset);
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@ -8540,9 +8547,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 8:
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case 8:
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w3[3] = amd_bytealign_S (w1[2], w1[3], offset);
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w3[2] = amd_bytealign_S (w1[1], w1[2], offset);
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w3[1] = amd_bytealign_S (w1[0], w1[1], offset);
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@ -8559,9 +8567,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 9:
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case 9:
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w3[3] = amd_bytealign_S (w1[1], w1[2], offset);
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w3[2] = amd_bytealign_S (w1[0], w1[1], offset);
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w3[1] = amd_bytealign_S (w0[3], w1[0], offset);
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@ -8578,6 +8587,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 10:
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@ -8597,6 +8607,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 11:
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@ -8616,6 +8627,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 12:
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@ -8635,6 +8647,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 13:
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@ -8654,6 +8667,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 14:
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@ -8673,6 +8687,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 15:
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@ -8692,6 +8707,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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}
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#endif
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@ -8701,7 +8717,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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switch (offset / 4)
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{
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case 0:
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case 0:
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w3[3] = __byte_perm_S (w3[3], w3[2], selector);
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w3[2] = __byte_perm_S (w3[2], w3[1], selector);
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w3[1] = __byte_perm_S (w3[1], w3[0], selector);
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@ -8718,9 +8734,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = __byte_perm_S (w0[2], w0[1], selector);
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w0[1] = __byte_perm_S (w0[1], w0[0], selector);
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w0[0] = __byte_perm_S (w0[0], 0, selector);
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break;
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case 1:
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case 1:
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w3[3] = __byte_perm_S (w3[2], w3[1], selector);
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w3[2] = __byte_perm_S (w3[1], w3[0], selector);
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w3[1] = __byte_perm_S (w3[0], w2[3], selector);
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@ -8737,9 +8754,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = __byte_perm_S (w0[1], w0[0], selector);
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w0[1] = __byte_perm_S (w0[0], 0, selector);
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w0[0] = 0;
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break;
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case 2:
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case 2:
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w3[3] = __byte_perm_S (w3[1], w3[0], selector);
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w3[2] = __byte_perm_S (w3[0], w2[3], selector);
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w3[1] = __byte_perm_S (w2[3], w2[2], selector);
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@ -8756,9 +8774,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = __byte_perm_S (w0[0], 0, selector);
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 3:
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case 3:
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w3[3] = __byte_perm_S (w3[0], w2[3], selector);
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w3[2] = __byte_perm_S (w2[3], w2[2], selector);
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w3[1] = __byte_perm_S (w2[2], w2[1], selector);
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@ -8775,9 +8794,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 4:
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case 4:
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w3[3] = __byte_perm_S (w2[3], w2[2], selector);
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w3[2] = __byte_perm_S (w2[2], w2[1], selector);
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w3[1] = __byte_perm_S (w2[1], w2[0], selector);
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@ -8794,9 +8814,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 5:
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case 5:
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w3[3] = __byte_perm_S (w2[2], w2[1], selector);
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w3[2] = __byte_perm_S (w2[1], w2[0], selector);
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w3[1] = __byte_perm_S (w2[0], w1[3], selector);
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@ -8813,9 +8834,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 6:
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case 6:
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w3[3] = __byte_perm_S (w2[1], w2[0], selector);
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w3[2] = __byte_perm_S (w2[0], w1[3], selector);
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w3[1] = __byte_perm_S (w1[3], w1[2], selector);
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@ -8832,9 +8854,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 7:
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case 7:
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w3[3] = __byte_perm_S (w2[0], w1[3], selector);
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w3[2] = __byte_perm_S (w1[3], w1[2], selector);
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w3[1] = __byte_perm_S (w1[2], w1[1], selector);
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@ -8851,9 +8874,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 8:
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case 8:
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w3[3] = __byte_perm_S (w1[3], w1[2], selector);
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w3[2] = __byte_perm_S (w1[2], w1[1], selector);
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w3[1] = __byte_perm_S (w1[1], w1[0], selector);
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@ -8870,9 +8894,10 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 9:
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case 9:
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w3[3] = __byte_perm_S (w1[2], w1[1], selector);
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w3[2] = __byte_perm_S (w1[1], w1[0], selector);
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w3[1] = __byte_perm_S (w1[0], w0[3], selector);
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@ -8889,6 +8914,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 10:
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@ -8908,6 +8934,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 11:
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@ -8927,6 +8954,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 12:
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@ -8946,6 +8974,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 13:
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@ -8965,6 +8994,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 14:
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@ -8984,6 +9014,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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case 15:
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@ -9003,6 +9034,7 @@ inline void switch_buffer_by_offset_be_S (u32 w0[4], u32 w1[4], u32 w2[4], u32 w
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w0[2] = 0;
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w0[1] = 0;
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w0[0] = 0;
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break;
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}
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#endif
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@ -12,6 +12,7 @@
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#include "inc_common.cl"
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#include "inc_simd.cl"
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#include "inc_hash_md5.cl"
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#include "inc_hash_sha512.cl"
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#define MD5_STEP_REV(f,a,b,c,d,x,t,s) \
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{ \
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