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Switched matching NvAPI device with OpenCL device by using PCI bus, device and function

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This commit is contained in:
Jens Steube 2016-12-27 17:41:29 +01:00
parent 2c82e53d38
commit c77c9ff72e
3 changed files with 91 additions and 9 deletions
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1
docs/changes.txt
View File

@ -31,6 +31,7 @@
##
- Hardware management: Switched matching NVML device with OpenCL device by using PCI bus, device and function
- Hardware management: Switched matching NvAPI device with OpenCL device by using PCI bus, device and function
- Sanity: Added sanity check to disallow --speed-only in combination with -i
- Potfile: In v3.10 already, the default potfile suffix changed but the note about was missing. The "hashcat.pot" became "hashcat.potfile"
- Threads: Replaced all calls to strerror() with %m printf() GNU extension to ensure thread safety

6
include/ext_nvapi.h
View File

@ -208,6 +208,8 @@ NVAPI_INTERFACE NvAPI_GPU_GetPerfPoliciesInfo (NvPhysicalGpuHandle hPhysicalGpu,
NVAPI_INTERFACE NvAPI_GPU_GetPerfPoliciesStatus (NvPhysicalGpuHandle hPhysicalGpu, NV_GPU_PERF_POLICIES_STATUS_PARAMS_V1 *perfPolicies_status);
NVAPI_INTERFACE NvAPI_GPU_SetCoolerLevels (NvPhysicalGpuHandle hPhysicalGpu, NvU32 coolerIndex, NV_GPU_COOLER_LEVELS *pCoolerLevels);
NVAPI_INTERFACE NvAPI_GPU_RestoreCoolerSettings (NvPhysicalGpuHandle hPhysicalGpu, NvU32 coolerIndex);
NVAPI_INTERFACE NvAPI_GPU_GetBusId (NvPhysicalGpuHandle hPhysicalGpu, NvU32 *pBusId);
NVAPI_INTERFACE NvAPI_GPU_GetBusSlotId (NvPhysicalGpuHandle hPhysicalGpu, NvU32 *pBusSlotId);
/*
* End of declarations from nvapi.h and subheaders
@ -230,6 +232,8 @@ typedef int (*NVAPI_API_CALL NVAPI_GPU_GETPERFPOLICIESINFO) (NvPhysicalGpuHandle
typedef int (*NVAPI_API_CALL NVAPI_GPU_GETPERFPOLICIESSTATUS) (NvPhysicalGpuHandle, NV_GPU_PERF_POLICIES_STATUS_PARAMS_V1 *);
typedef int (*NVAPI_API_CALL NVAPI_GPU_SETCOOLERLEVELS) (NvPhysicalGpuHandle, NvU32, NV_GPU_COOLER_LEVELS *);
typedef int (*NVAPI_API_CALL NVAPI_GPU_RESTORECOOLERSETTINGS) (NvPhysicalGpuHandle, NvU32);
typedef int (*NVAPI_API_CALL NVAPI_GPU_GETBUSID) (NvPhysicalGpuHandle, NvU32 *);
typedef int (*NVAPI_API_CALL NVAPI_GPU_GETBUSSLOTID) (NvPhysicalGpuHandle, NvU32 *);
#if defined (_POSIX)
typedef void *NVAPI_LIB;
@ -250,6 +254,8 @@ typedef struct hm_nvapi_lib
NVAPI_GPU_GETPERFPOLICIESSTATUS NvAPI_GPU_GetPerfPoliciesStatus;
NVAPI_GPU_SETCOOLERLEVELS NvAPI_GPU_SetCoolerLevels;
NVAPI_GPU_RESTORECOOLERSETTINGS NvAPI_GPU_RestoreCoolerSettings;
NVAPI_GPU_GETBUSID NvAPI_GPU_GetBusId;
NVAPI_GPU_GETBUSSLOTID NvAPI_GPU_GetBusSlotId;
} hm_nvapi_lib_t;

93
src/hwmon.c
View File

@ -1079,6 +1079,8 @@ static int nvapi_init (hashcat_ctx_t *hashcat_ctx)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetPerfPoliciesInfo, NVAPI_GPU_GETPERFPOLICIESINFO, nvapi_QueryInterface, 0x409D9841u, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetPerfPoliciesStatus, NVAPI_GPU_GETPERFPOLICIESSTATUS, nvapi_QueryInterface, 0x3D358A0Cu, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_SetCoolerLevels, NVAPI_GPU_SETCOOLERLEVELS, nvapi_QueryInterface, 0x891FA0AEu, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetBusId, NVAPI_GPU_GETBUSID, nvapi_QueryInterface, 0x1BE0B8E5u, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetBusSlotId, NVAPI_GPU_GETBUSSLOTID, nvapi_QueryInterface, 0x2A0A350Fu, NVAPI, 0)
return 0;
}
@ -1237,6 +1239,50 @@ static int hm_NvAPI_GPU_SetCoolerLevels (hashcat_ctx_t *hashcat_ctx, NvPhysicalG
return 0;
}
static int hm_NvAPI_GPU_GetBusId (hashcat_ctx_t *hashcat_ctx, NvPhysicalGpuHandle hPhysicalGpu, NvU32 *pBusId)
{
hwmon_ctx_t *hwmon_ctx = hashcat_ctx->hwmon_ctx;
NVAPI_PTR *nvapi = hwmon_ctx->hm_nvapi;
const NvAPI_Status NvAPI_rc = nvapi->NvAPI_GPU_GetBusId (hPhysicalGpu, pBusId);
if (NvAPI_rc != NVAPI_OK)
{
NvAPI_ShortString string = { 0 };
hm_NvAPI_GetErrorMessage (nvapi, NvAPI_rc, string);
event_log_error (hashcat_ctx, "NvAPI_GPU_GetBusId(): %s", string);
return -1;
}
return 0;
}
static int hm_NvAPI_GPU_GetBusSlotId (hashcat_ctx_t *hashcat_ctx, NvPhysicalGpuHandle hPhysicalGpu, NvU32 *pBusSlotId)
{
hwmon_ctx_t *hwmon_ctx = hashcat_ctx->hwmon_ctx;
NVAPI_PTR *nvapi = hwmon_ctx->hm_nvapi;
const NvAPI_Status NvAPI_rc = nvapi->NvAPI_GPU_GetBusSlotId (hPhysicalGpu, pBusSlotId);
if (NvAPI_rc != NVAPI_OK)
{
NvAPI_ShortString string = { 0 };
hm_NvAPI_GetErrorMessage (nvapi, NvAPI_rc, string);
event_log_error (hashcat_ctx, "NvAPI_GPU_GetBusSlotId(): %s", string);
return -1;
}
return 0;
}
/*
#if defined (__MINGW64__)
@ -3667,8 +3713,6 @@ int hwmon_ctx_init (hashcat_ctx_t *hashcat_ctx)
for (int i = 0; i < tmp_in; i++)
{
const u32 platform_devices_id = device_param->platform_devices_id;
nvmlPciInfo_t pci;
int rc = hm_NVML_nvmlDeviceGetPciInfo (hashcat_ctx, nvmlGPUHandle[i], &pci);
@ -3679,6 +3723,8 @@ int hwmon_ctx_init (hashcat_ctx_t *hashcat_ctx)
&& (device_param->pcie_device == (pci.device >> 3))
&& (device_param->pcie_function == (pci.device & 7)))
{
const u32 platform_devices_id = device_param->platform_devices_id;
hm_adapters_nvml[platform_devices_id].nvml = nvmlGPUHandle[i];
hm_adapters_nvml[platform_devices_id].buslanes_get_supported = true;
@ -3701,18 +3747,47 @@ int hwmon_ctx_init (hashcat_ctx_t *hashcat_ctx)
{
if (hm_NvAPI_Initialize (hashcat_ctx) == 0)
{
HM_ADAPTER_NVAPI *nvGPUHandle = (HM_ADAPTER_NVAPI *) hccalloc (DEVICES_MAX, sizeof (HM_ADAPTER_NVAPI));
HM_ADAPTER_NVAPI *nvGPUHandle = (HM_ADAPTER_NVAPI *) hccalloc (NVAPI_MAX_PHYSICAL_GPUS, sizeof (HM_ADAPTER_NVAPI));
int tmp_in = hm_get_adapter_index_nvapi (hashcat_ctx, nvGPUHandle);
for (int i = 0; i < tmp_in; i++)
for (u32 device_id = 0; device_id < opencl_ctx->devices_cnt; device_id++)
{
hm_adapters_nvapi[i].nvapi = nvGPUHandle[i];
hc_device_param_t *device_param = &opencl_ctx->devices_param[device_id];
hm_adapters_nvapi[i].fanspeed_set_supported = true;
hm_adapters_nvapi[i].fanpolicy_get_supported = true;
hm_adapters_nvapi[i].fanpolicy_set_supported = true;
hm_adapters_nvapi[i].throttle_get_supported = true;
if (device_param->skipped == true) continue;
if ((device_param->device_type & CL_DEVICE_TYPE_GPU) == 0) continue;
if (device_param->device_vendor_id != VENDOR_ID_NV) continue;
for (int i = 0; i < tmp_in; i++)
{
NvU32 BusId = 0;
NvU32 BusSlotId = 0;
int rc1 = hm_NvAPI_GPU_GetBusId (hashcat_ctx, nvGPUHandle[i], &BusId);
if (rc1 == -1) continue;
int rc2 = hm_NvAPI_GPU_GetBusSlotId (hashcat_ctx, nvGPUHandle[i], &BusSlotId);
if (rc2 == -1) continue;
if ((device_param->pcie_bus == BusId)
&& (device_param->pcie_device == (BusSlotId >> 3))
&& (device_param->pcie_function == (BusSlotId & 7)))
{
const u32 platform_devices_id = device_param->platform_devices_id;
hm_adapters_nvapi[platform_devices_id].nvapi = nvGPUHandle[i];
hm_adapters_nvapi[platform_devices_id].fanspeed_set_supported = true;
hm_adapters_nvapi[platform_devices_id].fanpolicy_get_supported = true;
hm_adapters_nvapi[platform_devices_id].fanpolicy_set_supported = true;
hm_adapters_nvapi[platform_devices_id].throttle_get_supported = true;
}
}
}
hcfree (nvGPUHandle);