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https://github.com/hashcat/hashcat.git
synced 2025-05-05 16:39:19 +00:00
- Fixed PHY memory handling for scrypt based algorithms
- Bring back kernel exec timeout checking for NV
This commit is contained in:
parent
19c77034a6
commit
c17bf5e865
@ -49,5 +49,6 @@ void hc_clSetKernelArg (cl_kernel kernel, cl_uint arg_index, size_t arg_size, co
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void *hc_clEnqueueMapBuffer (cl_command_queue command_queue, cl_mem buffer, cl_bool blocking_map, cl_map_flags map_flags, size_t offset, size_t cb, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event);
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void *hc_clEnqueueMapBuffer (cl_command_queue command_queue, cl_mem buffer, cl_bool blocking_map, cl_map_flags map_flags, size_t offset, size_t cb, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event);
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void hc_clEnqueueUnmapMemObject (cl_command_queue command_queue, cl_mem memobj, void *mapped_ptr, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event);
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void hc_clEnqueueUnmapMemObject (cl_command_queue command_queue, cl_mem memobj, void *mapped_ptr, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event);
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void hc_clEnqueueFillBuffer (cl_command_queue command_queue, cl_mem buffer, const void *pattern, size_t pattern_size, size_t offset, size_t size, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event);
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void hc_clEnqueueFillBuffer (cl_command_queue command_queue, cl_mem buffer, const void *pattern, size_t pattern_size, size_t offset, size_t size, cl_uint num_events_in_wait_list, const cl_event *event_wait_list, cl_event *event);
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void hc_clGetKernelWorkGroupInfo (cl_kernel kernel, cl_device_id device, cl_kernel_work_group_info param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret);
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#endif
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#endif
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@ -816,8 +816,10 @@ struct __hc_device_param
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uint sm_major;
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uint sm_major;
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uint sm_minor;
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uint sm_minor;
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uint kernel_exec_timeout;
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uint gpu_processors;
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uint gpu_processors;
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uint gpu_processor_cores;
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uint gpu_threads;
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uint gpu_threads;
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uint gpu_accel;
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uint gpu_accel;
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uint64_t gpu_maxmem_alloc;
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uint64_t gpu_maxmem_alloc;
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@ -376,3 +376,15 @@ void hc_clEnqueueFillBuffer (cl_command_queue command_queue, cl_mem buffer, cons
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exit (-1);
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exit (-1);
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}
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}
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}
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}
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void hc_clGetKernelWorkGroupInfo (cl_kernel kernel, cl_device_id device, cl_kernel_work_group_info param_name, size_t param_value_size, void *param_value, size_t *param_value_size_ret)
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{
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cl_int CL_err = clGetKernelWorkGroupInfo (kernel, device, param_name, param_value_size, param_value, param_value_size_ret);
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if (CL_err != CL_SUCCESS)
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{
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log_error ("ERROR: %s %d\n", "clGetKernelWorkGroupInfo()", CL_err);
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exit (-1);
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}
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}
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104
src/oclHashcat.c
104
src/oclHashcat.c
@ -12636,8 +12636,35 @@ int main (int argc, char **argv)
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device_param->driver_version = mystrdup (tmp);
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device_param->driver_version = mystrdup (tmp);
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if (vendor_id == VENDOR_ID_AMD)
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{
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cl_uint gpu_processor_cores = 0;
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#define CL_DEVICE_WAVEFRONT_WIDTH_AMD 0x4043
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hc_clGetDeviceInfo (device, CL_DEVICE_WAVEFRONT_WIDTH_AMD, sizeof (gpu_processor_cores), &gpu_processor_cores, NULL);
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device_param->gpu_processor_cores = gpu_processor_cores;
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}
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if (vendor_id == VENDOR_ID_NV)
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if (vendor_id == VENDOR_ID_NV)
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{
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{
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cl_uint kernel_exec_timeout = 0;
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#define CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV 0x4005
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hc_clGetDeviceInfo (device, CL_DEVICE_KERNEL_EXEC_TIMEOUT_NV, sizeof (kernel_exec_timeout), &kernel_exec_timeout, NULL);
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device_param->kernel_exec_timeout = kernel_exec_timeout;
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cl_uint gpu_processor_cores = 0;
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#define CL_DEVICE_WARP_SIZE_NV 0x4003
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hc_clGetDeviceInfo (device, CL_DEVICE_WARP_SIZE_NV, sizeof (gpu_processor_cores), &gpu_processor_cores, NULL);
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device_param->gpu_processor_cores = gpu_processor_cores;
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cl_uint sm_minor = 0;
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cl_uint sm_minor = 0;
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cl_uint sm_major = 0;
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cl_uint sm_major = 0;
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@ -12652,9 +12679,21 @@ int main (int argc, char **argv)
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}
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}
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/**
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/**
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* catalyst driver check
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* common driver check
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*/
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*/
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if (vendor_id == VENDOR_ID_NV)
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{
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if (device_param->kernel_exec_timeout != 0)
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{
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if (data.quiet == 0) log_info ("Device #%u: WARNING! Kernel exec timeout is not disabled, it might cause you errors of code 702", device_id + 1);
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#if _WIN
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if (data.quiet == 0) log_info (" You can disable it with a regpatch, see here: http://hashcat.net/wiki/doku.php?id=timeout_patch");
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#endif
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}
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}
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if (vendor_id == VENDOR_ID_AMD)
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if (vendor_id == VENDOR_ID_AMD)
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{
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{
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int catalyst_check = (force == 1) ? 0 : 1;
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int catalyst_check = (force == 1) ? 0 : 1;
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@ -12674,43 +12713,6 @@ int main (int argc, char **argv)
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catalyst_warn = 0;
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catalyst_warn = 0;
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}
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}
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/*
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// v14.9
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if ((strstr (device_param->device_version, "1573.") != NULL)
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&& (strstr (device_param->driver_version, "1573.") != NULL))
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{
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catalyst_warn = 0;
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}
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// v14.12 -- version overlaps with v15.4 beta
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if ((strstr (device_param->device_version, "1642.") != NULL)
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&& (strstr (device_param->driver_version, "1642.") != NULL))
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{
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catalyst_broken = 1;
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}
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// v15.4 (Beta, Windows only release)
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if ((strstr (device_param->device_version, "1642.") != NULL)
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&& (strstr (device_param->driver_version, "1642.") != NULL))
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{
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catalyst_warn = 0;
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}
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// v15.5 (Release, Linux)
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if ((strstr (device_param->device_version, "1702.") != NULL)
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&& (strstr (device_param->driver_version, "1702.") != NULL))
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{
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catalyst_warn = 0;
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}
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// v15.3 (Beta, Ubuntu repository release)
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if ((strstr (device_param->device_version, "1729.") != NULL)
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&& (strstr (device_param->driver_version, "1729.") != NULL))
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{
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catalyst_warn = 0;
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}
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*/
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catalyst_check = 0;
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catalyst_check = 0;
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}
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}
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@ -12818,6 +12820,8 @@ int main (int argc, char **argv)
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uint gpu_processors = device_param->gpu_processors;
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uint gpu_processors = device_param->gpu_processors;
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uint gpu_processor_cores = device_param->gpu_processor_cores;
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/**
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/**
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* create context for each device
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* create context for each device
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*/
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*/
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@ -12839,6 +12843,7 @@ int main (int argc, char **argv)
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uint gpu_threads = GPU_THREADS;
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uint gpu_threads = GPU_THREADS;
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// bcrypt
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if (hash_mode == 3200) gpu_threads = 8;
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if (hash_mode == 3200) gpu_threads = 8;
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if (hash_mode == 9000) gpu_threads = 8;
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if (hash_mode == 9000) gpu_threads = 8;
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@ -12960,24 +12965,6 @@ int main (int argc, char **argv)
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if ((hash_mode == 8900) || (hash_mode == 9300))
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if ((hash_mode == 8900) || (hash_mode == 9300))
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{
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{
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uint m = 0;
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if (vendor_id == VENDOR_ID_NV)
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{
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#define NV_SHADER_PER_MP 32
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#define NV_WARPS 32
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m = NV_SHADER_PER_MP * NV_WARPS;
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}
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else if (vendor_id == VENDOR_ID_AMD)
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{
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#define AMD_SHADER_PER_MP 8
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#define AMD_WAVEFRONTS 64
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m = AMD_SHADER_PER_MP * AMD_WAVEFRONTS;
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}
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uint tmto_start = 2;
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uint tmto_start = 2;
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uint tmto_stop = 1024;
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uint tmto_stop = 1024;
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@ -12995,15 +12982,14 @@ int main (int argc, char **argv)
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size_scryptV /= tmto;
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size_scryptV /= tmto;
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size_scryptV *= gpu_processors * m;
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size_scryptV *= gpu_processors * gpu_processor_cores * gpu_threads;
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// if (size_scryptV > (device_param->gpu_maxmem_alloc / 2)) continue;
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if (size_scryptV > device_param->gpu_maxmem_alloc) continue;
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if (size_scryptV > device_param->gpu_maxmem_alloc) continue;
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for (uint salts_pos = 0; salts_pos < data.salts_cnt; salts_pos++)
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for (uint salts_pos = 0; salts_pos < data.salts_cnt; salts_pos++)
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{
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{
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data.salts_buf[salts_pos].scrypt_tmto = tmto;
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data.salts_buf[salts_pos].scrypt_tmto = tmto;
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data.salts_buf[salts_pos].scrypt_phy = gpu_processors * m;
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data.salts_buf[salts_pos].scrypt_phy = gpu_processors * gpu_processor_cores * gpu_threads;
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}
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}
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break;
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break;
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