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Backport some AMD HIP headers from ROCm 5.3.0

This commit is contained in:
Jens Steube 2022-11-13 19:14:02 +01:00
parent 3c3a42737a
commit a15eeac44f
2 changed files with 12 additions and 5 deletions

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@ -262,6 +262,8 @@ typedef enum hipDeviceAttribute_t {
hipDeviceAttributeUnifiedAddressing, ///< Cuda only. An unified address space shared with the host. hipDeviceAttributeUnifiedAddressing, ///< Cuda only. An unified address space shared with the host.
hipDeviceAttributeUuid, ///< Cuda only. Unique ID in 16 byte. hipDeviceAttributeUuid, ///< Cuda only. Unique ID in 16 byte.
hipDeviceAttributeWarpSize, ///< Warp size in threads. hipDeviceAttributeWarpSize, ///< Warp size in threads.
hipDeviceAttributeMemoryPoolsSupported, ///< Device supports HIP Stream Ordered Memory Allocator
hipDeviceAttributeVirtualMemoryManagementSupported, ///< Device supports HIP virtual memory management
hipDeviceAttributeCudaCompatibleEnd = 9999, hipDeviceAttributeCudaCompatibleEnd = 9999,
hipDeviceAttributeAmdSpecificBegin = 10000, hipDeviceAttributeAmdSpecificBegin = 10000,
@ -288,6 +290,9 @@ typedef enum hipDeviceAttribute_t {
hipDeviceAttributeImageSupport, ///< '1' if Device supports image, '0' otherwise. hipDeviceAttributeImageSupport, ///< '1' if Device supports image, '0' otherwise.
hipDeviceAttributePhysicalMultiProcessorCount, ///< All available physical compute hipDeviceAttributePhysicalMultiProcessorCount, ///< All available physical compute
///< units for the device ///< units for the device
hipDeviceAttributeFineGrainSupport, ///< '1' if Device supports fine grain, '0' otherwise
hipDeviceAttributeWallClockRate, ///< Constant frequency of wall clock in kilohertz.
hipDeviceAttributeAmdSpecificEnd = 19999, hipDeviceAttributeAmdSpecificEnd = 19999,
hipDeviceAttributeVendorSpecificBegin = 20000, hipDeviceAttributeVendorSpecificBegin = 20000,
// Extended attributes for vendors // Extended attributes for vendors
@ -321,6 +326,7 @@ typedef enum hipDeviceAttribute_t {
* non-coherent host memory visible to the host. The flag is a no-op on CUDA platforms.*/ * non-coherent host memory visible to the host. The flag is a no-op on CUDA platforms.*/
#define hipEventReleaseToSystem 0x80000000 #define hipEventReleaseToSystem 0x80000000
/** Automatically select between Spin and Yield.*/
#define hipDeviceScheduleAuto 0x0 #define hipDeviceScheduleAuto 0x0
/** Dedicate a CPU core to spin-wait. Provides lowest latency, but burns a CPU core and may /** Dedicate a CPU core to spin-wait. Provides lowest latency, but burns a CPU core and may

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@ -16,11 +16,12 @@ typedef enum hiprtcResult {
HIPRTC_ERROR_INVALID_PROGRAM = 4, HIPRTC_ERROR_INVALID_PROGRAM = 4,
HIPRTC_ERROR_INVALID_OPTION = 5, HIPRTC_ERROR_INVALID_OPTION = 5,
HIPRTC_ERROR_COMPILATION = 6, HIPRTC_ERROR_COMPILATION = 6,
HIPRTC_ERROR_BUILTIN_OPERATION_FAILURE = 7, HIPRTC_ERROR_LINKING = 7,
HIPRTC_ERROR_NO_NAME_EXPRESSIONS_AFTER_COMPILATION = 8, HIPRTC_ERROR_BUILTIN_OPERATION_FAILURE = 8,
HIPRTC_ERROR_NO_LOWERED_NAMES_BEFORE_COMPILATION = 9, HIPRTC_ERROR_NO_NAME_EXPRESSIONS_AFTER_COMPILATION = 9,
HIPRTC_ERROR_NAME_EXPRESSION_NOT_VALID = 10, HIPRTC_ERROR_NO_LOWERED_NAMES_BEFORE_COMPILATION = 10,
HIPRTC_ERROR_INTERNAL_ERROR = 11 HIPRTC_ERROR_NAME_EXPRESSION_NOT_VALID = 11,
HIPRTC_ERROR_INTERNAL_ERROR = 12
} hiprtcResult; } hiprtcResult;
typedef struct _hiprtcProgram* hiprtcProgram; typedef struct _hiprtcProgram* hiprtcProgram;