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@ -262,6 +262,8 @@ typedef enum hipDeviceAttribute_t {
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hipDeviceAttributeUnifiedAddressing, ///< Cuda only. An unified address space shared with the host.
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hipDeviceAttributeUuid, ///< Cuda only. Unique ID in 16 byte.
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hipDeviceAttributeWarpSize, ///< Warp size in threads.
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hipDeviceAttributeMemoryPoolsSupported, ///< Device supports HIP Stream Ordered Memory Allocator
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hipDeviceAttributeVirtualMemoryManagementSupported, ///< Device supports HIP virtual memory management
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hipDeviceAttributeCudaCompatibleEnd = 9999,
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hipDeviceAttributeAmdSpecificBegin = 10000,
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@ -288,6 +290,9 @@ typedef enum hipDeviceAttribute_t {
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hipDeviceAttributeImageSupport, ///< '1' if Device supports image, '0' otherwise.
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hipDeviceAttributePhysicalMultiProcessorCount, ///< All available physical compute
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///< units for the device
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hipDeviceAttributeFineGrainSupport, ///< '1' if Device supports fine grain, '0' otherwise
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hipDeviceAttributeWallClockRate, ///< Constant frequency of wall clock in kilohertz.
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hipDeviceAttributeAmdSpecificEnd = 19999,
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hipDeviceAttributeVendorSpecificBegin = 20000,
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// Extended attributes for vendors
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@ -321,6 +326,7 @@ typedef enum hipDeviceAttribute_t {
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* non-coherent host memory visible to the host. The flag is a no-op on CUDA platforms.*/
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#define hipEventReleaseToSystem 0x80000000
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/** Automatically select between Spin and Yield.*/
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#define hipDeviceScheduleAuto 0x0
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/** Dedicate a CPU core to spin-wait. Provides lowest latency, but burns a CPU core and may
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