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Code Issues Releases Wiki Activity

Backend Information: Added new column showing the PCI Address per CUDA/OpenCL device to easier identify broken cards

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This commit is contained in:
Jens Steube 2021-06-14 13:18:33 +02:00
parent 8ebf4b9858
commit 624994f920
2 changed files with 28 additions and 0 deletions
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5
docs/changes.txt
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@ -6,6 +6,11 @@
- Fixed 'E' rule in pure kernel mode which was ignoring letters that are in positions that are multiples of 4 - Fixed 'E' rule in pure kernel mode which was ignoring letters that are in positions that are multiples of 4
##
## Improvements
##
- Backend Information: Added new column showing the PCI Address per CUDA/OpenCL device to easier identify broken cards
* changes v6.2.1 -> v6.2.2 * changes v6.2.1 -> v6.2.2

23
src/terminal.c
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@ -731,6 +731,10 @@ void backend_info (hashcat_ctx_t *hashcat_ctx)
u32 device_maxclock_frequency = device_param->device_maxclock_frequency; u32 device_maxclock_frequency = device_param->device_maxclock_frequency;
u64 device_available_mem = device_param->device_available_mem; u64 device_available_mem = device_param->device_available_mem;
u64 device_global_mem = device_param->device_global_mem; u64 device_global_mem = device_param->device_global_mem;
u8 pcie_domain = device_param->pcie_domain;
u8 pcie_bus = device_param->pcie_bus;
u8 pcie_device = device_param->pcie_device;
u8 pcie_function = device_param->pcie_function;
if (device_param->device_id_alias_cnt) if (device_param->device_id_alias_cnt)
{ {
@ -746,6 +750,7 @@ void backend_info (hashcat_ctx_t *hashcat_ctx)
event_log_info (hashcat_ctx, " Clock..........: %u", device_maxclock_frequency); event_log_info (hashcat_ctx, " Clock..........: %u", device_maxclock_frequency);
event_log_info (hashcat_ctx, " Memory.Total...: %" PRIu64 " MB", device_global_mem / 1024 / 1024); event_log_info (hashcat_ctx, " Memory.Total...: %" PRIu64 " MB", device_global_mem / 1024 / 1024);
event_log_info (hashcat_ctx, " Memory.Free....: %" PRIu64 " MB", device_available_mem / 1024 / 1024); event_log_info (hashcat_ctx, " Memory.Free....: %" PRIu64 " MB", device_available_mem / 1024 / 1024);
event_log_info (hashcat_ctx, " PCI.Addr.BDFe..: %04x:%02x:%02x.%d", (u16) pcie_domain, pcie_bus, pcie_device, pcie_function);
event_log_info (hashcat_ctx, NULL); event_log_info (hashcat_ctx, NULL);
} }
} }
@ -815,6 +820,24 @@ void backend_info (hashcat_ctx_t *hashcat_ctx)
event_log_info (hashcat_ctx, " Memory.Free....: %" PRIu64 " MB", device_available_mem / 1024 / 1024); event_log_info (hashcat_ctx, " Memory.Free....: %" PRIu64 " MB", device_available_mem / 1024 / 1024);
event_log_info (hashcat_ctx, " OpenCL.Version.: %s", opencl_device_c_version); event_log_info (hashcat_ctx, " OpenCL.Version.: %s", opencl_device_c_version);
event_log_info (hashcat_ctx, " Driver.Version.: %s", opencl_driver_version); event_log_info (hashcat_ctx, " Driver.Version.: %s", opencl_driver_version);
if (device_param->opencl_device_type & CL_DEVICE_TYPE_GPU)
{
u8 pcie_bus = device_param->pcie_bus;
u8 pcie_device = device_param->pcie_device;
u8 pcie_function = device_param->pcie_function;
if ((device_param->opencl_platform_vendor_id == VENDOR_ID_AMD) && (device_param->opencl_device_vendor_id == VENDOR_ID_AMD))
{
event_log_info (hashcat_ctx, " PCI.Addr.BDF...: %02x:%02x.%d", pcie_bus, pcie_device, pcie_function);
}
if ((device_param->opencl_platform_vendor_id == VENDOR_ID_NV) && (device_param->opencl_device_vendor_id == VENDOR_ID_NV))
{
event_log_info (hashcat_ctx, " PCI.Addr.BDF...: %02x:%02x.%d", pcie_bus, pcie_device, pcie_function);
}
}
event_log_info (hashcat_ctx, NULL); event_log_info (hashcat_ctx, NULL);
} }
} }