mirror of
https://github.com/hashcat/hashcat.git
synced 2024-11-22 16:18:09 +00:00
Backport more ROCm based optimizations to HIP
This commit is contained in:
parent
2e929e692e
commit
45e65dd05a
@ -253,7 +253,7 @@ DECLSPEC u32 amd_bitalign_S (const u32 a, const u32 b, const int n)
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{
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u32 r = 0;
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asm ("V_ALIGNBIT_B32 %0, %1, %2, %3;" : "=v"(r): "v"(a), "v"(b), "I"(n));
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__asm__ ("V_ALIGNBIT_B32 %0, %1, %2, %3;" : "=v"(r): "v"(a), "v"(b), "I"(n));
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return r;
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}
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@ -95,8 +95,6 @@
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#define IS_GENERIC
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#elif VENDOR_ID == (1 << 8)
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#define IS_AMD_USE_HIP
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// TODO HIP optimization potential
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//#define IS_GENERIC
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#else
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#define IS_GENERIC
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#endif
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@ -158,10 +156,8 @@
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#endif
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#ifdef IS_HIP
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//TODO HIP
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//#define USE_BITSELECT
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//#define USE_ROTATE
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//#define USE_SWIZZLE
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#define USE_BITSELECT
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#define USE_ROTATE
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#endif
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#ifdef IS_ROCM
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@ -86,7 +86,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -86,7 +86,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -86,7 +86,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -86,7 +86,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -86,7 +86,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -86,7 +86,7 @@ DECLSPEC void sha256_transform_m (u32x *digest, const u32x *w)
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -143,7 +143,7 @@ DECLSPEC void sha256_transform_z (u32x *digest)
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ROUND_STEP_Z (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_STEP_Z (16);
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ROUND_STEP_Z (32);
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ROUND_STEP_Z (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha256_transform_m (u32x *digest, const u32x *w)
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -141,7 +141,7 @@ DECLSPEC void sha256_transform_z (u32x *digest)
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ROUND_STEP_Z (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_STEP_Z (16);
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ROUND_STEP_Z (32);
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ROUND_STEP_Z (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha256_transform_m (u32x *digest, const u32x *w)
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -141,7 +141,7 @@ DECLSPEC void sha256_transform_z (u32x *digest)
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ROUND_STEP_Z (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_STEP_Z (16);
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ROUND_STEP_Z (32);
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ROUND_STEP_Z (48);
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@ -86,7 +86,7 @@ DECLSPEC void sha384_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha384_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha384_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -89,7 +89,7 @@ DECLSPEC void sha512_transform_opt (const u32x *w0, const u32x *w1, const u32x *
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_full (const u32x *w0, const u32x *w1, const u32x
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -182,7 +182,7 @@ DECLSPEC void sha512_transform_opt (const u32x *w0, const u32x *w1, const u32x *
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_full (const u32x *w0, const u32x *w1, const u32x
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -182,7 +182,7 @@ DECLSPEC void sha512_transform_opt (const u32x *w0, const u32x *w1, const u32x *
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -86,7 +86,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -84,7 +84,7 @@ DECLSPEC void sha512_transform_intern (const u32x *w0, const u32x *w1, const u32
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ROUND_STEP (0);
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#if defined IS_CUDA || defined IS_HIP
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#if defined IS_CUDA
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ROUND_EXPAND (); ROUND_STEP (16);
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ROUND_EXPAND (); ROUND_STEP (32);
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ROUND_EXPAND (); ROUND_STEP (48);
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@ -8339,18 +8339,6 @@ int backend_ctx_devices_init (hashcat_ctx_t *hashcat_ctx, const int comptime)
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device_param->has_mov64 = false;
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device_param->has_prmt = false;
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device_param->has_vadd = true;
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device_param->has_vaddc = true;
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device_param->has_vadd_co = true;
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device_param->has_vaddc_co = true;
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device_param->has_vsub = true;
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device_param->has_vsubb = true;
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device_param->has_vsub_co = true;
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device_param->has_vsubb_co = true;
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device_param->has_vadd3 = true;
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device_param->has_vbfe = true;
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device_param->has_vperm = true;
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// device_available_mem
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HIPcontext hip_context;
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@ -9528,7 +9516,27 @@ int backend_ctx_devices_init (hashcat_ctx_t *hashcat_ctx, const int comptime)
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if (backend_ctx->hip)
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{
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// TODO HIP
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// TODO HIP?
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// Maybe all devices supported by hip have these instructions guaranteed?
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for (int backend_devices_cnt = 0; backend_devices_cnt < backend_ctx->backend_devices_cnt; backend_devices_cnt++)
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{
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hc_device_param_t *device_param = &backend_ctx->devices_param[backend_devices_cnt];
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if (device_param->is_hip == false) continue;
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device_param->has_vadd = true;
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device_param->has_vaddc = true;
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device_param->has_vadd_co = true;
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device_param->has_vaddc_co = true;
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device_param->has_vsub = true;
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device_param->has_vsubb = true;
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device_param->has_vsub_co = true;
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device_param->has_vsubb_co = true;
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device_param->has_vadd3 = true;
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device_param->has_vbfe = true;
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device_param->has_vperm = true;
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}
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}
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if (backend_ctx->ocl)
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@ -10495,9 +10503,6 @@ static bool load_kernel (hashcat_ctx_t *hashcat_ctx, hc_device_param_t *device_p
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//hc_asprintf (&hiprtc_options[3], "compute_%d%d", device_param->sm_major, device_param->sm_minor);
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// TODO HIP
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// no -offload-arch= aka --gpu-architecture because hiprtc gets native arch from hip_context
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hiprtc_options[0] = "--gpu-max-threads-per-block=64";
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hiprtc_options[1] = "";
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hiprtc_options[2] = "";
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@ -13,7 +13,7 @@ my $amd_cache = "~/.AMD";
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my $hashcat_path = ".";
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my $kernels_cache = "$hashcat_path/kernels";
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my $hashcat_bin = "$hashcat_path/hashcat";
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my $device = 3;
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my $device = 1;
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my $workload_profile = 3;
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my $runtime = 24;
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my $sleep_sec = 12;
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