arno/hashcat
1
0
Fork 0
mirror of https://github.com/hashcat/hashcat.git synced 2024-12-22 22:58:30 +00:00
Code Issues Releases Wiki Activity

Update hashcat.hctune to use vector > 1 for NV cards only in BF because of register pressure

Browse Source
This commit is contained in:
jsteube 2016-06-14 18:51:58 +02:00
parent eda36a9877
commit 3461673b26
1 changed files with 119 additions and 119 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

238
hashcat.hctune
View File

@ -252,132 +252,132 @@ DEVICE_TYPE_CPU * 6900 1 A
#Device Attack Hash Vector Kernel Kernel
#Name Mode Type Width Accel Loops
ALIAS_nv_use_simd * 0 2 A A
ALIAS_nv_use_simd * 10 2 A A
ALIAS_nv_use_simd * 11 2 A A
ALIAS_nv_use_simd * 12 2 A A
ALIAS_nv_use_simd * 20 2 A A
ALIAS_nv_use_simd * 21 2 A A
ALIAS_nv_use_simd * 22 2 A A
ALIAS_nv_use_simd * 23 2 A A
ALIAS_nv_use_simd * 100 4 A A
ALIAS_nv_use_simd * 110 4 A A
ALIAS_nv_use_simd * 111 4 A A
ALIAS_nv_use_simd * 112 4 A A
ALIAS_nv_use_simd * 130 4 A A
ALIAS_nv_use_simd * 131 4 A A
ALIAS_nv_use_simd * 132 4 A A
ALIAS_nv_use_simd * 133 4 A A
ALIAS_nv_use_simd * 200 2 A A
ALIAS_nv_use_simd * 400 2 A A
ALIAS_nv_use_simd * 900 4 A A
ALIAS_nv_use_simd * 1000 4 A A
ALIAS_nv_use_simd * 1100 4 A A
ALIAS_nv_use_simd * 2400 2 A A
ALIAS_nv_use_simd * 2410 2 A A
ALIAS_nv_use_simd * 2600 4 A A
ALIAS_nv_use_simd * 2611 4 A A
ALIAS_nv_use_simd * 2612 4 A A
ALIAS_nv_use_simd * 2711 4 A A
ALIAS_nv_use_simd * 2811 4 A A
ALIAS_nv_use_simd * 3711 2 A A
ALIAS_nv_use_simd * 5100 2 A A
ALIAS_nv_use_simd * 5300 2 A A
ALIAS_nv_use_simd * 5500 4 A A
ALIAS_nv_use_simd * 5600 2 A A
ALIAS_nv_use_simd * 8700 4 A A
ALIAS_nv_use_simd * 9900 2 A A
ALIAS_nv_use_simd * 11000 4 A A
ALIAS_nv_use_simd * 11100 2 A A
ALIAS_nv_use_simd * 11900 2 A A
ALIAS_nv_use_simd * 13300 4 A A
ALIAS_nv_use_simd 3 0 2 A A
ALIAS_nv_use_simd 3 10 2 A A
ALIAS_nv_use_simd 3 11 2 A A
ALIAS_nv_use_simd 3 12 2 A A
ALIAS_nv_use_simd 3 20 2 A A
ALIAS_nv_use_simd 3 21 2 A A
ALIAS_nv_use_simd 3 22 2 A A
ALIAS_nv_use_simd 3 23 2 A A
ALIAS_nv_use_simd 3 100 4 A A
ALIAS_nv_use_simd 3 110 4 A A
ALIAS_nv_use_simd 3 111 4 A A
ALIAS_nv_use_simd 3 112 4 A A
ALIAS_nv_use_simd 3 130 4 A A
ALIAS_nv_use_simd 3 131 4 A A
ALIAS_nv_use_simd 3 132 4 A A
ALIAS_nv_use_simd 3 133 4 A A
ALIAS_nv_use_simd 3 200 2 A A
ALIAS_nv_use_simd 3 400 2 A A
ALIAS_nv_use_simd 3 900 4 A A
ALIAS_nv_use_simd 3 1000 4 A A
ALIAS_nv_use_simd 3 1100 4 A A
ALIAS_nv_use_simd 3 2400 2 A A
ALIAS_nv_use_simd 3 2410 2 A A
ALIAS_nv_use_simd 3 2600 4 A A
ALIAS_nv_use_simd 3 2611 4 A A
ALIAS_nv_use_simd 3 2612 4 A A
ALIAS_nv_use_simd 3 2711 4 A A
ALIAS_nv_use_simd 3 2811 4 A A
ALIAS_nv_use_simd 3 3711 2 A A
ALIAS_nv_use_simd 3 5100 2 A A
ALIAS_nv_use_simd 3 5300 2 A A
ALIAS_nv_use_simd 3 5500 4 A A
ALIAS_nv_use_simd 3 5600 2 A A
ALIAS_nv_use_simd 3 8700 4 A A
ALIAS_nv_use_simd 3 9900 2 A A
ALIAS_nv_use_simd 3 11000 4 A A
ALIAS_nv_use_simd 3 11100 2 A A
ALIAS_nv_use_simd 3 11900 2 A A
ALIAS_nv_use_simd 3 13300 4 A A
ALIAS_nv_sm50 * 0 4 A A
ALIAS_nv_sm50 * 10 4 A A
ALIAS_nv_sm50 * 11 4 A A
ALIAS_nv_sm50 * 12 4 A A
ALIAS_nv_sm50 * 20 2 A A
ALIAS_nv_sm50 * 21 2 A A
ALIAS_nv_sm50 * 22 2 A A
ALIAS_nv_sm50 * 23 2 A A
ALIAS_nv_sm50 * 30 4 A A
ALIAS_nv_sm50 * 40 2 A A
ALIAS_nv_sm50 * 200 4 A A
ALIAS_nv_sm50 * 400 2 A A
ALIAS_nv_sm50 * 900 4 A A
ALIAS_nv_sm50 * 1000 4 A A
ALIAS_nv_sm50 * 1100 4 A A
ALIAS_nv_sm50 * 2400 2 A A
ALIAS_nv_sm50 * 2410 4 A A
ALIAS_nv_sm50 * 2600 2 A A
ALIAS_nv_sm50 * 2611 2 A A
ALIAS_nv_sm50 * 2612 2 A A
ALIAS_nv_sm50 * 2711 2 A A
ALIAS_nv_sm50 * 2811 2 A A
ALIAS_nv_sm50 * 3711 2 A A
ALIAS_nv_sm50 * 5100 2 A A
ALIAS_nv_sm50 * 5300 4 A A
ALIAS_nv_sm50 * 5500 2 A A
ALIAS_nv_sm50 * 5600 4 A A
ALIAS_nv_sm50 * 6500 2 A A
ALIAS_nv_sm50 * 6900 2 A A
ALIAS_nv_sm50 * 8600 2 A A
ALIAS_nv_sm50 * 9900 4 A A
ALIAS_nv_sm50 * 10100 2 A A
ALIAS_nv_sm50 * 11000 2 A A
ALIAS_nv_sm50 * 11100 2 A A
ALIAS_nv_sm50 * 11900 2 A A
ALIAS_nv_sm50 3 0 4 A A
ALIAS_nv_sm50 3 10 4 A A
ALIAS_nv_sm50 3 11 4 A A
ALIAS_nv_sm50 3 12 4 A A
ALIAS_nv_sm50 3 20 2 A A
ALIAS_nv_sm50 3 21 2 A A
ALIAS_nv_sm50 3 22 2 A A
ALIAS_nv_sm50 3 23 2 A A
ALIAS_nv_sm50 3 30 4 A A
ALIAS_nv_sm50 3 40 2 A A
ALIAS_nv_sm50 3 200 4 A A
ALIAS_nv_sm50 3 400 2 A A
ALIAS_nv_sm50 3 900 4 A A
ALIAS_nv_sm50 3 1000 4 A A
ALIAS_nv_sm50 3 1100 4 A A
ALIAS_nv_sm50 3 2400 2 A A
ALIAS_nv_sm50 3 2410 4 A A
ALIAS_nv_sm50 3 2600 2 A A
ALIAS_nv_sm50 3 2611 2 A A
ALIAS_nv_sm50 3 2612 2 A A
ALIAS_nv_sm50 3 2711 2 A A
ALIAS_nv_sm50 3 2811 2 A A
ALIAS_nv_sm50 3 3711 2 A A
ALIAS_nv_sm50 3 5100 2 A A
ALIAS_nv_sm50 3 5300 4 A A
ALIAS_nv_sm50 3 5500 2 A A
ALIAS_nv_sm50 3 5600 4 A A
ALIAS_nv_sm50 3 6500 2 A A
ALIAS_nv_sm50 3 6900 2 A A
ALIAS_nv_sm50 3 8600 2 A A
ALIAS_nv_sm50 3 9900 4 A A
ALIAS_nv_sm50 3 10100 2 A A
ALIAS_nv_sm50 3 11000 2 A A
ALIAS_nv_sm50 3 11100 2 A A
ALIAS_nv_sm50 3 11900 2 A A
ALIAS_nv_sm52_or_higher * 0 4 A A
ALIAS_nv_sm52_or_higher * 10 4 A A
ALIAS_nv_sm52_or_higher * 11 4 A A
ALIAS_nv_sm52_or_higher * 12 4 A A
ALIAS_nv_sm52_or_higher * 30 4 A A
ALIAS_nv_sm52_or_higher * 200 4 A A
ALIAS_nv_sm52_or_higher * 900 4 A A
ALIAS_nv_sm52_or_higher * 1000 2 A A
ALIAS_nv_sm52_or_higher * 1100 4 A A
ALIAS_nv_sm52_or_higher * 2400 2 A A
ALIAS_nv_sm52_or_higher * 2410 4 A A
ALIAS_nv_sm52_or_higher * 2711 2 A A
ALIAS_nv_sm52_or_higher * 3711 2 A A
ALIAS_nv_sm52_or_higher * 5100 2 A A
ALIAS_nv_sm52_or_higher * 8000 2 A A
ALIAS_nv_sm52_or_higher * 9900 4 A A
ALIAS_nv_sm52_or_higher * 10100 2 A A
ALIAS_nv_sm52_or_higher * 11000 2 A A
ALIAS_nv_sm52_or_higher * 11100 2 A A
ALIAS_nv_sm52_or_higher 3 0 4 A A
ALIAS_nv_sm52_or_higher 3 10 4 A A
ALIAS_nv_sm52_or_higher 3 11 4 A A
ALIAS_nv_sm52_or_higher 3 12 4 A A
ALIAS_nv_sm52_or_higher 3 30 4 A A
ALIAS_nv_sm52_or_higher 3 200 4 A A
ALIAS_nv_sm52_or_higher 3 900 4 A A
ALIAS_nv_sm52_or_higher 3 1000 2 A A
ALIAS_nv_sm52_or_higher 3 1100 4 A A
ALIAS_nv_sm52_or_higher 3 2400 2 A A
ALIAS_nv_sm52_or_higher 3 2410 4 A A
ALIAS_nv_sm52_or_higher 3 2711 2 A A
ALIAS_nv_sm52_or_higher 3 3711 2 A A
ALIAS_nv_sm52_or_higher 3 5100 2 A A
ALIAS_nv_sm52_or_higher 3 8000 2 A A
ALIAS_nv_sm52_or_higher 3 9900 4 A A
ALIAS_nv_sm52_or_higher 3 10100 2 A A
ALIAS_nv_sm52_or_higher 3 11000 2 A A
ALIAS_nv_sm52_or_higher 3 11100 2 A A
##
## The following cards were manually tuned, as example
##
GeForce_GTX_TITAN * 0 4 A A
GeForce_GTX_TITAN * 11 4 A A
GeForce_GTX_TITAN * 12 4 A A
GeForce_GTX_TITAN * 21 1 A A
GeForce_GTX_TITAN * 22 1 A A
GeForce_GTX_TITAN * 23 1 A A
GeForce_GTX_TITAN * 30 4 A A
GeForce_GTX_TITAN * 200 2 A A
GeForce_GTX_TITAN * 400 1 A A
GeForce_GTX_TITAN * 900 4 A A
GeForce_GTX_TITAN * 1000 4 A A
GeForce_GTX_TITAN * 1100 4 A A
GeForce_GTX_TITAN * 2400 4 A A
GeForce_GTX_TITAN * 2410 2 A A
GeForce_GTX_TITAN * 2600 2 A A
GeForce_GTX_TITAN * 2611 2 A A
GeForce_GTX_TITAN * 2612 2 A A
GeForce_GTX_TITAN * 2711 2 A A
GeForce_GTX_TITAN * 2811 2 A A
GeForce_GTX_TITAN * 3711 1 A A
GeForce_GTX_TITAN * 5100 2 A A
GeForce_GTX_TITAN * 5500 1 A A
GeForce_GTX_TITAN * 9900 2 A A
GeForce_GTX_TITAN * 10100 2 A A
GeForce_GTX_TITAN * 11000 2 A A
GeForce_GTX_TITAN * 11100 2 A A
GeForce_GTX_TITAN 3 0 4 A A
GeForce_GTX_TITAN 3 11 4 A A
GeForce_GTX_TITAN 3 12 4 A A
GeForce_GTX_TITAN 3 21 1 A A
GeForce_GTX_TITAN 3 22 1 A A
GeForce_GTX_TITAN 3 23 1 A A
GeForce_GTX_TITAN 3 30 4 A A
GeForce_GTX_TITAN 3 200 2 A A
GeForce_GTX_TITAN 3 400 1 A A
GeForce_GTX_TITAN 3 900 4 A A
GeForce_GTX_TITAN 3 1000 4 A A
GeForce_GTX_TITAN 3 1100 4 A A
GeForce_GTX_TITAN 3 2400 4 A A
GeForce_GTX_TITAN 3 2410 2 A A
GeForce_GTX_TITAN 3 2600 2 A A
GeForce_GTX_TITAN 3 2611 2 A A
GeForce_GTX_TITAN 3 2612 2 A A
GeForce_GTX_TITAN 3 2711 2 A A
GeForce_GTX_TITAN 3 2811 2 A A
GeForce_GTX_TITAN 3 3711 1 A A
GeForce_GTX_TITAN 3 5100 2 A A
GeForce_GTX_TITAN 3 5500 1 A A
GeForce_GTX_TITAN 3 9900 2 A A
GeForce_GTX_TITAN 3 10100 2 A A
GeForce_GTX_TITAN 3 11000 2 A A
GeForce_GTX_TITAN 3 11100 2 A A
Iris * * 1 A 2
Iris * 400 1 A 256