Added NvAPI support for querying current engine clock and current memory clock

pull/363/head
jsteube 8 years ago
parent 36def60bfa
commit 3227ef167e

@ -325,6 +325,67 @@ typedef struct
} NV_GPU_COOLER_SETTINGS;
#define NVAPI_MAX_GPU_PUBLIC_CLOCKS 32
typedef enum _NV_GPU_PUBLIC_CLOCK_ID
{
NVAPI_GPU_PUBLIC_CLOCK_GRAPHICS = 0,
NVAPI_GPU_PUBLIC_CLOCK_MEMORY = 4,
NVAPI_GPU_PUBLIC_CLOCK_PROCESSOR = 7,
NVAPI_GPU_PUBLIC_CLOCK_VIDEO = 8,
NVAPI_GPU_PUBLIC_CLOCK_UNDEFINED = NVAPI_MAX_GPU_PUBLIC_CLOCKS,
} NV_GPU_PUBLIC_CLOCK_ID;
//! Used in NvAPI_GPU_GetAllClockFrequencies()
typedef struct
{
NvU32 version; //!< Structure version
NvU32 reserved; //!< These bits are reserved for future use.
struct
{
NvU32 bIsPresent:1; //!< Set if this domain is present on this GPU
NvU32 reserved:31; //!< These bits are reserved for future use.
NvU32 frequency; //!< Clock frequency (kHz)
}domain[NVAPI_MAX_GPU_PUBLIC_CLOCKS];
} NV_GPU_CLOCK_FREQUENCIES_V1;
//! Used in NvAPI_GPU_GetAllClockFrequencies()
typedef enum
{
NV_GPU_CLOCK_FREQUENCIES_CURRENT_FREQ = 0,
NV_GPU_CLOCK_FREQUENCIES_BASE_CLOCK = 1,
NV_GPU_CLOCK_FREQUENCIES_BOOST_CLOCK = 2,
NV_GPU_CLOCK_FREQUENCIES_CLOCK_TYPE_NUM = 3
} NV_GPU_CLOCK_FREQUENCIES_CLOCK_TYPE;
//! Used in NvAPI_GPU_GetAllClockFrequencies()
typedef struct
{
NvU32 version; //!< Structure version
NvU32 ClockType:2; //!< One of NV_GPU_CLOCK_FREQUENCIES_CLOCK_TYPE. Used to specify the type of clock to be returned.
NvU32 reserved:22; //!< These bits are reserved for future use. Must be set to 0.
NvU32 reserved1:8; //!< These bits are reserved.
struct
{
NvU32 bIsPresent:1; //!< Set if this domain is present on this GPU
NvU32 reserved:31; //!< These bits are reserved for future use.
NvU32 frequency; //!< Clock frequency (kHz)
}domain[NVAPI_MAX_GPU_PUBLIC_CLOCKS];
} NV_GPU_CLOCK_FREQUENCIES_V2;
//! \ingroup gpuclock
//! Used in NvAPI_GPU_GetAllClockFrequencies()
typedef NV_GPU_CLOCK_FREQUENCIES_V2 NV_GPU_CLOCK_FREQUENCIES;
//! \addtogroup gpuclock
//! @{
#define NV_GPU_CLOCK_FREQUENCIES_VER_1 MAKE_NVAPI_VERSION(NV_GPU_CLOCK_FREQUENCIES_V1,1)
#define NV_GPU_CLOCK_FREQUENCIES_VER_2 MAKE_NVAPI_VERSION(NV_GPU_CLOCK_FREQUENCIES_V2,2)
#define NV_GPU_CLOCK_FREQUENCIES_VER_3 MAKE_NVAPI_VERSION(NV_GPU_CLOCK_FREQUENCIES_V2,3)
#define NV_GPU_CLOCK_FREQUENCIES_VER NV_GPU_CLOCK_FREQUENCIES_VER_3
//! @}
NVAPI_INTERFACE NvAPI_QueryInterface(uint offset);
NVAPI_INTERFACE NvAPI_Initialize();
NVAPI_INTERFACE NvAPI_Unload();
@ -334,6 +395,7 @@ NVAPI_INTERFACE NvAPI_GPU_GetThermalSettings(NvPhysicalGpuHandle hPhysicalGpu, N
NVAPI_INTERFACE NvAPI_GPU_GetTachReading(NvPhysicalGpuHandle hPhysicalGPU, NvU32 *pValue);
NVAPI_INTERFACE NvAPI_GPU_GetCoolerSettings(NvPhysicalGpuHandle hPhysicalGpu, NvU32 coolerIndex, NV_GPU_COOLER_SETTINGS *pCoolerSettings);
NVAPI_INTERFACE NvAPI_GPU_GetDynamicPstatesInfoEx(NvPhysicalGpuHandle hPhysicalGpu, NV_GPU_DYNAMIC_PSTATES_INFO_EX *pDynamicPstatesInfoEx);
NVAPI_INTERFACE NvAPI_GPU_GetAllClockFrequencies(NvPhysicalGpuHandle hPhysicalGpu, NV_GPU_CLOCK_FREQUENCIES *pClkFreqs);
#ifdef __nvapi_success
#undef __success
@ -402,6 +464,7 @@ typedef int (*NVAPI_GPU_GETTHERMALSETTINGS) (NvPhysicalGpuHandle, NvU32, NV_GPU_
typedef int (*NVAPI_GPU_GETTACHREADING) (NvPhysicalGpuHandle, NvU32 *);
typedef int (*NVAPI_GPU_GETCOOLERSETTINGS) (NvPhysicalGpuHandle, NvU32, NV_GPU_COOLER_SETTINGS *);
typedef int (*NVAPI_GPU_GETDYNAMICPSTATESINFOEX) (NvPhysicalGpuHandle, NV_GPU_DYNAMIC_PSTATES_INFO_EX *);
typedef int (*NVAPI_GPU_GETALLCLOCKFREQUENCIES) (NvPhysicalGpuHandle, NV_GPU_CLOCK_FREQUENCIES *);
typedef struct
{
@ -416,6 +479,7 @@ typedef struct
NVAPI_GPU_GETTACHREADING NvAPI_GPU_GetTachReading;
NVAPI_GPU_GETCOOLERSETTINGS NvAPI_GPU_GetCoolerSettings;
NVAPI_GPU_GETDYNAMICPSTATESINFOEX NvAPI_GPU_GetDynamicPstatesInfoEx;
NVAPI_GPU_GETALLCLOCKFREQUENCIES NvAPI_GPU_GetAllClockFrequencies;
} hm_nvapi_lib_t;
@ -433,6 +497,7 @@ int hm_NvAPI_GPU_GetThermalSettings (NVAPI_PTR *nvapi, NvPhysicalGpuHandle hPhys
int hm_NvAPI_GPU_GetTachReading (NVAPI_PTR *nvapi, NvPhysicalGpuHandle hPhysicalGPU, NvU32 *pValue);
int hm_NvAPI_GPU_GetCoolerSettings (NVAPI_PTR *nvapi, NvPhysicalGpuHandle hPhysicalGpu, NvU32 coolerIndex, NV_GPU_COOLER_SETTINGS *pCoolerSettings);
int hm_NvAPI_GPU_GetDynamicPstatesInfoEx (NVAPI_PTR *nvapi, NvPhysicalGpuHandle hPhysicalGpu, NV_GPU_DYNAMIC_PSTATES_INFO_EX *pDynamicPstatesInfoEx);
int hm_NvAPI_GPU_GetAllClockFrequencies (NVAPI_PTR *nvapi, NvPhysicalGpuHandle hPhysicalGpu, NV_GPU_CLOCK_FREQUENCIES *pClkFreqs);
#endif // HAVE_HWMON && HAVE_NVAPI

@ -36,6 +36,7 @@ int nvapi_init (NVAPI_PTR *nvapi)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetThermalSettings, NVAPI_GPU_GETTHERMALSETTINGS, nvapi_QueryInterface, 0xE3640A56, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetTachReading, NVAPI_GPU_GETTACHREADING, nvapi_QueryInterface, 0x5F608315, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetCoolerSettings, NVAPI_GPU_GETCOOLERSETTINGS, nvapi_QueryInterface, 0xDA141340, NVAPI, 0)
HC_LOAD_ADDR(nvapi, NvAPI_GPU_GetAllClockFrequencies, NVAPI_GPU_GETALLCLOCKFREQUENCIES, nvapi_QueryInterface, 0xDCB616C3, NVAPI, 0)
return 0;
}
@ -186,6 +187,24 @@ int hm_NvAPI_GPU_GetDynamicPstatesInfoEx (NVAPI_PTR *nvapi, NvPhysicalGpuHandle
return NvAPI_rc;
}
int hm_NvAPI_GPU_GetAllClockFrequencies (NVAPI_PTR *nvapi, NvPhysicalGpuHandle hPhysicalGpu, NV_GPU_CLOCK_FREQUENCIES *pClkFreqs)
{
if (!nvapi) return (-1);
NvAPI_Status NvAPI_rc = nvapi->NvAPI_GPU_GetAllClockFrequencies (hPhysicalGpu, pClkFreqs);
if (NvAPI_rc != NVAPI_OK)
{
NvAPI_ShortString string = { 0 };
hm_NvAPI_GetErrorMessage (nvapi, NvAPI_rc, string);
log_info ("WARN: %s %d %s\n", "NvAPI_GPU_GetAllClockFrequencies()", NvAPI_rc, string);
}
return NvAPI_rc;
}
#ifdef __MINGW64__
void __security_check_cookie (uintptr_t _StackCookie)

@ -1567,7 +1567,7 @@ void status_display ()
hm_device_val_to_str ((char *) fanspeed, HM_STR_BUF_SIZE, "%", hm_get_fanspeed_with_device_id (device_id));
}
log_info ("HWMon.GPU.#%d...: %s Util, %s Temp, %s Fan, %s Core, %s Memory", device_id + 1, utilization, temperature, fanspeed, corespeed, memoryspeed);
log_info ("HWMon.GPU.#%d...: %s Util, %s Temp, %s Fan, %s Core, %s Mem", device_id + 1, utilization, temperature, fanspeed, corespeed, memoryspeed);
}
else
{

@ -3263,7 +3263,14 @@ int hm_get_memoryspeed_with_device_id (const uint device_id)
#endif
#if defined(WIN) && defined(HAVE_NVAPI)
NV_GPU_CLOCK_FREQUENCIES pClkFreqs = { 0 };
pClkFreqs.version = NV_GPU_CLOCK_FREQUENCIES_VER;
pClkFreqs.ClockType = NV_GPU_CLOCK_FREQUENCIES_CURRENT_FREQ;
if (hm_NvAPI_GPU_GetAllClockFrequencies (data.hm_nv, data.hm_device[device_id].adapter_index.nv, &pClkFreqs) != NVAPI_OK) return -1;
return pClkFreqs.domain[NVAPI_GPU_PUBLIC_CLOCK_MEMORY].frequency / 1000;
#endif
}
#endif // HAVE_NVML || HAVE_NVAPI
@ -3303,7 +3310,14 @@ int hm_get_corespeed_with_device_id (const uint device_id)
#endif
#if defined(WIN) && defined(HAVE_NVAPI)
NV_GPU_CLOCK_FREQUENCIES pClkFreqs = { 0 };
pClkFreqs.version = NV_GPU_CLOCK_FREQUENCIES_VER;
pClkFreqs.ClockType = NV_GPU_CLOCK_FREQUENCIES_CURRENT_FREQ;
if (hm_NvAPI_GPU_GetAllClockFrequencies (data.hm_nv, data.hm_device[device_id].adapter_index.nv, &pClkFreqs) != NVAPI_OK) return -1;
return pClkFreqs.domain[NVAPI_GPU_PUBLIC_CLOCK_GRAPHICS].frequency / 1000;
#endif
}
#endif // HAVE_NVML || HAVE_NVAPI

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