2017-07-31 13:29:28 +00:00
|
|
|
/**
|
|
|
|
* Author......: See docs/credits.txt
|
|
|
|
* License.....: MIT
|
|
|
|
*/
|
|
|
|
|
|
|
|
//#define NEW_SIMD_CODE
|
|
|
|
|
2019-03-22 14:16:25 +00:00
|
|
|
#ifdef KERNEL_STATIC
|
2022-02-07 08:57:08 +00:00
|
|
|
#include M2S(INCLUDE_PATH/inc_vendor.h)
|
|
|
|
#include M2S(INCLUDE_PATH/inc_types.h)
|
|
|
|
#include M2S(INCLUDE_PATH/inc_platform.cl)
|
|
|
|
#include M2S(INCLUDE_PATH/inc_common.cl)
|
|
|
|
#include M2S(INCLUDE_PATH/inc_scalar.cl)
|
|
|
|
#include M2S(INCLUDE_PATH/inc_hash_md4.cl)
|
|
|
|
#include M2S(INCLUDE_PATH/inc_hash_md5.cl)
|
2019-03-22 14:16:25 +00:00
|
|
|
#endif
|
2017-07-31 13:29:28 +00:00
|
|
|
|
2019-03-08 09:18:20 +00:00
|
|
|
typedef struct netntlm
|
|
|
|
{
|
|
|
|
u32 user_len;
|
|
|
|
u32 domain_len;
|
|
|
|
u32 srvchall_len;
|
|
|
|
u32 clichall_len;
|
|
|
|
|
|
|
|
u32 userdomain_buf[64];
|
|
|
|
u32 chall_buf[256];
|
|
|
|
|
|
|
|
} netntlm_t;
|
|
|
|
|
2019-03-22 21:27:58 +00:00
|
|
|
KERNEL_FQ void m05600_mxx (KERN_ATTR_ESALT (netntlm_t))
|
2017-07-31 13:29:28 +00:00
|
|
|
{
|
|
|
|
/**
|
|
|
|
* modifier
|
|
|
|
*/
|
|
|
|
|
2017-08-19 14:39:22 +00:00
|
|
|
const u64 lid = get_local_id (0);
|
|
|
|
const u64 gid = get_global_id (0);
|
2017-07-31 13:29:28 +00:00
|
|
|
|
2022-01-04 21:57:26 +00:00
|
|
|
if (gid >= GID_CNT) return;
|
2017-07-31 13:29:28 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* base
|
|
|
|
*/
|
|
|
|
|
|
|
|
md4_ctx_t ctx10;
|
|
|
|
|
|
|
|
md4_init (&ctx10);
|
|
|
|
|
2019-02-26 20:20:07 +00:00
|
|
|
md4_update_global_utf16le (&ctx10, pws[gid].i, pws[gid].pw_len);
|
2017-07-31 13:29:28 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* loop
|
|
|
|
*/
|
|
|
|
|
2022-01-04 17:07:18 +00:00
|
|
|
for (u32 il_pos = 0; il_pos < IL_CNT; il_pos++)
|
2017-07-31 13:29:28 +00:00
|
|
|
{
|
|
|
|
md4_ctx_t ctx1 = ctx10;
|
|
|
|
|
2019-02-26 20:20:07 +00:00
|
|
|
md4_update_global_utf16le (&ctx1, combs_buf[il_pos].i, combs_buf[il_pos].pw_len);
|
2017-07-31 13:29:28 +00:00
|
|
|
|
|
|
|
md4_final (&ctx1);
|
|
|
|
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
|
|
|
w0[0] = ctx1.h[0];
|
|
|
|
w0[1] = ctx1.h[1];
|
|
|
|
w0[2] = ctx1.h[2];
|
|
|
|
w0[3] = ctx1.h[3];
|
|
|
|
w1[0] = 0;
|
|
|
|
w1[1] = 0;
|
|
|
|
w1[2] = 0;
|
|
|
|
w1[3] = 0;
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = 0;
|
|
|
|
|
|
|
|
md5_hmac_ctx_t ctx0;
|
|
|
|
|
|
|
|
md5_hmac_init_64 (&ctx0, w0, w1, w2, w3);
|
|
|
|
|
2022-01-04 17:07:18 +00:00
|
|
|
md5_hmac_update_global (&ctx0, esalt_bufs[DIGESTS_OFFSET_HOST].userdomain_buf, esalt_bufs[DIGESTS_OFFSET_HOST].user_len + esalt_bufs[DIGESTS_OFFSET_HOST].domain_len);
|
2017-07-31 13:29:28 +00:00
|
|
|
|
|
|
|
md5_hmac_final (&ctx0);
|
|
|
|
|
|
|
|
w0[0] = ctx0.opad.h[0];
|
|
|
|
w0[1] = ctx0.opad.h[1];
|
|
|
|
w0[2] = ctx0.opad.h[2];
|
|
|
|
w0[3] = ctx0.opad.h[3];
|
|
|
|
w1[0] = 0;
|
|
|
|
w1[1] = 0;
|
|
|
|
w1[2] = 0;
|
|
|
|
w1[3] = 0;
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = 0;
|
|
|
|
|
|
|
|
md5_hmac_ctx_t ctx;
|
|
|
|
|
|
|
|
md5_hmac_init_64 (&ctx, w0, w1, w2, w3);
|
|
|
|
|
2022-01-04 17:07:18 +00:00
|
|
|
md5_hmac_update_global (&ctx, esalt_bufs[DIGESTS_OFFSET_HOST].chall_buf, esalt_bufs[DIGESTS_OFFSET_HOST].srvchall_len + esalt_bufs[DIGESTS_OFFSET_HOST].clichall_len);
|
2017-07-31 13:29:28 +00:00
|
|
|
|
|
|
|
md5_hmac_final (&ctx);
|
|
|
|
|
|
|
|
const u32 r0 = ctx.opad.h[DGST_R0];
|
|
|
|
const u32 r1 = ctx.opad.h[DGST_R1];
|
|
|
|
const u32 r2 = ctx.opad.h[DGST_R2];
|
|
|
|
const u32 r3 = ctx.opad.h[DGST_R3];
|
|
|
|
|
|
|
|
COMPARE_M_SCALAR (r0, r1, r2, r3);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-03-22 21:27:58 +00:00
|
|
|
KERNEL_FQ void m05600_sxx (KERN_ATTR_ESALT (netntlm_t))
|
2017-07-31 13:29:28 +00:00
|
|
|
{
|
|
|
|
/**
|
|
|
|
* modifier
|
|
|
|
*/
|
|
|
|
|
2017-08-19 14:39:22 +00:00
|
|
|
const u64 lid = get_local_id (0);
|
|
|
|
const u64 gid = get_global_id (0);
|
2017-07-31 13:29:28 +00:00
|
|
|
|
2022-01-04 21:57:26 +00:00
|
|
|
if (gid >= GID_CNT) return;
|
2017-07-31 13:29:28 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* digest
|
|
|
|
*/
|
|
|
|
|
|
|
|
const u32 search[4] =
|
|
|
|
{
|
2022-01-04 17:07:18 +00:00
|
|
|
digests_buf[DIGESTS_OFFSET_HOST].digest_buf[DGST_R0],
|
|
|
|
digests_buf[DIGESTS_OFFSET_HOST].digest_buf[DGST_R1],
|
|
|
|
digests_buf[DIGESTS_OFFSET_HOST].digest_buf[DGST_R2],
|
|
|
|
digests_buf[DIGESTS_OFFSET_HOST].digest_buf[DGST_R3]
|
2017-07-31 13:29:28 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* base
|
|
|
|
*/
|
|
|
|
|
|
|
|
md4_ctx_t ctx10;
|
|
|
|
|
|
|
|
md4_init (&ctx10);
|
|
|
|
|
2019-02-26 20:20:07 +00:00
|
|
|
md4_update_global_utf16le (&ctx10, pws[gid].i, pws[gid].pw_len);
|
2017-07-31 13:29:28 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* loop
|
|
|
|
*/
|
|
|
|
|
2022-01-04 17:07:18 +00:00
|
|
|
for (u32 il_pos = 0; il_pos < IL_CNT; il_pos++)
|
2017-07-31 13:29:28 +00:00
|
|
|
{
|
|
|
|
md4_ctx_t ctx1 = ctx10;
|
|
|
|
|
2019-02-26 20:20:07 +00:00
|
|
|
md4_update_global_utf16le (&ctx1, combs_buf[il_pos].i, combs_buf[il_pos].pw_len);
|
2017-07-31 13:29:28 +00:00
|
|
|
|
|
|
|
md4_final (&ctx1);
|
|
|
|
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
|
|
|
w0[0] = ctx1.h[0];
|
|
|
|
w0[1] = ctx1.h[1];
|
|
|
|
w0[2] = ctx1.h[2];
|
|
|
|
w0[3] = ctx1.h[3];
|
|
|
|
w1[0] = 0;
|
|
|
|
w1[1] = 0;
|
|
|
|
w1[2] = 0;
|
|
|
|
w1[3] = 0;
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = 0;
|
|
|
|
|
|
|
|
md5_hmac_ctx_t ctx0;
|
|
|
|
|
|
|
|
md5_hmac_init_64 (&ctx0, w0, w1, w2, w3);
|
|
|
|
|
2022-01-04 17:07:18 +00:00
|
|
|
md5_hmac_update_global (&ctx0, esalt_bufs[DIGESTS_OFFSET_HOST].userdomain_buf, esalt_bufs[DIGESTS_OFFSET_HOST].user_len + esalt_bufs[DIGESTS_OFFSET_HOST].domain_len);
|
2017-07-31 13:29:28 +00:00
|
|
|
|
|
|
|
md5_hmac_final (&ctx0);
|
|
|
|
|
|
|
|
w0[0] = ctx0.opad.h[0];
|
|
|
|
w0[1] = ctx0.opad.h[1];
|
|
|
|
w0[2] = ctx0.opad.h[2];
|
|
|
|
w0[3] = ctx0.opad.h[3];
|
|
|
|
w1[0] = 0;
|
|
|
|
w1[1] = 0;
|
|
|
|
w1[2] = 0;
|
|
|
|
w1[3] = 0;
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = 0;
|
|
|
|
|
|
|
|
md5_hmac_ctx_t ctx;
|
|
|
|
|
|
|
|
md5_hmac_init_64 (&ctx, w0, w1, w2, w3);
|
|
|
|
|
2022-01-04 17:07:18 +00:00
|
|
|
md5_hmac_update_global (&ctx, esalt_bufs[DIGESTS_OFFSET_HOST].chall_buf, esalt_bufs[DIGESTS_OFFSET_HOST].srvchall_len + esalt_bufs[DIGESTS_OFFSET_HOST].clichall_len);
|
2017-07-31 13:29:28 +00:00
|
|
|
|
|
|
|
md5_hmac_final (&ctx);
|
|
|
|
|
|
|
|
const u32 r0 = ctx.opad.h[DGST_R0];
|
|
|
|
const u32 r1 = ctx.opad.h[DGST_R1];
|
|
|
|
const u32 r2 = ctx.opad.h[DGST_R2];
|
|
|
|
const u32 r3 = ctx.opad.h[DGST_R3];
|
|
|
|
|
|
|
|
COMPARE_S_SCALAR (r0, r1, r2, r3);
|
|
|
|
}
|
|
|
|
}
|