2017-08-01 07:59:20 +00:00
|
|
|
/**
|
|
|
|
* Author......: See docs/credits.txt
|
|
|
|
* License.....: MIT
|
|
|
|
*/
|
|
|
|
|
|
|
|
#define NEW_SIMD_CODE
|
|
|
|
|
2019-03-22 14:16:25 +00:00
|
|
|
#ifdef KERNEL_STATIC
|
2019-03-21 22:00:38 +00:00
|
|
|
#include "inc_vendor.h"
|
|
|
|
#include "inc_types.h"
|
2019-04-26 11:59:43 +00:00
|
|
|
#include "inc_platform.cl"
|
2017-08-01 07:59:20 +00:00
|
|
|
#include "inc_common.cl"
|
|
|
|
#include "inc_simd.cl"
|
|
|
|
#include "inc_hash_ripemd160.cl"
|
2019-03-22 14:16:25 +00:00
|
|
|
#endif
|
2017-08-01 07:59:20 +00:00
|
|
|
|
2019-03-22 21:27:58 +00:00
|
|
|
KERNEL_FQ void m06000_mxx (KERN_ATTR_VECTOR ())
|
2017-08-01 07:59:20 +00:00
|
|
|
{
|
|
|
|
/**
|
|
|
|
* modifier
|
|
|
|
*/
|
|
|
|
|
2017-08-19 14:39:22 +00:00
|
|
|
const u64 lid = get_local_id (0);
|
|
|
|
const u64 gid = get_global_id (0);
|
2017-08-01 07:59:20 +00:00
|
|
|
|
2022-01-04 21:57:26 +00:00
|
|
|
if (gid >= GID_CNT) return;
|
2017-08-01 07:59:20 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* base
|
|
|
|
*/
|
|
|
|
|
2019-02-26 20:20:07 +00:00
|
|
|
const u32 pw_len = pws[gid].pw_len;
|
2017-08-01 07:59:20 +00:00
|
|
|
|
|
|
|
u32x w[64] = { 0 };
|
|
|
|
|
2019-04-10 10:23:39 +00:00
|
|
|
for (u32 i = 0, idx = 0; i < pw_len; i += 4, idx += 1)
|
2017-08-01 07:59:20 +00:00
|
|
|
{
|
|
|
|
w[idx] = pws[gid].i[idx];
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* loop
|
|
|
|
*/
|
|
|
|
|
|
|
|
u32x w0l = w[0];
|
|
|
|
|
2022-01-04 17:07:18 +00:00
|
|
|
for (u32 il_pos = 0; il_pos < IL_CNT; il_pos += VECT_SIZE)
|
2017-08-01 07:59:20 +00:00
|
|
|
{
|
|
|
|
const u32x w0r = words_buf_r[il_pos / VECT_SIZE];
|
|
|
|
|
|
|
|
const u32x w0 = w0l | w0r;
|
|
|
|
|
|
|
|
w[0] = w0;
|
|
|
|
|
|
|
|
ripemd160_ctx_vector_t ctx;
|
|
|
|
|
|
|
|
ripemd160_init_vector (&ctx);
|
|
|
|
|
|
|
|
ripemd160_update_vector (&ctx, w, pw_len);
|
|
|
|
|
|
|
|
ripemd160_final_vector (&ctx);
|
|
|
|
|
|
|
|
const u32x r0 = ctx.h[DGST_R0];
|
|
|
|
const u32x r1 = ctx.h[DGST_R1];
|
|
|
|
const u32x r2 = ctx.h[DGST_R2];
|
|
|
|
const u32x r3 = ctx.h[DGST_R3];
|
|
|
|
|
|
|
|
COMPARE_M_SIMD (r0, r1, r2, r3);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-03-22 21:27:58 +00:00
|
|
|
KERNEL_FQ void m06000_sxx (KERN_ATTR_VECTOR ())
|
2017-08-01 07:59:20 +00:00
|
|
|
{
|
|
|
|
/**
|
|
|
|
* modifier
|
|
|
|
*/
|
|
|
|
|
2017-08-19 14:39:22 +00:00
|
|
|
const u64 lid = get_local_id (0);
|
|
|
|
const u64 gid = get_global_id (0);
|
2017-08-01 07:59:20 +00:00
|
|
|
|
2022-01-04 21:57:26 +00:00
|
|
|
if (gid >= GID_CNT) return;
|
2017-08-01 07:59:20 +00:00
|
|
|
|
|
|
|
/**
|
|
|
|
* digest
|
|
|
|
*/
|
|
|
|
|
|
|
|
const u32 search[4] =
|
|
|
|
{
|
2022-01-04 17:07:18 +00:00
|
|
|
digests_buf[DIGESTS_OFFSET_HOST].digest_buf[DGST_R0],
|
|
|
|
digests_buf[DIGESTS_OFFSET_HOST].digest_buf[DGST_R1],
|
|
|
|
digests_buf[DIGESTS_OFFSET_HOST].digest_buf[DGST_R2],
|
|
|
|
digests_buf[DIGESTS_OFFSET_HOST].digest_buf[DGST_R3]
|
2017-08-01 07:59:20 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* base
|
|
|
|
*/
|
|
|
|
|
2019-02-26 20:20:07 +00:00
|
|
|
const u32 pw_len = pws[gid].pw_len;
|
2017-08-01 07:59:20 +00:00
|
|
|
|
|
|
|
u32x w[64] = { 0 };
|
|
|
|
|
2019-04-10 10:23:39 +00:00
|
|
|
for (u32 i = 0, idx = 0; i < pw_len; i += 4, idx += 1)
|
2017-08-01 07:59:20 +00:00
|
|
|
{
|
|
|
|
w[idx] = pws[gid].i[idx];
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* loop
|
|
|
|
*/
|
|
|
|
|
|
|
|
u32x w0l = w[0];
|
|
|
|
|
2022-01-04 17:07:18 +00:00
|
|
|
for (u32 il_pos = 0; il_pos < IL_CNT; il_pos += VECT_SIZE)
|
2017-08-01 07:59:20 +00:00
|
|
|
{
|
|
|
|
const u32x w0r = words_buf_r[il_pos / VECT_SIZE];
|
|
|
|
|
|
|
|
const u32x w0 = w0l | w0r;
|
|
|
|
|
|
|
|
w[0] = w0;
|
|
|
|
|
|
|
|
ripemd160_ctx_vector_t ctx;
|
|
|
|
|
|
|
|
ripemd160_init_vector (&ctx);
|
|
|
|
|
|
|
|
ripemd160_update_vector (&ctx, w, pw_len);
|
|
|
|
|
|
|
|
ripemd160_final_vector (&ctx);
|
|
|
|
|
|
|
|
const u32x r0 = ctx.h[DGST_R0];
|
|
|
|
const u32x r1 = ctx.h[DGST_R1];
|
|
|
|
const u32x r2 = ctx.h[DGST_R2];
|
|
|
|
const u32x r3 = ctx.h[DGST_R3];
|
|
|
|
|
|
|
|
COMPARE_S_SIMD (r0, r1, r2, r3);
|
|
|
|
}
|
|
|
|
}
|