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hashcat/OpenCL/m01100_a3.cl

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Initial commit
2015-12-04 14:47:52 +00:00
/**
* Author......: Jens Steube <jens.steube@gmail.com>
* License.....: MIT
*/
#define _MD4_
Converted _a3 kernels, use SIMD for CPU and GPU
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#define NEW_SIMD_CODE
Initial commit
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#include "include/constants.h"
#include "include/kernel_vendor.h"
#define DGST_R0 0
#define DGST_R1 3
#define DGST_R2 2
#define DGST_R3 1
#include "include/kernel_functions.c"
Fix path to includes
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#include "OpenCL/types_ocl.c"
#include "OpenCL/common.c"
Converted _a3 kernels, use SIMD for CPU and GPU
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#include "OpenCL/simd.c"
Initial commit
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static void m01100m (u32 w[16], const u32 pw_len, __global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __constant u32x * words_buf_r, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global void *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 bfs_cnt, const u32 digests_cnt, const u32 digests_offset)
Initial commit
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{
/**
* modifier
*/
const u32 gid = get_global_id (0);
const u32 lid = get_local_id (0);
/**
* salt
*/
u32 salt_buf0[4];
salt_buf0[0] = salt_bufs[salt_pos].salt_buf[ 0];
salt_buf0[1] = salt_bufs[salt_pos].salt_buf[ 1];
salt_buf0[2] = salt_bufs[salt_pos].salt_buf[ 2];
salt_buf0[3] = salt_bufs[salt_pos].salt_buf[ 3];
u32 salt_buf1[4];
salt_buf1[0] = salt_bufs[salt_pos].salt_buf[ 4];
salt_buf1[1] = salt_bufs[salt_pos].salt_buf[ 5];
salt_buf1[2] = salt_bufs[salt_pos].salt_buf[ 6];
salt_buf1[3] = salt_bufs[salt_pos].salt_buf[ 7];
u32 salt_buf2[4];
salt_buf2[0] = salt_bufs[salt_pos].salt_buf[ 8];
salt_buf2[1] = salt_bufs[salt_pos].salt_buf[ 9];
salt_buf2[2] = 0;
salt_buf2[3] = 0;
const u32 salt_len = salt_bufs[salt_pos].salt_len;
/**
* base
*/
const u32 F_w0c00 = 0 + MD4C00;
const u32 F_w1c00 = w[ 1] + MD4C00;
const u32 F_w2c00 = w[ 2] + MD4C00;
const u32 F_w3c00 = w[ 3] + MD4C00;
const u32 F_w4c00 = w[ 4] + MD4C00;
const u32 F_w5c00 = w[ 5] + MD4C00;
const u32 F_w6c00 = w[ 6] + MD4C00;
const u32 F_w7c00 = w[ 7] + MD4C00;
const u32 F_w8c00 = w[ 8] + MD4C00;
const u32 F_w9c00 = w[ 9] + MD4C00;
const u32 F_wac00 = w[10] + MD4C00;
const u32 F_wbc00 = w[11] + MD4C00;
const u32 F_wcc00 = w[12] + MD4C00;
const u32 F_wdc00 = w[13] + MD4C00;
const u32 F_wec00 = w[14] + MD4C00;
const u32 F_wfc00 = w[15] + MD4C00;
const u32 G_w0c01 = 0 + MD4C01;
const u32 G_w4c01 = w[ 4] + MD4C01;
const u32 G_w8c01 = w[ 8] + MD4C01;
const u32 G_wcc01 = w[12] + MD4C01;
const u32 G_w1c01 = w[ 1] + MD4C01;
const u32 G_w5c01 = w[ 5] + MD4C01;
const u32 G_w9c01 = w[ 9] + MD4C01;
const u32 G_wdc01 = w[13] + MD4C01;
const u32 G_w2c01 = w[ 2] + MD4C01;
const u32 G_w6c01 = w[ 6] + MD4C01;
const u32 G_wac01 = w[10] + MD4C01;
const u32 G_wec01 = w[14] + MD4C01;
const u32 G_w3c01 = w[ 3] + MD4C01;
const u32 G_w7c01 = w[ 7] + MD4C01;
const u32 G_wbc01 = w[11] + MD4C01;
const u32 G_wfc01 = w[15] + MD4C01;
const u32 H_w0c02 = 0 + MD4C02;
const u32 H_w8c02 = w[ 8] + MD4C02;
const u32 H_w4c02 = w[ 4] + MD4C02;
const u32 H_wcc02 = w[12] + MD4C02;
const u32 H_w2c02 = w[ 2] + MD4C02;
const u32 H_wac02 = w[10] + MD4C02;
const u32 H_w6c02 = w[ 6] + MD4C02;
const u32 H_wec02 = w[14] + MD4C02;
const u32 H_w1c02 = w[ 1] + MD4C02;
const u32 H_w9c02 = w[ 9] + MD4C02;
const u32 H_w5c02 = w[ 5] + MD4C02;
const u32 H_wdc02 = w[13] + MD4C02;
const u32 H_w3c02 = w[ 3] + MD4C02;
const u32 H_wbc02 = w[11] + MD4C02;
const u32 H_w7c02 = w[ 7] + MD4C02;
const u32 H_wfc02 = w[15] + MD4C02;
/**
* loop
*/
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0l = w[0];
Initial commit
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Converted _a3 kernels, use SIMD for CPU and GPU
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for (u32 il_pos = 0; il_pos < bfs_cnt; il_pos += VECT_SIZE)
Initial commit
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{
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const u32x w0r = words_buf_r[il_pos / VECT_SIZE];
Initial commit
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const u32x w0 = w0l | w0r;
Initial commit
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Converted _a3 kernels, use SIMD for CPU and GPU
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u32x a = MD4M_A;
u32x b = MD4M_B;
u32x c = MD4M_C;
u32x d = MD4M_D;
Initial commit
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MD4_STEP (MD4_Fo, a, b, c, d, w0, F_w0c00, MD4S00);
MD4_STEP0(MD4_Fo, d, a, b, c, F_w1c00, MD4S01);
MD4_STEP0(MD4_Fo, c, d, a, b, F_w2c00, MD4S02);
MD4_STEP0(MD4_Fo, b, c, d, a, F_w3c00, MD4S03);
MD4_STEP0(MD4_Fo, a, b, c, d, F_w4c00, MD4S00);
MD4_STEP0(MD4_Fo, d, a, b, c, F_w5c00, MD4S01);
MD4_STEP0(MD4_Fo, c, d, a, b, F_w6c00, MD4S02);
MD4_STEP0(MD4_Fo, b, c, d, a, F_w7c00, MD4S03);
MD4_STEP0(MD4_Fo, a, b, c, d, F_w8c00, MD4S00);
MD4_STEP0(MD4_Fo, d, a, b, c, F_w9c00, MD4S01);
MD4_STEP0(MD4_Fo, c, d, a, b, F_wac00, MD4S02);
MD4_STEP0(MD4_Fo, b, c, d, a, F_wbc00, MD4S03);
MD4_STEP0(MD4_Fo, a, b, c, d, F_wcc00, MD4S00);
MD4_STEP0(MD4_Fo, d, a, b, c, F_wdc00, MD4S01);
MD4_STEP0(MD4_Fo, c, d, a, b, F_wec00, MD4S02);
MD4_STEP0(MD4_Fo, b, c, d, a, F_wfc00, MD4S03);
MD4_STEP (MD4_Go, a, b, c, d, w0, G_w0c01, MD4S10);
MD4_STEP0(MD4_Go, d, a, b, c, G_w4c01, MD4S11);
MD4_STEP0(MD4_Go, c, d, a, b, G_w8c01, MD4S12);
MD4_STEP0(MD4_Go, b, c, d, a, G_wcc01, MD4S13);
MD4_STEP0(MD4_Go, a, b, c, d, G_w1c01, MD4S10);
MD4_STEP0(MD4_Go, d, a, b, c, G_w5c01, MD4S11);
MD4_STEP0(MD4_Go, c, d, a, b, G_w9c01, MD4S12);
MD4_STEP0(MD4_Go, b, c, d, a, G_wdc01, MD4S13);
MD4_STEP0(MD4_Go, a, b, c, d, G_w2c01, MD4S10);
MD4_STEP0(MD4_Go, d, a, b, c, G_w6c01, MD4S11);
MD4_STEP0(MD4_Go, c, d, a, b, G_wac01, MD4S12);
MD4_STEP0(MD4_Go, b, c, d, a, G_wec01, MD4S13);
MD4_STEP0(MD4_Go, a, b, c, d, G_w3c01, MD4S10);
MD4_STEP0(MD4_Go, d, a, b, c, G_w7c01, MD4S11);
MD4_STEP0(MD4_Go, c, d, a, b, G_wbc01, MD4S12);
MD4_STEP0(MD4_Go, b, c, d, a, G_wfc01, MD4S13);
MD4_STEP (MD4_H , a, b, c, d, w0, H_w0c02, MD4S20);
MD4_STEP0(MD4_H , d, a, b, c, H_w8c02, MD4S21);
MD4_STEP0(MD4_H , c, d, a, b, H_w4c02, MD4S22);
MD4_STEP0(MD4_H , b, c, d, a, H_wcc02, MD4S23);
MD4_STEP0(MD4_H , a, b, c, d, H_w2c02, MD4S20);
MD4_STEP0(MD4_H , d, a, b, c, H_wac02, MD4S21);
MD4_STEP0(MD4_H , c, d, a, b, H_w6c02, MD4S22);
MD4_STEP0(MD4_H , b, c, d, a, H_wec02, MD4S23);
MD4_STEP0(MD4_H , a, b, c, d, H_w1c02, MD4S20);
MD4_STEP0(MD4_H , d, a, b, c, H_w9c02, MD4S21);
MD4_STEP0(MD4_H , c, d, a, b, H_w5c02, MD4S22);
MD4_STEP0(MD4_H , b, c, d, a, H_wdc02, MD4S23);
MD4_STEP0(MD4_H , a, b, c, d, H_w3c02, MD4S20);
MD4_STEP0(MD4_H , d, a, b, c, H_wbc02, MD4S21);
MD4_STEP0(MD4_H , c, d, a, b, H_w7c02, MD4S22);
MD4_STEP0(MD4_H , b, c, d, a, H_wfc02, MD4S23);
a += MD4M_A;
b += MD4M_B;
c += MD4M_C;
d += MD4M_D;
Converted _a3 kernels, use SIMD for CPU and GPU
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u32x w0_t[4];
u32x w1_t[4];
u32x w2_t[4];
u32x w3_t[4];
Initial commit
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w0_t[0] = a;
w0_t[1] = b;
w0_t[2] = c;
w0_t[3] = d;
w1_t[0] = salt_buf0[0];
w1_t[1] = salt_buf0[1];
w1_t[2] = salt_buf0[2];
w1_t[3] = salt_buf0[3];
w2_t[0] = salt_buf1[0];
w2_t[1] = salt_buf1[1];
w2_t[2] = salt_buf1[2];
w2_t[3] = salt_buf1[3];
w3_t[0] = salt_buf2[0];
w3_t[1] = salt_buf2[1];
w3_t[2] = (16 + salt_len) * 8;
w3_t[3] = 0;
a = MD4M_A;
b = MD4M_B;
c = MD4M_C;
d = MD4M_D;
MD4_STEP (MD4_Fo, a, b, c, d, w0_t[0], MD4C00, MD4S00);
MD4_STEP (MD4_Fo, d, a, b, c, w0_t[1], MD4C00, MD4S01);
MD4_STEP (MD4_Fo, c, d, a, b, w0_t[2], MD4C00, MD4S02);
MD4_STEP (MD4_Fo, b, c, d, a, w0_t[3], MD4C00, MD4S03);
MD4_STEP (MD4_Fo, a, b, c, d, w1_t[0], MD4C00, MD4S00);
MD4_STEP (MD4_Fo, d, a, b, c, w1_t[1], MD4C00, MD4S01);
MD4_STEP (MD4_Fo, c, d, a, b, w1_t[2], MD4C00, MD4S02);
MD4_STEP (MD4_Fo, b, c, d, a, w1_t[3], MD4C00, MD4S03);
MD4_STEP (MD4_Fo, a, b, c, d, w2_t[0], MD4C00, MD4S00);
MD4_STEP (MD4_Fo, d, a, b, c, w2_t[1], MD4C00, MD4S01);
MD4_STEP (MD4_Fo, c, d, a, b, w2_t[2], MD4C00, MD4S02);
MD4_STEP (MD4_Fo, b, c, d, a, w2_t[3], MD4C00, MD4S03);
MD4_STEP (MD4_Fo, a, b, c, d, w3_t[0], MD4C00, MD4S00);
MD4_STEP (MD4_Fo, d, a, b, c, w3_t[1], MD4C00, MD4S01);
MD4_STEP (MD4_Fo, c, d, a, b, w3_t[2], MD4C00, MD4S02);
MD4_STEP (MD4_Fo, b, c, d, a, w3_t[3], MD4C00, MD4S03);
MD4_STEP (MD4_Go, a, b, c, d, w0_t[0], MD4C01, MD4S10);
MD4_STEP (MD4_Go, d, a, b, c, w1_t[0], MD4C01, MD4S11);
MD4_STEP (MD4_Go, c, d, a, b, w2_t[0], MD4C01, MD4S12);
MD4_STEP (MD4_Go, b, c, d, a, w3_t[0], MD4C01, MD4S13);
MD4_STEP (MD4_Go, a, b, c, d, w0_t[1], MD4C01, MD4S10);
MD4_STEP (MD4_Go, d, a, b, c, w1_t[1], MD4C01, MD4S11);
MD4_STEP (MD4_Go, c, d, a, b, w2_t[1], MD4C01, MD4S12);
MD4_STEP (MD4_Go, b, c, d, a, w3_t[1], MD4C01, MD4S13);
MD4_STEP (MD4_Go, a, b, c, d, w0_t[2], MD4C01, MD4S10);
MD4_STEP (MD4_Go, d, a, b, c, w1_t[2], MD4C01, MD4S11);
MD4_STEP (MD4_Go, c, d, a, b, w2_t[2], MD4C01, MD4S12);
MD4_STEP (MD4_Go, b, c, d, a, w3_t[2], MD4C01, MD4S13);
MD4_STEP (MD4_Go, a, b, c, d, w0_t[3], MD4C01, MD4S10);
MD4_STEP (MD4_Go, d, a, b, c, w1_t[3], MD4C01, MD4S11);
MD4_STEP (MD4_Go, c, d, a, b, w2_t[3], MD4C01, MD4S12);
MD4_STEP (MD4_Go, b, c, d, a, w3_t[3], MD4C01, MD4S13);
MD4_STEP (MD4_H , a, b, c, d, w0_t[0], MD4C02, MD4S20);
MD4_STEP (MD4_H , d, a, b, c, w2_t[0], MD4C02, MD4S21);
MD4_STEP (MD4_H , c, d, a, b, w1_t[0], MD4C02, MD4S22);
MD4_STEP (MD4_H , b, c, d, a, w3_t[0], MD4C02, MD4S23);
MD4_STEP (MD4_H , a, b, c, d, w0_t[2], MD4C02, MD4S20);
MD4_STEP (MD4_H , d, a, b, c, w2_t[2], MD4C02, MD4S21);
MD4_STEP (MD4_H , c, d, a, b, w1_t[2], MD4C02, MD4S22);
MD4_STEP (MD4_H , b, c, d, a, w3_t[2], MD4C02, MD4S23);
MD4_STEP (MD4_H , a, b, c, d, w0_t[1], MD4C02, MD4S20);
MD4_STEP (MD4_H , d, a, b, c, w2_t[1], MD4C02, MD4S21);
MD4_STEP (MD4_H , c, d, a, b, w1_t[1], MD4C02, MD4S22);
MD4_STEP (MD4_H , b, c, d, a, w3_t[1], MD4C02, MD4S23);
MD4_STEP (MD4_H , a, b, c, d, w0_t[3], MD4C02, MD4S20);
MD4_STEP (MD4_H , d, a, b, c, w2_t[3], MD4C02, MD4S21);
MD4_STEP (MD4_H , c, d, a, b, w1_t[3], MD4C02, MD4S22);
MD4_STEP (MD4_H , b, c, d, a, w3_t[3], MD4C02, MD4S23);
Converted _a3 kernels, use SIMD for CPU and GPU
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COMPARE_M_SIMD (a, d, c, b);
Initial commit
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}
}
Converted _a3 kernels, use SIMD for CPU and GPU
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static void m01100s (u32 w[16], const u32 pw_len, __global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __constant u32x * words_buf_r, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global void *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 bfs_cnt, const u32 digests_cnt, const u32 digests_offset)
Initial commit
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{
/**
* modifier
*/
const u32 gid = get_global_id (0);
const u32 lid = get_local_id (0);
/**
* salt
*/
u32 salt_buf0[4];
salt_buf0[0] = salt_bufs[salt_pos].salt_buf[ 0];
salt_buf0[1] = salt_bufs[salt_pos].salt_buf[ 1];
salt_buf0[2] = salt_bufs[salt_pos].salt_buf[ 2];
salt_buf0[3] = salt_bufs[salt_pos].salt_buf[ 3];
u32 salt_buf1[4];
salt_buf1[0] = salt_bufs[salt_pos].salt_buf[ 4];
salt_buf1[1] = salt_bufs[salt_pos].salt_buf[ 5];
salt_buf1[2] = salt_bufs[salt_pos].salt_buf[ 6];
salt_buf1[3] = salt_bufs[salt_pos].salt_buf[ 7];
u32 salt_buf2[4];
salt_buf2[0] = salt_bufs[salt_pos].salt_buf[ 8];
salt_buf2[1] = salt_bufs[salt_pos].salt_buf[ 9];
salt_buf2[2] = 0;
salt_buf2[3] = 0;
const u32 salt_len = salt_bufs[salt_pos].salt_len;
/**
* base
*/
const u32 F_w0c00 = 0 + MD4C00;
const u32 F_w1c00 = w[ 1] + MD4C00;
const u32 F_w2c00 = w[ 2] + MD4C00;
const u32 F_w3c00 = w[ 3] + MD4C00;
const u32 F_w4c00 = w[ 4] + MD4C00;
const u32 F_w5c00 = w[ 5] + MD4C00;
const u32 F_w6c00 = w[ 6] + MD4C00;
const u32 F_w7c00 = w[ 7] + MD4C00;
const u32 F_w8c00 = w[ 8] + MD4C00;
const u32 F_w9c00 = w[ 9] + MD4C00;
const u32 F_wac00 = w[10] + MD4C00;
const u32 F_wbc00 = w[11] + MD4C00;
const u32 F_wcc00 = w[12] + MD4C00;
const u32 F_wdc00 = w[13] + MD4C00;
const u32 F_wec00 = w[14] + MD4C00;
const u32 F_wfc00 = w[15] + MD4C00;
const u32 G_w0c01 = 0 + MD4C01;
const u32 G_w4c01 = w[ 4] + MD4C01;
const u32 G_w8c01 = w[ 8] + MD4C01;
const u32 G_wcc01 = w[12] + MD4C01;
const u32 G_w1c01 = w[ 1] + MD4C01;
const u32 G_w5c01 = w[ 5] + MD4C01;
const u32 G_w9c01 = w[ 9] + MD4C01;
const u32 G_wdc01 = w[13] + MD4C01;
const u32 G_w2c01 = w[ 2] + MD4C01;
const u32 G_w6c01 = w[ 6] + MD4C01;
const u32 G_wac01 = w[10] + MD4C01;
const u32 G_wec01 = w[14] + MD4C01;
const u32 G_w3c01 = w[ 3] + MD4C01;
const u32 G_w7c01 = w[ 7] + MD4C01;
const u32 G_wbc01 = w[11] + MD4C01;
const u32 G_wfc01 = w[15] + MD4C01;
const u32 H_w0c02 = 0 + MD4C02;
const u32 H_w8c02 = w[ 8] + MD4C02;
const u32 H_w4c02 = w[ 4] + MD4C02;
const u32 H_wcc02 = w[12] + MD4C02;
const u32 H_w2c02 = w[ 2] + MD4C02;
const u32 H_wac02 = w[10] + MD4C02;
const u32 H_w6c02 = w[ 6] + MD4C02;
const u32 H_wec02 = w[14] + MD4C02;
const u32 H_w1c02 = w[ 1] + MD4C02;
const u32 H_w9c02 = w[ 9] + MD4C02;
const u32 H_w5c02 = w[ 5] + MD4C02;
const u32 H_wdc02 = w[13] + MD4C02;
const u32 H_w3c02 = w[ 3] + MD4C02;
const u32 H_wbc02 = w[11] + MD4C02;
const u32 H_w7c02 = w[ 7] + MD4C02;
const u32 H_wfc02 = w[15] + MD4C02;
/**
* digest
*/
const u32 search[4] =
{
digests_buf[digests_offset].digest_buf[DGST_R0],
digests_buf[digests_offset].digest_buf[DGST_R1],
digests_buf[digests_offset].digest_buf[DGST_R2],
digests_buf[digests_offset].digest_buf[DGST_R3]
};
/**
* loop
*/
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0l = w[0];
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
for (u32 il_pos = 0; il_pos < bfs_cnt; il_pos += VECT_SIZE)
Initial commit
2015-12-04 14:47:52 +00:00
{
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
const u32x w0r = words_buf_r[il_pos / VECT_SIZE];
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
const u32x w0 = w0l | w0r;
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x a = MD4M_A;
u32x b = MD4M_B;
u32x c = MD4M_C;
u32x d = MD4M_D;
Initial commit
2015-12-04 14:47:52 +00:00
MD4_STEP (MD4_Fo, a, b, c, d, w0, F_w0c00, MD4S00);
MD4_STEP0(MD4_Fo, d, a, b, c, F_w1c00, MD4S01);
MD4_STEP0(MD4_Fo, c, d, a, b, F_w2c00, MD4S02);
MD4_STEP0(MD4_Fo, b, c, d, a, F_w3c00, MD4S03);
MD4_STEP0(MD4_Fo, a, b, c, d, F_w4c00, MD4S00);
MD4_STEP0(MD4_Fo, d, a, b, c, F_w5c00, MD4S01);
MD4_STEP0(MD4_Fo, c, d, a, b, F_w6c00, MD4S02);
MD4_STEP0(MD4_Fo, b, c, d, a, F_w7c00, MD4S03);
MD4_STEP0(MD4_Fo, a, b, c, d, F_w8c00, MD4S00);
MD4_STEP0(MD4_Fo, d, a, b, c, F_w9c00, MD4S01);
MD4_STEP0(MD4_Fo, c, d, a, b, F_wac00, MD4S02);
MD4_STEP0(MD4_Fo, b, c, d, a, F_wbc00, MD4S03);
MD4_STEP0(MD4_Fo, a, b, c, d, F_wcc00, MD4S00);
MD4_STEP0(MD4_Fo, d, a, b, c, F_wdc00, MD4S01);
MD4_STEP0(MD4_Fo, c, d, a, b, F_wec00, MD4S02);
MD4_STEP0(MD4_Fo, b, c, d, a, F_wfc00, MD4S03);
MD4_STEP (MD4_Go, a, b, c, d, w0, G_w0c01, MD4S10);
MD4_STEP0(MD4_Go, d, a, b, c, G_w4c01, MD4S11);
MD4_STEP0(MD4_Go, c, d, a, b, G_w8c01, MD4S12);
MD4_STEP0(MD4_Go, b, c, d, a, G_wcc01, MD4S13);
MD4_STEP0(MD4_Go, a, b, c, d, G_w1c01, MD4S10);
MD4_STEP0(MD4_Go, d, a, b, c, G_w5c01, MD4S11);
MD4_STEP0(MD4_Go, c, d, a, b, G_w9c01, MD4S12);
MD4_STEP0(MD4_Go, b, c, d, a, G_wdc01, MD4S13);
MD4_STEP0(MD4_Go, a, b, c, d, G_w2c01, MD4S10);
MD4_STEP0(MD4_Go, d, a, b, c, G_w6c01, MD4S11);
MD4_STEP0(MD4_Go, c, d, a, b, G_wac01, MD4S12);
MD4_STEP0(MD4_Go, b, c, d, a, G_wec01, MD4S13);
MD4_STEP0(MD4_Go, a, b, c, d, G_w3c01, MD4S10);
MD4_STEP0(MD4_Go, d, a, b, c, G_w7c01, MD4S11);
MD4_STEP0(MD4_Go, c, d, a, b, G_wbc01, MD4S12);
MD4_STEP0(MD4_Go, b, c, d, a, G_wfc01, MD4S13);
MD4_STEP (MD4_H , a, b, c, d, w0, H_w0c02, MD4S20);
MD4_STEP0(MD4_H , d, a, b, c, H_w8c02, MD4S21);
MD4_STEP0(MD4_H , c, d, a, b, H_w4c02, MD4S22);
MD4_STEP0(MD4_H , b, c, d, a, H_wcc02, MD4S23);
MD4_STEP0(MD4_H , a, b, c, d, H_w2c02, MD4S20);
MD4_STEP0(MD4_H , d, a, b, c, H_wac02, MD4S21);
MD4_STEP0(MD4_H , c, d, a, b, H_w6c02, MD4S22);
MD4_STEP0(MD4_H , b, c, d, a, H_wec02, MD4S23);
MD4_STEP0(MD4_H , a, b, c, d, H_w1c02, MD4S20);
MD4_STEP0(MD4_H , d, a, b, c, H_w9c02, MD4S21);
MD4_STEP0(MD4_H , c, d, a, b, H_w5c02, MD4S22);
MD4_STEP0(MD4_H , b, c, d, a, H_wdc02, MD4S23);
MD4_STEP0(MD4_H , a, b, c, d, H_w3c02, MD4S20);
MD4_STEP0(MD4_H , d, a, b, c, H_wbc02, MD4S21);
MD4_STEP0(MD4_H , c, d, a, b, H_w7c02, MD4S22);
MD4_STEP0(MD4_H , b, c, d, a, H_wfc02, MD4S23);
a += MD4M_A;
b += MD4M_B;
c += MD4M_C;
d += MD4M_D;
Converted _a3 kernels, use SIMD for CPU and GPU
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u32x w0_t[4];
u32x w1_t[4];
u32x w2_t[4];
u32x w3_t[4];
Initial commit
2015-12-04 14:47:52 +00:00
w0_t[0] = a;
w0_t[1] = b;
w0_t[2] = c;
w0_t[3] = d;
w1_t[0] = salt_buf0[0];
w1_t[1] = salt_buf0[1];
w1_t[2] = salt_buf0[2];
w1_t[3] = salt_buf0[3];
w2_t[0] = salt_buf1[0];
w2_t[1] = salt_buf1[1];
w2_t[2] = salt_buf1[2];
w2_t[3] = salt_buf1[3];
w3_t[0] = salt_buf2[0];
w3_t[1] = salt_buf2[1];
w3_t[2] = (16 + salt_len) * 8;
w3_t[3] = 0;
a = MD4M_A;
b = MD4M_B;
c = MD4M_C;
d = MD4M_D;
MD4_STEP (MD4_Fo, a, b, c, d, w0_t[0], MD4C00, MD4S00);
MD4_STEP (MD4_Fo, d, a, b, c, w0_t[1], MD4C00, MD4S01);
MD4_STEP (MD4_Fo, c, d, a, b, w0_t[2], MD4C00, MD4S02);
MD4_STEP (MD4_Fo, b, c, d, a, w0_t[3], MD4C00, MD4S03);
MD4_STEP (MD4_Fo, a, b, c, d, w1_t[0], MD4C00, MD4S00);
MD4_STEP (MD4_Fo, d, a, b, c, w1_t[1], MD4C00, MD4S01);
MD4_STEP (MD4_Fo, c, d, a, b, w1_t[2], MD4C00, MD4S02);
MD4_STEP (MD4_Fo, b, c, d, a, w1_t[3], MD4C00, MD4S03);
MD4_STEP (MD4_Fo, a, b, c, d, w2_t[0], MD4C00, MD4S00);
MD4_STEP (MD4_Fo, d, a, b, c, w2_t[1], MD4C00, MD4S01);
MD4_STEP (MD4_Fo, c, d, a, b, w2_t[2], MD4C00, MD4S02);
MD4_STEP (MD4_Fo, b, c, d, a, w2_t[3], MD4C00, MD4S03);
MD4_STEP (MD4_Fo, a, b, c, d, w3_t[0], MD4C00, MD4S00);
MD4_STEP (MD4_Fo, d, a, b, c, w3_t[1], MD4C00, MD4S01);
MD4_STEP (MD4_Fo, c, d, a, b, w3_t[2], MD4C00, MD4S02);
MD4_STEP (MD4_Fo, b, c, d, a, w3_t[3], MD4C00, MD4S03);
MD4_STEP (MD4_Go, a, b, c, d, w0_t[0], MD4C01, MD4S10);
MD4_STEP (MD4_Go, d, a, b, c, w1_t[0], MD4C01, MD4S11);
MD4_STEP (MD4_Go, c, d, a, b, w2_t[0], MD4C01, MD4S12);
MD4_STEP (MD4_Go, b, c, d, a, w3_t[0], MD4C01, MD4S13);
MD4_STEP (MD4_Go, a, b, c, d, w0_t[1], MD4C01, MD4S10);
MD4_STEP (MD4_Go, d, a, b, c, w1_t[1], MD4C01, MD4S11);
MD4_STEP (MD4_Go, c, d, a, b, w2_t[1], MD4C01, MD4S12);
MD4_STEP (MD4_Go, b, c, d, a, w3_t[1], MD4C01, MD4S13);
MD4_STEP (MD4_Go, a, b, c, d, w0_t[2], MD4C01, MD4S10);
MD4_STEP (MD4_Go, d, a, b, c, w1_t[2], MD4C01, MD4S11);
MD4_STEP (MD4_Go, c, d, a, b, w2_t[2], MD4C01, MD4S12);
MD4_STEP (MD4_Go, b, c, d, a, w3_t[2], MD4C01, MD4S13);
MD4_STEP (MD4_Go, a, b, c, d, w0_t[3], MD4C01, MD4S10);
MD4_STEP (MD4_Go, d, a, b, c, w1_t[3], MD4C01, MD4S11);
MD4_STEP (MD4_Go, c, d, a, b, w2_t[3], MD4C01, MD4S12);
MD4_STEP (MD4_Go, b, c, d, a, w3_t[3], MD4C01, MD4S13);
MD4_STEP (MD4_H , a, b, c, d, w0_t[0], MD4C02, MD4S20);
MD4_STEP (MD4_H , d, a, b, c, w2_t[0], MD4C02, MD4S21);
MD4_STEP (MD4_H , c, d, a, b, w1_t[0], MD4C02, MD4S22);
MD4_STEP (MD4_H , b, c, d, a, w3_t[0], MD4C02, MD4S23);
MD4_STEP (MD4_H , a, b, c, d, w0_t[2], MD4C02, MD4S20);
MD4_STEP (MD4_H , d, a, b, c, w2_t[2], MD4C02, MD4S21);
MD4_STEP (MD4_H , c, d, a, b, w1_t[2], MD4C02, MD4S22);
MD4_STEP (MD4_H , b, c, d, a, w3_t[2], MD4C02, MD4S23);
MD4_STEP (MD4_H , a, b, c, d, w0_t[1], MD4C02, MD4S20);
MD4_STEP (MD4_H , d, a, b, c, w2_t[1], MD4C02, MD4S21);
MD4_STEP (MD4_H , c, d, a, b, w1_t[1], MD4C02, MD4S22);
MD4_STEP (MD4_H , b, c, d, a, w3_t[1], MD4C02, MD4S23);
MD4_STEP (MD4_H , a, b, c, d, w0_t[3], MD4C02, MD4S20);
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
if (MATCHES_NONE_VS (a, search[0])) continue;
Initial commit
2015-12-04 14:47:52 +00:00
MD4_STEP (MD4_H , d, a, b, c, w2_t[3], MD4C02, MD4S21);
MD4_STEP (MD4_H , c, d, a, b, w1_t[3], MD4C02, MD4S22);
MD4_STEP (MD4_H , b, c, d, a, w3_t[3], MD4C02, MD4S23);
Converted _a3 kernels, use SIMD for CPU and GPU
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COMPARE_S_SIMD (a, d, c, b);
Initial commit
2015-12-04 14:47:52 +00:00
}
}
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
__kernel void m01100_m04 (__global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __constant u32x * words_buf_r, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global void *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 bfs_cnt, const u32 digests_cnt, const u32 digests_offset, const u32 combs_mode, const u32 gid_max)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
* base
*/
const u32 gid = get_global_id (0);
if (gid >= gid_max) return;
u32 w[16];
w[ 0] = pws[gid].i[ 0];
w[ 1] = pws[gid].i[ 1];
w[ 2] = pws[gid].i[ 2];
w[ 3] = pws[gid].i[ 3];
w[ 4] = 0;
w[ 5] = 0;
w[ 6] = 0;
w[ 7] = 0;
w[ 8] = 0;
w[ 9] = 0;
w[10] = 0;
w[11] = 0;
w[12] = 0;
w[13] = 0;
w[14] = pws[gid].i[14];
w[15] = 0;
const u32 pw_len = pws[gid].pw_len;
/**
* main
*/
m01100m (w, pw_len, pws, rules_buf, combs_buf, words_buf_r, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, bfs_cnt, digests_cnt, digests_offset);
}
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
__kernel void m01100_m08 (__global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __constant u32x * words_buf_r, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global void *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 bfs_cnt, const u32 digests_cnt, const u32 digests_offset, const u32 combs_mode, const u32 gid_max)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
* base
*/
const u32 gid = get_global_id (0);
if (gid >= gid_max) return;
u32 w[16];
w[ 0] = pws[gid].i[ 0];
w[ 1] = pws[gid].i[ 1];
w[ 2] = pws[gid].i[ 2];
w[ 3] = pws[gid].i[ 3];
w[ 4] = pws[gid].i[ 4];
w[ 5] = pws[gid].i[ 5];
w[ 6] = pws[gid].i[ 6];
w[ 7] = pws[gid].i[ 7];
w[ 8] = 0;
w[ 9] = 0;
w[10] = 0;
w[11] = 0;
w[12] = 0;
w[13] = 0;
w[14] = pws[gid].i[14];
w[15] = 0;
const u32 pw_len = pws[gid].pw_len;
/**
* main
*/
m01100m (w, pw_len, pws, rules_buf, combs_buf, words_buf_r, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, bfs_cnt, digests_cnt, digests_offset);
}
Converted _a3 kernels, use SIMD for CPU and GPU
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__kernel void m01100_m16 (__global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __constant u32x * words_buf_r, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global void *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 bfs_cnt, const u32 digests_cnt, const u32 digests_offset, const u32 combs_mode, const u32 gid_max)
Initial commit
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{
}
Converted _a3 kernels, use SIMD for CPU and GPU
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__kernel void m01100_s04 (__global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __constant u32x * words_buf_r, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global void *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 bfs_cnt, const u32 digests_cnt, const u32 digests_offset, const u32 combs_mode, const u32 gid_max)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
* base
*/
const u32 gid = get_global_id (0);
if (gid >= gid_max) return;
u32 w[16];
w[ 0] = pws[gid].i[ 0];
w[ 1] = pws[gid].i[ 1];
w[ 2] = pws[gid].i[ 2];
w[ 3] = pws[gid].i[ 3];
w[ 4] = 0;
w[ 5] = 0;
w[ 6] = 0;
w[ 7] = 0;
w[ 8] = 0;
w[ 9] = 0;
w[10] = 0;
w[11] = 0;
w[12] = 0;
w[13] = 0;
w[14] = pws[gid].i[14];
w[15] = 0;
const u32 pw_len = pws[gid].pw_len;
/**
* main
*/
m01100s (w, pw_len, pws, rules_buf, combs_buf, words_buf_r, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, bfs_cnt, digests_cnt, digests_offset);
}
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
__kernel void m01100_s08 (__global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __constant u32x * words_buf_r, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global void *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 bfs_cnt, const u32 digests_cnt, const u32 digests_offset, const u32 combs_mode, const u32 gid_max)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
* base
*/
const u32 gid = get_global_id (0);
if (gid >= gid_max) return;
u32 w[16];
w[ 0] = pws[gid].i[ 0];
w[ 1] = pws[gid].i[ 1];
w[ 2] = pws[gid].i[ 2];
w[ 3] = pws[gid].i[ 3];
w[ 4] = pws[gid].i[ 4];
w[ 5] = pws[gid].i[ 5];
w[ 6] = pws[gid].i[ 6];
w[ 7] = pws[gid].i[ 7];
w[ 8] = 0;
w[ 9] = 0;
w[10] = 0;
w[11] = 0;
w[12] = 0;
w[13] = 0;
w[14] = pws[gid].i[14];
w[15] = 0;
const u32 pw_len = pws[gid].pw_len;
/**
* main
*/
m01100s (w, pw_len, pws, rules_buf, combs_buf, words_buf_r, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, bfs_cnt, digests_cnt, digests_offset);
}
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
__kernel void m01100_s16 (__global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __constant u32x * words_buf_r, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global void *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 bfs_cnt, const u32 digests_cnt, const u32 digests_offset, const u32 combs_mode, const u32 gid_max)
Initial commit
2015-12-04 14:47:52 +00:00
{
}
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