2016-05-12 07:26:54 +00:00
|
|
|
/**
|
2016-09-11 20:20:15 +00:00
|
|
|
* Author......: See docs/credits.txt
|
2016-05-12 07:26:54 +00:00
|
|
|
* License.....: MIT
|
|
|
|
*/
|
|
|
|
|
2017-07-09 16:01:55 +00:00
|
|
|
#define NEW_SIMD_CODE
|
|
|
|
|
2019-03-22 14:16:25 +00:00
|
|
|
#ifdef KERNEL_STATIC
|
2019-03-21 22:00:38 +00:00
|
|
|
#include "inc_vendor.h"
|
|
|
|
#include "inc_types.h"
|
2016-05-25 21:04:26 +00:00
|
|
|
#include "inc_common.cl"
|
2017-07-09 16:01:55 +00:00
|
|
|
#include "inc_simd.cl"
|
|
|
|
#include "inc_hash_sha1.cl"
|
2019-03-22 14:16:25 +00:00
|
|
|
#endif
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2016-05-25 21:04:26 +00:00
|
|
|
#define COMPARE_S "inc_comp_single.cl"
|
|
|
|
#define COMPARE_M "inc_comp_multi.cl"
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2019-03-08 10:14:33 +00:00
|
|
|
typedef struct pbkdf2_sha1_tmp
|
|
|
|
{
|
|
|
|
u32 ipad[5];
|
|
|
|
u32 opad[5];
|
|
|
|
|
|
|
|
u32 dgst[32];
|
|
|
|
u32 out[32];
|
|
|
|
|
|
|
|
} pbkdf2_sha1_tmp_t;
|
|
|
|
|
|
|
|
typedef struct zip2
|
|
|
|
{
|
|
|
|
u32 type;
|
|
|
|
u32 mode;
|
|
|
|
u32 magic;
|
|
|
|
u32 salt_len;
|
|
|
|
u32 salt_buf[4];
|
|
|
|
u32 verify_bytes;
|
|
|
|
u32 compress_length;
|
|
|
|
u32 data_len;
|
|
|
|
u32 data_buf[2048];
|
|
|
|
u32 auth_len;
|
|
|
|
u32 auth_buf[4];
|
|
|
|
|
|
|
|
} zip2_t;
|
|
|
|
|
2019-04-13 16:46:19 +00:00
|
|
|
DECLSPEC void hmac_sha1_run_V (u32x *w0, u32x *w1, u32x *w2, u32x *w3, u32x *ipad, u32x *opad, u32x *digest)
|
2016-05-12 07:26:54 +00:00
|
|
|
{
|
|
|
|
digest[0] = ipad[0];
|
|
|
|
digest[1] = ipad[1];
|
|
|
|
digest[2] = ipad[2];
|
|
|
|
digest[3] = ipad[3];
|
|
|
|
digest[4] = ipad[4];
|
|
|
|
|
2017-07-09 16:01:55 +00:00
|
|
|
sha1_transform_vector (w0, w1, w2, w3, digest);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
|
|
|
w0[0] = digest[0];
|
|
|
|
w0[1] = digest[1];
|
|
|
|
w0[2] = digest[2];
|
|
|
|
w0[3] = digest[3];
|
|
|
|
w1[0] = digest[4];
|
|
|
|
w1[1] = 0x80000000;
|
|
|
|
w1[2] = 0;
|
|
|
|
w1[3] = 0;
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = (64 + 20) * 8;
|
|
|
|
|
|
|
|
digest[0] = opad[0];
|
|
|
|
digest[1] = opad[1];
|
|
|
|
digest[2] = opad[2];
|
|
|
|
digest[3] = opad[3];
|
|
|
|
digest[4] = opad[4];
|
|
|
|
|
2017-07-09 16:01:55 +00:00
|
|
|
sha1_transform_vector (w0, w1, w2, w3, digest);
|
2016-05-12 07:26:54 +00:00
|
|
|
}
|
|
|
|
|
2019-03-22 21:27:58 +00:00
|
|
|
KERNEL_FQ void m13600_init (KERN_ATTR_TMPS_ESALT (pbkdf2_sha1_tmp_t, zip2_t))
|
2016-05-12 07:26:54 +00:00
|
|
|
{
|
|
|
|
/**
|
|
|
|
* base
|
|
|
|
*/
|
|
|
|
|
2017-08-19 14:39:22 +00:00
|
|
|
const u64 gid = get_global_id (0);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
|
|
|
if (gid >= gid_max) return;
|
|
|
|
|
2017-07-09 16:01:55 +00:00
|
|
|
sha1_hmac_ctx_t sha1_hmac_ctx;
|
|
|
|
|
2019-02-26 20:20:07 +00:00
|
|
|
sha1_hmac_init_global_swap (&sha1_hmac_ctx, pws[gid].i, pws[gid].pw_len);
|
2017-07-09 16:01:55 +00:00
|
|
|
|
|
|
|
tmps[gid].ipad[0] = sha1_hmac_ctx.ipad.h[0];
|
|
|
|
tmps[gid].ipad[1] = sha1_hmac_ctx.ipad.h[1];
|
|
|
|
tmps[gid].ipad[2] = sha1_hmac_ctx.ipad.h[2];
|
|
|
|
tmps[gid].ipad[3] = sha1_hmac_ctx.ipad.h[3];
|
|
|
|
tmps[gid].ipad[4] = sha1_hmac_ctx.ipad.h[4];
|
|
|
|
|
|
|
|
tmps[gid].opad[0] = sha1_hmac_ctx.opad.h[0];
|
|
|
|
tmps[gid].opad[1] = sha1_hmac_ctx.opad.h[1];
|
|
|
|
tmps[gid].opad[2] = sha1_hmac_ctx.opad.h[2];
|
|
|
|
tmps[gid].opad[3] = sha1_hmac_ctx.opad.h[3];
|
|
|
|
tmps[gid].opad[4] = sha1_hmac_ctx.opad.h[4];
|
|
|
|
|
2017-07-10 09:15:15 +00:00
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32_S (esalt_bufs[digests_offset].salt_buf[0]);
|
|
|
|
w0[1] = hc_swap32_S (esalt_bufs[digests_offset].salt_buf[1]);
|
|
|
|
w0[2] = hc_swap32_S (esalt_bufs[digests_offset].salt_buf[2]);
|
|
|
|
w0[3] = hc_swap32_S (esalt_bufs[digests_offset].salt_buf[3]);
|
2017-07-09 16:20:28 +00:00
|
|
|
w1[0] = 0;
|
|
|
|
w1[1] = 0;
|
|
|
|
w1[2] = 0;
|
|
|
|
w1[3] = 0;
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = 0;
|
|
|
|
|
|
|
|
sha1_hmac_update_64 (&sha1_hmac_ctx, w0, w1, w2, w3, esalt_bufs[digests_offset].salt_len);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-03-07 08:44:58 +00:00
|
|
|
const u32 mode = esalt_bufs[digests_offset].mode;
|
2016-05-12 07:26:54 +00:00
|
|
|
|
|
|
|
u32 iter_start;
|
|
|
|
u32 iter_stop;
|
|
|
|
u32 count_start;
|
|
|
|
|
|
|
|
switch (mode)
|
|
|
|
{
|
|
|
|
case 1: iter_start = 0;
|
|
|
|
iter_stop = 2;
|
|
|
|
count_start = 1;
|
|
|
|
break;
|
|
|
|
case 2: iter_start = 1;
|
|
|
|
iter_stop = 3;
|
|
|
|
count_start = 2;
|
|
|
|
break;
|
|
|
|
case 3: iter_start = 1;
|
|
|
|
iter_stop = 4;
|
|
|
|
count_start = 2;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (u32 i = iter_start, j = count_start; i < iter_stop; i++, j++)
|
|
|
|
{
|
2017-07-09 16:01:55 +00:00
|
|
|
sha1_hmac_ctx_t sha1_hmac_ctx2 = sha1_hmac_ctx;
|
|
|
|
|
|
|
|
w0[0] = j;
|
|
|
|
w0[1] = 0;
|
|
|
|
w0[2] = 0;
|
|
|
|
w0[3] = 0;
|
|
|
|
w1[0] = 0;
|
|
|
|
w1[1] = 0;
|
|
|
|
w1[2] = 0;
|
|
|
|
w1[3] = 0;
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = 0;
|
|
|
|
|
|
|
|
sha1_hmac_update_64 (&sha1_hmac_ctx2, w0, w1, w2, w3, 4);
|
|
|
|
|
|
|
|
sha1_hmac_final (&sha1_hmac_ctx2);
|
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
const u32 i5 = i * 5;
|
|
|
|
|
2017-07-09 16:01:55 +00:00
|
|
|
tmps[gid].dgst[i5 + 0] = sha1_hmac_ctx2.opad.h[0];
|
|
|
|
tmps[gid].dgst[i5 + 1] = sha1_hmac_ctx2.opad.h[1];
|
|
|
|
tmps[gid].dgst[i5 + 2] = sha1_hmac_ctx2.opad.h[2];
|
|
|
|
tmps[gid].dgst[i5 + 3] = sha1_hmac_ctx2.opad.h[3];
|
|
|
|
tmps[gid].dgst[i5 + 4] = sha1_hmac_ctx2.opad.h[4];
|
|
|
|
|
|
|
|
tmps[gid].out[i5 + 0] = tmps[gid].dgst[i5 + 0];
|
|
|
|
tmps[gid].out[i5 + 1] = tmps[gid].dgst[i5 + 1];
|
|
|
|
tmps[gid].out[i5 + 2] = tmps[gid].dgst[i5 + 2];
|
|
|
|
tmps[gid].out[i5 + 3] = tmps[gid].dgst[i5 + 3];
|
|
|
|
tmps[gid].out[i5 + 4] = tmps[gid].dgst[i5 + 4];
|
2016-05-12 07:26:54 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-03-22 21:27:58 +00:00
|
|
|
KERNEL_FQ void m13600_loop (KERN_ATTR_TMPS_ESALT (pbkdf2_sha1_tmp_t, zip2_t))
|
2016-05-12 07:26:54 +00:00
|
|
|
{
|
2017-08-19 14:39:22 +00:00
|
|
|
const u64 gid = get_global_id (0);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
if ((gid * VECT_SIZE) >= gid_max) return;
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
u32x ipad[5];
|
|
|
|
u32x opad[5];
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
ipad[0] = packv (tmps, ipad, gid, 0);
|
|
|
|
ipad[1] = packv (tmps, ipad, gid, 1);
|
|
|
|
ipad[2] = packv (tmps, ipad, gid, 2);
|
|
|
|
ipad[3] = packv (tmps, ipad, gid, 3);
|
|
|
|
ipad[4] = packv (tmps, ipad, gid, 4);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
opad[0] = packv (tmps, opad, gid, 0);
|
|
|
|
opad[1] = packv (tmps, opad, gid, 1);
|
|
|
|
opad[2] = packv (tmps, opad, gid, 2);
|
|
|
|
opad[3] = packv (tmps, opad, gid, 3);
|
|
|
|
opad[4] = packv (tmps, opad, gid, 4);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-03-07 08:44:58 +00:00
|
|
|
const u32 mode = esalt_bufs[digests_offset].mode;
|
2016-05-12 07:26:54 +00:00
|
|
|
|
|
|
|
u32 iter_start;
|
|
|
|
u32 iter_stop;
|
|
|
|
u32 count_start;
|
|
|
|
|
|
|
|
switch (mode)
|
|
|
|
{
|
|
|
|
case 1: iter_start = 0;
|
|
|
|
iter_stop = 2;
|
|
|
|
count_start = 1;
|
|
|
|
break;
|
|
|
|
case 2: iter_start = 1;
|
|
|
|
iter_stop = 3;
|
|
|
|
count_start = 2;
|
|
|
|
break;
|
|
|
|
case 3: iter_start = 1;
|
|
|
|
iter_stop = 4;
|
|
|
|
count_start = 2;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (u32 i = iter_start, j = count_start; i < iter_stop; i++, j++)
|
|
|
|
{
|
|
|
|
const u32 i5 = i * 5;
|
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
u32x dgst[5];
|
|
|
|
u32x out[5];
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
dgst[0] = packv (tmps, dgst, gid, i5 + 0);
|
|
|
|
dgst[1] = packv (tmps, dgst, gid, i5 + 1);
|
|
|
|
dgst[2] = packv (tmps, dgst, gid, i5 + 2);
|
|
|
|
dgst[3] = packv (tmps, dgst, gid, i5 + 3);
|
|
|
|
dgst[4] = packv (tmps, dgst, gid, i5 + 4);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
out[0] = packv (tmps, out, gid, i5 + 0);
|
|
|
|
out[1] = packv (tmps, out, gid, i5 + 1);
|
|
|
|
out[2] = packv (tmps, out, gid, i5 + 2);
|
|
|
|
out[3] = packv (tmps, out, gid, i5 + 3);
|
|
|
|
out[4] = packv (tmps, out, gid, i5 + 4);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
for (u32 j = 0; j < loop_cnt; j++)
|
2016-05-12 07:26:54 +00:00
|
|
|
{
|
2017-07-09 16:20:28 +00:00
|
|
|
u32x w0[4];
|
|
|
|
u32x w1[4];
|
|
|
|
u32x w2[4];
|
|
|
|
u32x w3[4];
|
2016-05-12 07:26:54 +00:00
|
|
|
|
|
|
|
w0[0] = dgst[0];
|
|
|
|
w0[1] = dgst[1];
|
|
|
|
w0[2] = dgst[2];
|
|
|
|
w0[3] = dgst[3];
|
|
|
|
w1[0] = dgst[4];
|
|
|
|
w1[1] = 0x80000000;
|
|
|
|
w1[2] = 0;
|
|
|
|
w1[3] = 0;
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = (64 + 20) * 8;
|
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
hmac_sha1_run_V (w0, w1, w2, w3, ipad, opad, dgst);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
|
|
|
out[0] ^= dgst[0];
|
|
|
|
out[1] ^= dgst[1];
|
|
|
|
out[2] ^= dgst[2];
|
|
|
|
out[3] ^= dgst[3];
|
|
|
|
out[4] ^= dgst[4];
|
|
|
|
}
|
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
unpackv (tmps, dgst, gid, i5 + 0, dgst[0]);
|
|
|
|
unpackv (tmps, dgst, gid, i5 + 1, dgst[1]);
|
|
|
|
unpackv (tmps, dgst, gid, i5 + 2, dgst[2]);
|
|
|
|
unpackv (tmps, dgst, gid, i5 + 3, dgst[3]);
|
|
|
|
unpackv (tmps, dgst, gid, i5 + 4, dgst[4]);
|
|
|
|
|
|
|
|
unpackv (tmps, out, gid, i5 + 0, out[0]);
|
|
|
|
unpackv (tmps, out, gid, i5 + 1, out[1]);
|
|
|
|
unpackv (tmps, out, gid, i5 + 2, out[2]);
|
|
|
|
unpackv (tmps, out, gid, i5 + 3, out[3]);
|
|
|
|
unpackv (tmps, out, gid, i5 + 4, out[4]);
|
2016-05-12 07:26:54 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-03-22 21:27:58 +00:00
|
|
|
KERNEL_FQ void m13600_comp (KERN_ATTR_TMPS_ESALT (pbkdf2_sha1_tmp_t, zip2_t))
|
2016-05-12 07:26:54 +00:00
|
|
|
{
|
|
|
|
/**
|
|
|
|
* base
|
|
|
|
*/
|
|
|
|
|
2017-08-19 14:39:22 +00:00
|
|
|
const u64 gid = get_global_id (0);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
|
|
|
if (gid >= gid_max) return;
|
|
|
|
|
2017-08-19 14:39:22 +00:00
|
|
|
const u64 lid = get_local_id (0);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-03-07 08:44:58 +00:00
|
|
|
const u32 mode = esalt_bufs[digests_offset].mode;
|
2016-05-12 07:26:54 +00:00
|
|
|
|
|
|
|
u32 iter_start;
|
|
|
|
u32 iter_stop;
|
|
|
|
|
|
|
|
switch (mode)
|
|
|
|
{
|
|
|
|
case 1: iter_start = 4;
|
|
|
|
iter_stop = 8;
|
|
|
|
break;
|
|
|
|
case 2: iter_start = 6;
|
|
|
|
iter_stop = 12;
|
|
|
|
break;
|
|
|
|
case 3: iter_start = 8;
|
|
|
|
iter_stop = 16;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
u32 key[8] = { 0 };
|
|
|
|
|
2019-04-05 20:25:28 +00:00
|
|
|
for (u32 i = iter_start, j = 0; i < iter_stop; i++, j++)
|
2016-05-12 07:26:54 +00:00
|
|
|
{
|
|
|
|
key[j] = tmps[gid].out[i];
|
|
|
|
}
|
|
|
|
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
|
|
|
w0[0] = key[0];
|
|
|
|
w0[1] = key[1];
|
|
|
|
w0[2] = key[2];
|
|
|
|
w0[3] = key[3];
|
|
|
|
w1[0] = key[4];
|
|
|
|
w1[1] = key[5];
|
|
|
|
w1[2] = key[6];
|
|
|
|
w1[3] = key[7];
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = 0;
|
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
sha1_hmac_ctx_t ctx;
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-07-10 09:15:15 +00:00
|
|
|
sha1_hmac_init_64 (&ctx, w0, w1, w2, w3);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
sha1_hmac_update_global_swap (&ctx, esalt_bufs[digests_offset].data_buf, esalt_bufs[digests_offset].data_len);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2017-07-09 16:20:28 +00:00
|
|
|
sha1_hmac_final (&ctx);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
const u32 r0 = hc_swap32_S (ctx.opad.h[0] & 0xffffffff);
|
|
|
|
const u32 r1 = hc_swap32_S (ctx.opad.h[1] & 0xffffffff);
|
|
|
|
const u32 r2 = hc_swap32_S (ctx.opad.h[2] & 0xffff0000);
|
|
|
|
const u32 r3 = hc_swap32_S (ctx.opad.h[3] & 0x00000000);
|
2016-05-12 07:26:54 +00:00
|
|
|
|
2016-05-12 11:05:12 +00:00
|
|
|
#define il_pos 0
|
|
|
|
|
2019-03-22 14:16:25 +00:00
|
|
|
#ifdef KERNEL_STATIC
|
2016-05-12 07:26:54 +00:00
|
|
|
#include COMPARE_M
|
2019-03-22 14:16:25 +00:00
|
|
|
#endif
|
2016-05-12 07:26:54 +00:00
|
|
|
}
|