2019-03-23 21:15:38 +00:00
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/**
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* Author......: See docs/credits.txt
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* License.....: MIT
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*/
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#include "inc_vendor.h"
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#include "inc_types.h"
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#include "inc_common.h"
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#include "inc_hash_md4.h"
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2017-06-18 21:31:40 +00:00
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// important notes on this:
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// input buf unused bytes needs to be set to zero
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2018-02-14 16:31:41 +00:00
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// input buf needs to be in algorithm native byte order (md4 = LE, sha1 = BE, etc)
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// input buf needs to be 64 byte aligned when using md4_update()
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2017-06-18 21:31:40 +00:00
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2018-07-22 09:47:42 +00:00
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DECLSPEC void md4_transform (const u32 *w0, const u32 *w1, const u32 *w2, const u32 *w3, u32 *digest)
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2017-06-18 21:31:40 +00:00
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{
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u32 a = digest[0];
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u32 b = digest[1];
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u32 c = digest[2];
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u32 d = digest[3];
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MD4_STEP_S (MD4_Fo, a, b, c, d, w0[0], MD4C00, MD4S00);
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MD4_STEP_S (MD4_Fo, d, a, b, c, w0[1], MD4C00, MD4S01);
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MD4_STEP_S (MD4_Fo, c, d, a, b, w0[2], MD4C00, MD4S02);
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MD4_STEP_S (MD4_Fo, b, c, d, a, w0[3], MD4C00, MD4S03);
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MD4_STEP_S (MD4_Fo, a, b, c, d, w1[0], MD4C00, MD4S00);
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MD4_STEP_S (MD4_Fo, d, a, b, c, w1[1], MD4C00, MD4S01);
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MD4_STEP_S (MD4_Fo, c, d, a, b, w1[2], MD4C00, MD4S02);
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MD4_STEP_S (MD4_Fo, b, c, d, a, w1[3], MD4C00, MD4S03);
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MD4_STEP_S (MD4_Fo, a, b, c, d, w2[0], MD4C00, MD4S00);
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MD4_STEP_S (MD4_Fo, d, a, b, c, w2[1], MD4C00, MD4S01);
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MD4_STEP_S (MD4_Fo, c, d, a, b, w2[2], MD4C00, MD4S02);
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MD4_STEP_S (MD4_Fo, b, c, d, a, w2[3], MD4C00, MD4S03);
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MD4_STEP_S (MD4_Fo, a, b, c, d, w3[0], MD4C00, MD4S00);
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MD4_STEP_S (MD4_Fo, d, a, b, c, w3[1], MD4C00, MD4S01);
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MD4_STEP_S (MD4_Fo, c, d, a, b, w3[2], MD4C00, MD4S02);
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MD4_STEP_S (MD4_Fo, b, c, d, a, w3[3], MD4C00, MD4S03);
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MD4_STEP_S (MD4_Go, a, b, c, d, w0[0], MD4C01, MD4S10);
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MD4_STEP_S (MD4_Go, d, a, b, c, w1[0], MD4C01, MD4S11);
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MD4_STEP_S (MD4_Go, c, d, a, b, w2[0], MD4C01, MD4S12);
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MD4_STEP_S (MD4_Go, b, c, d, a, w3[0], MD4C01, MD4S13);
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MD4_STEP_S (MD4_Go, a, b, c, d, w0[1], MD4C01, MD4S10);
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MD4_STEP_S (MD4_Go, d, a, b, c, w1[1], MD4C01, MD4S11);
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MD4_STEP_S (MD4_Go, c, d, a, b, w2[1], MD4C01, MD4S12);
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MD4_STEP_S (MD4_Go, b, c, d, a, w3[1], MD4C01, MD4S13);
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MD4_STEP_S (MD4_Go, a, b, c, d, w0[2], MD4C01, MD4S10);
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MD4_STEP_S (MD4_Go, d, a, b, c, w1[2], MD4C01, MD4S11);
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MD4_STEP_S (MD4_Go, c, d, a, b, w2[2], MD4C01, MD4S12);
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MD4_STEP_S (MD4_Go, b, c, d, a, w3[2], MD4C01, MD4S13);
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MD4_STEP_S (MD4_Go, a, b, c, d, w0[3], MD4C01, MD4S10);
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MD4_STEP_S (MD4_Go, d, a, b, c, w1[3], MD4C01, MD4S11);
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MD4_STEP_S (MD4_Go, c, d, a, b, w2[3], MD4C01, MD4S12);
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MD4_STEP_S (MD4_Go, b, c, d, a, w3[3], MD4C01, MD4S13);
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MD4_STEP_S (MD4_H , a, b, c, d, w0[0], MD4C02, MD4S20);
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MD4_STEP_S (MD4_H , d, a, b, c, w2[0], MD4C02, MD4S21);
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MD4_STEP_S (MD4_H , c, d, a, b, w1[0], MD4C02, MD4S22);
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MD4_STEP_S (MD4_H , b, c, d, a, w3[0], MD4C02, MD4S23);
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MD4_STEP_S (MD4_H , a, b, c, d, w0[2], MD4C02, MD4S20);
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MD4_STEP_S (MD4_H , d, a, b, c, w2[2], MD4C02, MD4S21);
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MD4_STEP_S (MD4_H , c, d, a, b, w1[2], MD4C02, MD4S22);
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MD4_STEP_S (MD4_H , b, c, d, a, w3[2], MD4C02, MD4S23);
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MD4_STEP_S (MD4_H , a, b, c, d, w0[1], MD4C02, MD4S20);
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MD4_STEP_S (MD4_H , d, a, b, c, w2[1], MD4C02, MD4S21);
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MD4_STEP_S (MD4_H , c, d, a, b, w1[1], MD4C02, MD4S22);
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MD4_STEP_S (MD4_H , b, c, d, a, w3[1], MD4C02, MD4S23);
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MD4_STEP_S (MD4_H , a, b, c, d, w0[3], MD4C02, MD4S20);
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MD4_STEP_S (MD4_H , d, a, b, c, w2[3], MD4C02, MD4S21);
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MD4_STEP_S (MD4_H , c, d, a, b, w1[3], MD4C02, MD4S22);
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MD4_STEP_S (MD4_H , b, c, d, a, w3[3], MD4C02, MD4S23);
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digest[0] += a;
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digest[1] += b;
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digest[2] += c;
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digest[3] += d;
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}
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2018-02-06 18:12:24 +00:00
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DECLSPEC void md4_init (md4_ctx_t *ctx)
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2017-06-18 21:31:40 +00:00
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{
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2017-06-19 14:42:21 +00:00
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ctx->h[0] = MD4M_A;
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ctx->h[1] = MD4M_B;
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ctx->h[2] = MD4M_C;
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ctx->h[3] = MD4M_D;
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ctx->w0[0] = 0;
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ctx->w0[1] = 0;
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ctx->w0[2] = 0;
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ctx->w0[3] = 0;
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ctx->w1[0] = 0;
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ctx->w1[1] = 0;
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ctx->w1[2] = 0;
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ctx->w1[3] = 0;
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ctx->w2[0] = 0;
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ctx->w2[1] = 0;
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ctx->w2[2] = 0;
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ctx->w2[3] = 0;
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ctx->w3[0] = 0;
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ctx->w3[1] = 0;
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ctx->w3[2] = 0;
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ctx->w3[3] = 0;
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ctx->len = 0;
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2017-06-18 21:31:40 +00:00
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}
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2018-07-22 09:47:42 +00:00
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DECLSPEC void md4_update_64 (md4_ctx_t *ctx, u32 *w0, u32 *w1, u32 *w2, u32 *w3, const int len)
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2017-06-18 21:31:40 +00:00
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{
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2019-04-17 11:21:35 +00:00
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MAYBE_VOLATILE const int pos = ctx->len & 63;
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2017-06-18 21:31:40 +00:00
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2017-06-19 14:42:21 +00:00
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ctx->len += len;
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2017-06-18 21:31:40 +00:00
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2019-04-15 16:11:15 +00:00
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if (pos == 0)
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2017-06-18 21:31:40 +00:00
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{
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2019-04-15 16:11:15 +00:00
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ctx->w0[0] = w0[0];
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ctx->w0[1] = w0[1];
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ctx->w0[2] = w0[2];
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ctx->w0[3] = w0[3];
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ctx->w1[0] = w1[0];
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ctx->w1[1] = w1[1];
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ctx->w1[2] = w1[2];
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ctx->w1[3] = w1[3];
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ctx->w2[0] = w2[0];
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ctx->w2[1] = w2[1];
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ctx->w2[2] = w2[2];
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ctx->w2[3] = w2[3];
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ctx->w3[0] = w3[0];
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ctx->w3[1] = w3[1];
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ctx->w3[2] = w3[2];
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ctx->w3[3] = w3[3];
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if (len == 64)
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{
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md4_transform (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->h);
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ctx->w0[0] = 0;
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ctx->w0[1] = 0;
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ctx->w0[2] = 0;
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ctx->w0[3] = 0;
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ctx->w1[0] = 0;
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ctx->w1[1] = 0;
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ctx->w1[2] = 0;
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ctx->w1[3] = 0;
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ctx->w2[0] = 0;
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ctx->w2[1] = 0;
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ctx->w2[2] = 0;
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ctx->w2[3] = 0;
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ctx->w3[0] = 0;
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ctx->w3[1] = 0;
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ctx->w3[2] = 0;
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ctx->w3[3] = 0;
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}
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2017-06-18 21:31:40 +00:00
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}
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else
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{
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2019-04-15 16:11:15 +00:00
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if ((pos + len) < 64)
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{
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switch_buffer_by_offset_le_S (w0, w1, w2, w3, pos);
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ctx->w0[0] |= w0[0];
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ctx->w0[1] |= w0[1];
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ctx->w0[2] |= w0[2];
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ctx->w0[3] |= w0[3];
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ctx->w1[0] |= w1[0];
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ctx->w1[1] |= w1[1];
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ctx->w1[2] |= w1[2];
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ctx->w1[3] |= w1[3];
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ctx->w2[0] |= w2[0];
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ctx->w2[1] |= w2[1];
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ctx->w2[2] |= w2[2];
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ctx->w2[3] |= w2[3];
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ctx->w3[0] |= w3[0];
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ctx->w3[1] |= w3[1];
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ctx->w3[2] |= w3[2];
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ctx->w3[3] |= w3[3];
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}
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else
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{
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u32 c0[4] = { 0 };
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u32 c1[4] = { 0 };
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u32 c2[4] = { 0 };
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u32 c3[4] = { 0 };
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switch_buffer_by_offset_carry_le_S (w0, w1, w2, w3, c0, c1, c2, c3, pos);
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ctx->w0[0] |= w0[0];
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ctx->w0[1] |= w0[1];
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ctx->w0[2] |= w0[2];
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ctx->w0[3] |= w0[3];
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ctx->w1[0] |= w1[0];
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ctx->w1[1] |= w1[1];
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ctx->w1[2] |= w1[2];
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ctx->w1[3] |= w1[3];
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ctx->w2[0] |= w2[0];
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ctx->w2[1] |= w2[1];
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ctx->w2[2] |= w2[2];
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ctx->w2[3] |= w2[3];
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ctx->w3[0] |= w3[0];
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ctx->w3[1] |= w3[1];
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ctx->w3[2] |= w3[2];
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ctx->w3[3] |= w3[3];
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md4_transform (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->h);
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ctx->w0[0] = c0[0];
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ctx->w0[1] = c0[1];
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ctx->w0[2] = c0[2];
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ctx->w0[3] = c0[3];
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ctx->w1[0] = c1[0];
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ctx->w1[1] = c1[1];
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ctx->w1[2] = c1[2];
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ctx->w1[3] = c1[3];
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ctx->w2[0] = c2[0];
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ctx->w2[1] = c2[1];
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ctx->w2[2] = c2[2];
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ctx->w2[3] = c2[3];
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ctx->w3[0] = c3[0];
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ctx->w3[1] = c3[1];
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ctx->w3[2] = c3[2];
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ctx->w3[3] = c3[3];
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}
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2017-06-18 21:31:40 +00:00
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}
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}
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2018-02-06 18:12:24 +00:00
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DECLSPEC void md4_update (md4_ctx_t *ctx, const u32 *w, const int len)
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2017-06-18 21:31:40 +00:00
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{
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u32 w0[4];
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u32 w1[4];
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u32 w2[4];
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u32 w3[4];
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2017-06-21 14:21:12 +00:00
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int pos1;
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int pos4;
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2017-06-18 21:31:40 +00:00
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2017-06-21 14:21:12 +00:00
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for (pos1 = 0, pos4 = 0; pos1 < len - 64; pos1 += 64, pos4 += 16)
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2017-06-18 21:31:40 +00:00
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{
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2017-06-21 14:21:12 +00:00
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w0[0] = w[pos4 + 0];
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w0[1] = w[pos4 + 1];
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w0[2] = w[pos4 + 2];
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w0[3] = w[pos4 + 3];
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w1[0] = w[pos4 + 4];
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w1[1] = w[pos4 + 5];
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w1[2] = w[pos4 + 6];
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w1[3] = w[pos4 + 7];
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w2[0] = w[pos4 + 8];
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w2[1] = w[pos4 + 9];
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w2[2] = w[pos4 + 10];
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w2[3] = w[pos4 + 11];
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w3[0] = w[pos4 + 12];
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w3[1] = w[pos4 + 13];
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w3[2] = w[pos4 + 14];
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w3[3] = w[pos4 + 15];
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2017-06-18 21:31:40 +00:00
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2017-06-19 14:42:21 +00:00
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md4_update_64 (ctx, w0, w1, w2, w3, 64);
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2017-06-18 21:31:40 +00:00
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}
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2017-06-21 14:21:12 +00:00
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w0[0] = w[pos4 + 0];
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w0[1] = w[pos4 + 1];
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w0[2] = w[pos4 + 2];
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w0[3] = w[pos4 + 3];
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w1[0] = w[pos4 + 4];
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w1[1] = w[pos4 + 5];
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w1[2] = w[pos4 + 6];
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w1[3] = w[pos4 + 7];
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w2[0] = w[pos4 + 8];
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w2[1] = w[pos4 + 9];
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w2[2] = w[pos4 + 10];
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w2[3] = w[pos4 + 11];
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w3[0] = w[pos4 + 12];
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|
|
w3[1] = w[pos4 + 13];
|
|
|
|
w3[2] = w[pos4 + 14];
|
|
|
|
w3[3] = w[pos4 + 15];
|
|
|
|
|
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, len - pos1);
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_update_swap (md4_ctx_t *ctx, const u32 *w, const int len)
|
2017-07-12 22:16:29 +00:00
|
|
|
{
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
|
|
|
int pos1;
|
|
|
|
int pos4;
|
|
|
|
|
|
|
|
for (pos1 = 0, pos4 = 0; pos1 < len - 64; pos1 += 64, pos4 += 16)
|
|
|
|
{
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
w2[0] = w[pos4 + 8];
|
|
|
|
w2[1] = w[pos4 + 9];
|
|
|
|
w2[2] = w[pos4 + 10];
|
|
|
|
w2[3] = w[pos4 + 11];
|
|
|
|
w3[0] = w[pos4 + 12];
|
|
|
|
w3[1] = w[pos4 + 13];
|
|
|
|
w3[2] = w[pos4 + 14];
|
|
|
|
w3[3] = w[pos4 + 15];
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32_S (w0[0]);
|
|
|
|
w0[1] = hc_swap32_S (w0[1]);
|
|
|
|
w0[2] = hc_swap32_S (w0[2]);
|
|
|
|
w0[3] = hc_swap32_S (w0[3]);
|
|
|
|
w1[0] = hc_swap32_S (w1[0]);
|
|
|
|
w1[1] = hc_swap32_S (w1[1]);
|
|
|
|
w1[2] = hc_swap32_S (w1[2]);
|
|
|
|
w1[3] = hc_swap32_S (w1[3]);
|
|
|
|
w2[0] = hc_swap32_S (w2[0]);
|
|
|
|
w2[1] = hc_swap32_S (w2[1]);
|
|
|
|
w2[2] = hc_swap32_S (w2[2]);
|
|
|
|
w2[3] = hc_swap32_S (w2[3]);
|
|
|
|
w3[0] = hc_swap32_S (w3[0]);
|
|
|
|
w3[1] = hc_swap32_S (w3[1]);
|
|
|
|
w3[2] = hc_swap32_S (w3[2]);
|
|
|
|
w3[3] = hc_swap32_S (w3[3]);
|
2017-07-12 22:16:29 +00:00
|
|
|
|
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, 64);
|
|
|
|
}
|
|
|
|
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
w2[0] = w[pos4 + 8];
|
|
|
|
w2[1] = w[pos4 + 9];
|
|
|
|
w2[2] = w[pos4 + 10];
|
|
|
|
w2[3] = w[pos4 + 11];
|
|
|
|
w3[0] = w[pos4 + 12];
|
|
|
|
w3[1] = w[pos4 + 13];
|
|
|
|
w3[2] = w[pos4 + 14];
|
|
|
|
w3[3] = w[pos4 + 15];
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32_S (w0[0]);
|
|
|
|
w0[1] = hc_swap32_S (w0[1]);
|
|
|
|
w0[2] = hc_swap32_S (w0[2]);
|
|
|
|
w0[3] = hc_swap32_S (w0[3]);
|
|
|
|
w1[0] = hc_swap32_S (w1[0]);
|
|
|
|
w1[1] = hc_swap32_S (w1[1]);
|
|
|
|
w1[2] = hc_swap32_S (w1[2]);
|
|
|
|
w1[3] = hc_swap32_S (w1[3]);
|
|
|
|
w2[0] = hc_swap32_S (w2[0]);
|
|
|
|
w2[1] = hc_swap32_S (w2[1]);
|
|
|
|
w2[2] = hc_swap32_S (w2[2]);
|
|
|
|
w2[3] = hc_swap32_S (w2[3]);
|
|
|
|
w3[0] = hc_swap32_S (w3[0]);
|
|
|
|
w3[1] = hc_swap32_S (w3[1]);
|
|
|
|
w3[2] = hc_swap32_S (w3[2]);
|
|
|
|
w3[3] = hc_swap32_S (w3[3]);
|
2017-07-12 22:16:29 +00:00
|
|
|
|
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, len - pos1);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_update_utf16le (md4_ctx_t *ctx, const u32 *w, const int len)
|
2017-07-12 22:16:29 +00:00
|
|
|
{
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
|
|
|
int pos1;
|
|
|
|
int pos4;
|
|
|
|
|
|
|
|
for (pos1 = 0, pos4 = 0; pos1 < len - 32; pos1 += 32, pos4 += 8)
|
|
|
|
{
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
|
|
|
|
make_utf16le_S (w1, w2, w3);
|
|
|
|
make_utf16le_S (w0, w0, w1);
|
|
|
|
|
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, 32 * 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
|
|
|
|
make_utf16le_S (w1, w2, w3);
|
|
|
|
make_utf16le_S (w0, w0, w1);
|
|
|
|
|
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, (len - pos1) * 2);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_update_utf16le_swap (md4_ctx_t *ctx, const u32 *w, const int len)
|
2017-07-12 22:16:29 +00:00
|
|
|
{
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
|
|
|
int pos1;
|
|
|
|
int pos4;
|
|
|
|
|
|
|
|
for (pos1 = 0, pos4 = 0; pos1 < len - 32; pos1 += 32, pos4 += 8)
|
|
|
|
{
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
|
|
|
|
make_utf16le_S (w1, w2, w3);
|
|
|
|
make_utf16le_S (w0, w0, w1);
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32_S (w0[0]);
|
|
|
|
w0[1] = hc_swap32_S (w0[1]);
|
|
|
|
w0[2] = hc_swap32_S (w0[2]);
|
|
|
|
w0[3] = hc_swap32_S (w0[3]);
|
|
|
|
w1[0] = hc_swap32_S (w1[0]);
|
|
|
|
w1[1] = hc_swap32_S (w1[1]);
|
|
|
|
w1[2] = hc_swap32_S (w1[2]);
|
|
|
|
w1[3] = hc_swap32_S (w1[3]);
|
|
|
|
w2[0] = hc_swap32_S (w2[0]);
|
|
|
|
w2[1] = hc_swap32_S (w2[1]);
|
|
|
|
w2[2] = hc_swap32_S (w2[2]);
|
|
|
|
w2[3] = hc_swap32_S (w2[3]);
|
|
|
|
w3[0] = hc_swap32_S (w3[0]);
|
|
|
|
w3[1] = hc_swap32_S (w3[1]);
|
|
|
|
w3[2] = hc_swap32_S (w3[2]);
|
|
|
|
w3[3] = hc_swap32_S (w3[3]);
|
2017-07-12 22:16:29 +00:00
|
|
|
|
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, 32 * 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
|
|
|
|
make_utf16le_S (w1, w2, w3);
|
|
|
|
make_utf16le_S (w0, w0, w1);
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32_S (w0[0]);
|
|
|
|
w0[1] = hc_swap32_S (w0[1]);
|
|
|
|
w0[2] = hc_swap32_S (w0[2]);
|
|
|
|
w0[3] = hc_swap32_S (w0[3]);
|
|
|
|
w1[0] = hc_swap32_S (w1[0]);
|
|
|
|
w1[1] = hc_swap32_S (w1[1]);
|
|
|
|
w1[2] = hc_swap32_S (w1[2]);
|
|
|
|
w1[3] = hc_swap32_S (w1[3]);
|
|
|
|
w2[0] = hc_swap32_S (w2[0]);
|
|
|
|
w2[1] = hc_swap32_S (w2[1]);
|
|
|
|
w2[2] = hc_swap32_S (w2[2]);
|
|
|
|
w2[3] = hc_swap32_S (w2[3]);
|
|
|
|
w3[0] = hc_swap32_S (w3[0]);
|
|
|
|
w3[1] = hc_swap32_S (w3[1]);
|
|
|
|
w3[2] = hc_swap32_S (w3[2]);
|
|
|
|
w3[3] = hc_swap32_S (w3[3]);
|
2017-07-12 22:16:29 +00:00
|
|
|
|
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, (len - pos1) * 2);
|
|
|
|
}
|
|
|
|
|
2019-03-25 11:24:04 +00:00
|
|
|
DECLSPEC void md4_update_global (md4_ctx_t *ctx, GLOBAL_AS const u32 *w, const int len)
|
2017-06-18 21:31:40 +00:00
|
|
|
{
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
2017-06-21 14:21:12 +00:00
|
|
|
int pos1;
|
|
|
|
int pos4;
|
2017-06-18 21:31:40 +00:00
|
|
|
|
2017-06-21 14:21:12 +00:00
|
|
|
for (pos1 = 0, pos4 = 0; pos1 < len - 64; pos1 += 64, pos4 += 16)
|
2017-06-18 21:31:40 +00:00
|
|
|
{
|
2017-06-21 14:21:12 +00:00
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
w2[0] = w[pos4 + 8];
|
|
|
|
w2[1] = w[pos4 + 9];
|
|
|
|
w2[2] = w[pos4 + 10];
|
|
|
|
w2[3] = w[pos4 + 11];
|
|
|
|
w3[0] = w[pos4 + 12];
|
|
|
|
w3[1] = w[pos4 + 13];
|
|
|
|
w3[2] = w[pos4 + 14];
|
|
|
|
w3[3] = w[pos4 + 15];
|
2017-06-18 21:31:40 +00:00
|
|
|
|
2017-06-19 14:42:21 +00:00
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, 64);
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
|
2017-06-21 14:21:12 +00:00
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
w2[0] = w[pos4 + 8];
|
|
|
|
w2[1] = w[pos4 + 9];
|
|
|
|
w2[2] = w[pos4 + 10];
|
|
|
|
w2[3] = w[pos4 + 11];
|
|
|
|
w3[0] = w[pos4 + 12];
|
|
|
|
w3[1] = w[pos4 + 13];
|
|
|
|
w3[2] = w[pos4 + 14];
|
|
|
|
w3[3] = w[pos4 + 15];
|
|
|
|
|
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, len - pos1);
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
|
2019-03-25 11:24:04 +00:00
|
|
|
DECLSPEC void md4_update_global_swap (md4_ctx_t *ctx, GLOBAL_AS const u32 *w, const int len)
|
2017-07-01 16:09:05 +00:00
|
|
|
{
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
|
|
|
int pos1;
|
|
|
|
int pos4;
|
|
|
|
|
|
|
|
for (pos1 = 0, pos4 = 0; pos1 < len - 64; pos1 += 64, pos4 += 16)
|
|
|
|
{
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
w2[0] = w[pos4 + 8];
|
|
|
|
w2[1] = w[pos4 + 9];
|
|
|
|
w2[2] = w[pos4 + 10];
|
|
|
|
w2[3] = w[pos4 + 11];
|
|
|
|
w3[0] = w[pos4 + 12];
|
|
|
|
w3[1] = w[pos4 + 13];
|
|
|
|
w3[2] = w[pos4 + 14];
|
|
|
|
w3[3] = w[pos4 + 15];
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32_S (w0[0]);
|
|
|
|
w0[1] = hc_swap32_S (w0[1]);
|
|
|
|
w0[2] = hc_swap32_S (w0[2]);
|
|
|
|
w0[3] = hc_swap32_S (w0[3]);
|
|
|
|
w1[0] = hc_swap32_S (w1[0]);
|
|
|
|
w1[1] = hc_swap32_S (w1[1]);
|
|
|
|
w1[2] = hc_swap32_S (w1[2]);
|
|
|
|
w1[3] = hc_swap32_S (w1[3]);
|
|
|
|
w2[0] = hc_swap32_S (w2[0]);
|
|
|
|
w2[1] = hc_swap32_S (w2[1]);
|
|
|
|
w2[2] = hc_swap32_S (w2[2]);
|
|
|
|
w2[3] = hc_swap32_S (w2[3]);
|
|
|
|
w3[0] = hc_swap32_S (w3[0]);
|
|
|
|
w3[1] = hc_swap32_S (w3[1]);
|
|
|
|
w3[2] = hc_swap32_S (w3[2]);
|
|
|
|
w3[3] = hc_swap32_S (w3[3]);
|
2017-07-01 16:09:05 +00:00
|
|
|
|
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, 64);
|
|
|
|
}
|
|
|
|
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
w2[0] = w[pos4 + 8];
|
|
|
|
w2[1] = w[pos4 + 9];
|
|
|
|
w2[2] = w[pos4 + 10];
|
|
|
|
w2[3] = w[pos4 + 11];
|
|
|
|
w3[0] = w[pos4 + 12];
|
|
|
|
w3[1] = w[pos4 + 13];
|
|
|
|
w3[2] = w[pos4 + 14];
|
|
|
|
w3[3] = w[pos4 + 15];
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32_S (w0[0]);
|
|
|
|
w0[1] = hc_swap32_S (w0[1]);
|
|
|
|
w0[2] = hc_swap32_S (w0[2]);
|
|
|
|
w0[3] = hc_swap32_S (w0[3]);
|
|
|
|
w1[0] = hc_swap32_S (w1[0]);
|
|
|
|
w1[1] = hc_swap32_S (w1[1]);
|
|
|
|
w1[2] = hc_swap32_S (w1[2]);
|
|
|
|
w1[3] = hc_swap32_S (w1[3]);
|
|
|
|
w2[0] = hc_swap32_S (w2[0]);
|
|
|
|
w2[1] = hc_swap32_S (w2[1]);
|
|
|
|
w2[2] = hc_swap32_S (w2[2]);
|
|
|
|
w2[3] = hc_swap32_S (w2[3]);
|
|
|
|
w3[0] = hc_swap32_S (w3[0]);
|
|
|
|
w3[1] = hc_swap32_S (w3[1]);
|
|
|
|
w3[2] = hc_swap32_S (w3[2]);
|
|
|
|
w3[3] = hc_swap32_S (w3[3]);
|
2017-07-01 16:09:05 +00:00
|
|
|
|
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, len - pos1);
|
|
|
|
}
|
|
|
|
|
2019-03-25 11:24:04 +00:00
|
|
|
DECLSPEC void md4_update_global_utf16le (md4_ctx_t *ctx, GLOBAL_AS const u32 *w, const int len)
|
2017-06-18 21:31:40 +00:00
|
|
|
{
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
2017-06-21 14:21:12 +00:00
|
|
|
int pos1;
|
|
|
|
int pos4;
|
2017-06-18 21:31:40 +00:00
|
|
|
|
2017-06-21 14:21:12 +00:00
|
|
|
for (pos1 = 0, pos4 = 0; pos1 < len - 32; pos1 += 32, pos4 += 8)
|
2017-06-18 21:31:40 +00:00
|
|
|
{
|
2017-06-21 14:21:12 +00:00
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
2017-06-18 21:31:40 +00:00
|
|
|
|
|
|
|
make_utf16le_S (w1, w2, w3);
|
|
|
|
make_utf16le_S (w0, w0, w1);
|
|
|
|
|
2017-06-19 14:42:21 +00:00
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, 32 * 2);
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
|
2017-06-21 14:21:12 +00:00
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
2017-06-18 21:31:40 +00:00
|
|
|
|
|
|
|
make_utf16le_S (w1, w2, w3);
|
|
|
|
make_utf16le_S (w0, w0, w1);
|
|
|
|
|
2017-06-21 14:21:12 +00:00
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, (len - pos1) * 2);
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
|
2019-03-25 11:24:04 +00:00
|
|
|
DECLSPEC void md4_update_global_utf16le_swap (md4_ctx_t *ctx, GLOBAL_AS const u32 *w, const int len)
|
2017-07-01 16:09:05 +00:00
|
|
|
{
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
|
|
|
int pos1;
|
|
|
|
int pos4;
|
|
|
|
|
|
|
|
for (pos1 = 0, pos4 = 0; pos1 < len - 32; pos1 += 32, pos4 += 8)
|
|
|
|
{
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
|
|
|
|
make_utf16le_S (w1, w2, w3);
|
|
|
|
make_utf16le_S (w0, w0, w1);
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32_S (w0[0]);
|
|
|
|
w0[1] = hc_swap32_S (w0[1]);
|
|
|
|
w0[2] = hc_swap32_S (w0[2]);
|
|
|
|
w0[3] = hc_swap32_S (w0[3]);
|
|
|
|
w1[0] = hc_swap32_S (w1[0]);
|
|
|
|
w1[1] = hc_swap32_S (w1[1]);
|
|
|
|
w1[2] = hc_swap32_S (w1[2]);
|
|
|
|
w1[3] = hc_swap32_S (w1[3]);
|
|
|
|
w2[0] = hc_swap32_S (w2[0]);
|
|
|
|
w2[1] = hc_swap32_S (w2[1]);
|
|
|
|
w2[2] = hc_swap32_S (w2[2]);
|
|
|
|
w2[3] = hc_swap32_S (w2[3]);
|
|
|
|
w3[0] = hc_swap32_S (w3[0]);
|
|
|
|
w3[1] = hc_swap32_S (w3[1]);
|
|
|
|
w3[2] = hc_swap32_S (w3[2]);
|
|
|
|
w3[3] = hc_swap32_S (w3[3]);
|
2017-07-01 16:09:05 +00:00
|
|
|
|
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, 32 * 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
|
|
|
|
make_utf16le_S (w1, w2, w3);
|
|
|
|
make_utf16le_S (w0, w0, w1);
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32_S (w0[0]);
|
|
|
|
w0[1] = hc_swap32_S (w0[1]);
|
|
|
|
w0[2] = hc_swap32_S (w0[2]);
|
|
|
|
w0[3] = hc_swap32_S (w0[3]);
|
|
|
|
w1[0] = hc_swap32_S (w1[0]);
|
|
|
|
w1[1] = hc_swap32_S (w1[1]);
|
|
|
|
w1[2] = hc_swap32_S (w1[2]);
|
|
|
|
w1[3] = hc_swap32_S (w1[3]);
|
|
|
|
w2[0] = hc_swap32_S (w2[0]);
|
|
|
|
w2[1] = hc_swap32_S (w2[1]);
|
|
|
|
w2[2] = hc_swap32_S (w2[2]);
|
|
|
|
w2[3] = hc_swap32_S (w2[3]);
|
|
|
|
w3[0] = hc_swap32_S (w3[0]);
|
|
|
|
w3[1] = hc_swap32_S (w3[1]);
|
|
|
|
w3[2] = hc_swap32_S (w3[2]);
|
|
|
|
w3[3] = hc_swap32_S (w3[3]);
|
2017-07-01 16:09:05 +00:00
|
|
|
|
|
|
|
md4_update_64 (ctx, w0, w1, w2, w3, (len - pos1) * 2);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_final (md4_ctx_t *ctx)
|
2017-06-18 21:31:40 +00:00
|
|
|
{
|
2019-04-17 11:21:35 +00:00
|
|
|
MAYBE_VOLATILE const int pos = ctx->len & 63;
|
2017-06-18 21:31:40 +00:00
|
|
|
|
2017-06-19 14:42:21 +00:00
|
|
|
append_0x80_4x4_S (ctx->w0, ctx->w1, ctx->w2, ctx->w3, pos);
|
2017-06-18 21:31:40 +00:00
|
|
|
|
|
|
|
if (pos >= 56)
|
|
|
|
{
|
2017-06-19 14:42:21 +00:00
|
|
|
md4_transform (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->h);
|
|
|
|
|
|
|
|
ctx->w0[0] = 0;
|
|
|
|
ctx->w0[1] = 0;
|
|
|
|
ctx->w0[2] = 0;
|
|
|
|
ctx->w0[3] = 0;
|
|
|
|
ctx->w1[0] = 0;
|
|
|
|
ctx->w1[1] = 0;
|
|
|
|
ctx->w1[2] = 0;
|
|
|
|
ctx->w1[3] = 0;
|
|
|
|
ctx->w2[0] = 0;
|
|
|
|
ctx->w2[1] = 0;
|
|
|
|
ctx->w2[2] = 0;
|
|
|
|
ctx->w2[3] = 0;
|
|
|
|
ctx->w3[0] = 0;
|
|
|
|
ctx->w3[1] = 0;
|
|
|
|
ctx->w3[2] = 0;
|
|
|
|
ctx->w3[3] = 0;
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
|
2017-06-19 14:42:21 +00:00
|
|
|
ctx->w3[2] = ctx->len * 8;
|
|
|
|
ctx->w3[3] = 0;
|
2017-06-18 21:31:40 +00:00
|
|
|
|
2017-06-19 14:42:21 +00:00
|
|
|
md4_transform (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->h);
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
|
2017-07-01 16:09:05 +00:00
|
|
|
// md4_hmac
|
|
|
|
|
2018-07-22 09:47:42 +00:00
|
|
|
DECLSPEC void md4_hmac_init_64 (md4_hmac_ctx_t *ctx, const u32 *w0, const u32 *w1, const u32 *w2, const u32 *w3)
|
2017-07-01 16:09:05 +00:00
|
|
|
{
|
|
|
|
u32 t0[4];
|
|
|
|
u32 t1[4];
|
|
|
|
u32 t2[4];
|
|
|
|
u32 t3[4];
|
|
|
|
|
|
|
|
// ipad
|
|
|
|
|
|
|
|
t0[0] = w0[0] ^ 0x36363636;
|
|
|
|
t0[1] = w0[1] ^ 0x36363636;
|
|
|
|
t0[2] = w0[2] ^ 0x36363636;
|
|
|
|
t0[3] = w0[3] ^ 0x36363636;
|
|
|
|
t1[0] = w1[0] ^ 0x36363636;
|
|
|
|
t1[1] = w1[1] ^ 0x36363636;
|
|
|
|
t1[2] = w1[2] ^ 0x36363636;
|
|
|
|
t1[3] = w1[3] ^ 0x36363636;
|
|
|
|
t2[0] = w2[0] ^ 0x36363636;
|
|
|
|
t2[1] = w2[1] ^ 0x36363636;
|
|
|
|
t2[2] = w2[2] ^ 0x36363636;
|
|
|
|
t2[3] = w2[3] ^ 0x36363636;
|
|
|
|
t3[0] = w3[0] ^ 0x36363636;
|
|
|
|
t3[1] = w3[1] ^ 0x36363636;
|
|
|
|
t3[2] = w3[2] ^ 0x36363636;
|
|
|
|
t3[3] = w3[3] ^ 0x36363636;
|
|
|
|
|
|
|
|
md4_init (&ctx->ipad);
|
|
|
|
|
2019-04-14 15:03:37 +00:00
|
|
|
md4_transform (t0, t1, t2, t3, ctx->ipad.h);
|
|
|
|
|
|
|
|
ctx->ipad.len = 64;
|
2017-07-01 16:09:05 +00:00
|
|
|
|
|
|
|
// opad
|
|
|
|
|
|
|
|
t0[0] = w0[0] ^ 0x5c5c5c5c;
|
|
|
|
t0[1] = w0[1] ^ 0x5c5c5c5c;
|
|
|
|
t0[2] = w0[2] ^ 0x5c5c5c5c;
|
|
|
|
t0[3] = w0[3] ^ 0x5c5c5c5c;
|
|
|
|
t1[0] = w1[0] ^ 0x5c5c5c5c;
|
|
|
|
t1[1] = w1[1] ^ 0x5c5c5c5c;
|
|
|
|
t1[2] = w1[2] ^ 0x5c5c5c5c;
|
|
|
|
t1[3] = w1[3] ^ 0x5c5c5c5c;
|
|
|
|
t2[0] = w2[0] ^ 0x5c5c5c5c;
|
|
|
|
t2[1] = w2[1] ^ 0x5c5c5c5c;
|
|
|
|
t2[2] = w2[2] ^ 0x5c5c5c5c;
|
|
|
|
t2[3] = w2[3] ^ 0x5c5c5c5c;
|
|
|
|
t3[0] = w3[0] ^ 0x5c5c5c5c;
|
|
|
|
t3[1] = w3[1] ^ 0x5c5c5c5c;
|
|
|
|
t3[2] = w3[2] ^ 0x5c5c5c5c;
|
|
|
|
t3[3] = w3[3] ^ 0x5c5c5c5c;
|
|
|
|
|
|
|
|
md4_init (&ctx->opad);
|
|
|
|
|
2019-04-14 15:03:37 +00:00
|
|
|
md4_transform (t0, t1, t2, t3, ctx->opad.h);
|
|
|
|
|
|
|
|
ctx->opad.len = 64;
|
2017-07-01 16:09:05 +00:00
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_hmac_init (md4_hmac_ctx_t *ctx, const u32 *w, const int len)
|
2017-07-10 09:15:15 +00:00
|
|
|
{
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
|
|
|
if (len > 64)
|
|
|
|
{
|
|
|
|
md4_ctx_t tmp;
|
|
|
|
|
|
|
|
md4_init (&tmp);
|
|
|
|
|
|
|
|
md4_update (&tmp, w, len);
|
|
|
|
|
|
|
|
md4_final (&tmp);
|
|
|
|
|
|
|
|
w0[0] = tmp.h[0];
|
|
|
|
w0[1] = tmp.h[1];
|
|
|
|
w0[2] = tmp.h[2];
|
|
|
|
w0[3] = tmp.h[3];
|
|
|
|
w1[0] = 0;
|
|
|
|
w1[1] = 0;
|
|
|
|
w1[2] = 0;
|
|
|
|
w1[3] = 0;
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = 0;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
w0[0] = w[ 0];
|
|
|
|
w0[1] = w[ 1];
|
|
|
|
w0[2] = w[ 2];
|
|
|
|
w0[3] = w[ 3];
|
|
|
|
w1[0] = w[ 4];
|
|
|
|
w1[1] = w[ 5];
|
|
|
|
w1[2] = w[ 6];
|
|
|
|
w1[3] = w[ 7];
|
|
|
|
w2[0] = w[ 8];
|
|
|
|
w2[1] = w[ 9];
|
|
|
|
w2[2] = w[10];
|
|
|
|
w2[3] = w[11];
|
|
|
|
w3[0] = w[12];
|
|
|
|
w3[1] = w[13];
|
|
|
|
w3[2] = w[14];
|
|
|
|
w3[3] = w[15];
|
|
|
|
}
|
|
|
|
|
|
|
|
md4_hmac_init_64 (ctx, w0, w1, w2, w3);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_hmac_init_swap (md4_hmac_ctx_t *ctx, const u32 *w, const int len)
|
2017-07-13 17:22:31 +00:00
|
|
|
{
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
|
|
|
if (len > 64)
|
|
|
|
{
|
|
|
|
md4_ctx_t tmp;
|
|
|
|
|
|
|
|
md4_init (&tmp);
|
|
|
|
|
|
|
|
md4_update_swap (&tmp, w, len);
|
|
|
|
|
|
|
|
md4_final (&tmp);
|
|
|
|
|
|
|
|
w0[0] = tmp.h[0];
|
|
|
|
w0[1] = tmp.h[1];
|
|
|
|
w0[2] = tmp.h[2];
|
|
|
|
w0[3] = tmp.h[3];
|
|
|
|
w1[0] = 0;
|
|
|
|
w1[1] = 0;
|
|
|
|
w1[2] = 0;
|
|
|
|
w1[3] = 0;
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = 0;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32_S (w[ 0]);
|
|
|
|
w0[1] = hc_swap32_S (w[ 1]);
|
|
|
|
w0[2] = hc_swap32_S (w[ 2]);
|
|
|
|
w0[3] = hc_swap32_S (w[ 3]);
|
|
|
|
w1[0] = hc_swap32_S (w[ 4]);
|
|
|
|
w1[1] = hc_swap32_S (w[ 5]);
|
|
|
|
w1[2] = hc_swap32_S (w[ 6]);
|
|
|
|
w1[3] = hc_swap32_S (w[ 7]);
|
|
|
|
w2[0] = hc_swap32_S (w[ 8]);
|
|
|
|
w2[1] = hc_swap32_S (w[ 9]);
|
|
|
|
w2[2] = hc_swap32_S (w[10]);
|
|
|
|
w2[3] = hc_swap32_S (w[11]);
|
|
|
|
w3[0] = hc_swap32_S (w[12]);
|
|
|
|
w3[1] = hc_swap32_S (w[13]);
|
|
|
|
w3[2] = hc_swap32_S (w[14]);
|
|
|
|
w3[3] = hc_swap32_S (w[15]);
|
2017-07-13 17:22:31 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
md4_hmac_init_64 (ctx, w0, w1, w2, w3);
|
|
|
|
}
|
|
|
|
|
2019-03-22 21:27:58 +00:00
|
|
|
DECLSPEC void md4_hmac_init_global (md4_hmac_ctx_t *ctx, GLOBAL_AS const u32 *w, const int len)
|
2017-07-10 09:15:15 +00:00
|
|
|
{
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
|
|
|
if (len > 64)
|
|
|
|
{
|
|
|
|
md4_ctx_t tmp;
|
|
|
|
|
|
|
|
md4_init (&tmp);
|
|
|
|
|
|
|
|
md4_update_global (&tmp, w, len);
|
|
|
|
|
|
|
|
md4_final (&tmp);
|
|
|
|
|
|
|
|
w0[0] = tmp.h[0];
|
|
|
|
w0[1] = tmp.h[1];
|
|
|
|
w0[2] = tmp.h[2];
|
|
|
|
w0[3] = tmp.h[3];
|
|
|
|
w1[0] = 0;
|
|
|
|
w1[1] = 0;
|
|
|
|
w1[2] = 0;
|
|
|
|
w1[3] = 0;
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = 0;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
w0[0] = w[ 0];
|
|
|
|
w0[1] = w[ 1];
|
|
|
|
w0[2] = w[ 2];
|
|
|
|
w0[3] = w[ 3];
|
|
|
|
w1[0] = w[ 4];
|
|
|
|
w1[1] = w[ 5];
|
|
|
|
w1[2] = w[ 6];
|
|
|
|
w1[3] = w[ 7];
|
|
|
|
w2[0] = w[ 8];
|
|
|
|
w2[1] = w[ 9];
|
|
|
|
w2[2] = w[10];
|
|
|
|
w2[3] = w[11];
|
|
|
|
w3[0] = w[12];
|
|
|
|
w3[1] = w[13];
|
|
|
|
w3[2] = w[14];
|
|
|
|
w3[3] = w[15];
|
|
|
|
}
|
|
|
|
|
|
|
|
md4_hmac_init_64 (ctx, w0, w1, w2, w3);
|
|
|
|
}
|
|
|
|
|
2019-03-22 21:27:58 +00:00
|
|
|
DECLSPEC void md4_hmac_init_global_swap (md4_hmac_ctx_t *ctx, GLOBAL_AS const u32 *w, const int len)
|
2017-07-10 09:15:15 +00:00
|
|
|
{
|
|
|
|
u32 w0[4];
|
|
|
|
u32 w1[4];
|
|
|
|
u32 w2[4];
|
|
|
|
u32 w3[4];
|
|
|
|
|
|
|
|
if (len > 64)
|
|
|
|
{
|
|
|
|
md4_ctx_t tmp;
|
|
|
|
|
|
|
|
md4_init (&tmp);
|
|
|
|
|
|
|
|
md4_update_global_swap (&tmp, w, len);
|
|
|
|
|
|
|
|
md4_final (&tmp);
|
|
|
|
|
|
|
|
w0[0] = tmp.h[0];
|
|
|
|
w0[1] = tmp.h[1];
|
|
|
|
w0[2] = tmp.h[2];
|
|
|
|
w0[3] = tmp.h[3];
|
|
|
|
w1[0] = 0;
|
|
|
|
w1[1] = 0;
|
|
|
|
w1[2] = 0;
|
|
|
|
w1[3] = 0;
|
|
|
|
w2[0] = 0;
|
|
|
|
w2[1] = 0;
|
|
|
|
w2[2] = 0;
|
|
|
|
w2[3] = 0;
|
|
|
|
w3[0] = 0;
|
|
|
|
w3[1] = 0;
|
|
|
|
w3[2] = 0;
|
|
|
|
w3[3] = 0;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32_S (w[ 0]);
|
|
|
|
w0[1] = hc_swap32_S (w[ 1]);
|
|
|
|
w0[2] = hc_swap32_S (w[ 2]);
|
|
|
|
w0[3] = hc_swap32_S (w[ 3]);
|
|
|
|
w1[0] = hc_swap32_S (w[ 4]);
|
|
|
|
w1[1] = hc_swap32_S (w[ 5]);
|
|
|
|
w1[2] = hc_swap32_S (w[ 6]);
|
|
|
|
w1[3] = hc_swap32_S (w[ 7]);
|
|
|
|
w2[0] = hc_swap32_S (w[ 8]);
|
|
|
|
w2[1] = hc_swap32_S (w[ 9]);
|
|
|
|
w2[2] = hc_swap32_S (w[10]);
|
|
|
|
w2[3] = hc_swap32_S (w[11]);
|
|
|
|
w3[0] = hc_swap32_S (w[12]);
|
|
|
|
w3[1] = hc_swap32_S (w[13]);
|
|
|
|
w3[2] = hc_swap32_S (w[14]);
|
|
|
|
w3[3] = hc_swap32_S (w[15]);
|
2017-07-10 09:15:15 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
md4_hmac_init_64 (ctx, w0, w1, w2, w3);
|
|
|
|
}
|
|
|
|
|
2018-07-22 09:47:42 +00:00
|
|
|
DECLSPEC void md4_hmac_update_64 (md4_hmac_ctx_t *ctx, u32 *w0, u32 *w1, u32 *w2, u32 *w3, const int len)
|
2017-07-01 16:09:05 +00:00
|
|
|
{
|
|
|
|
md4_update_64 (&ctx->ipad, w0, w1, w2, w3, len);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_hmac_update (md4_hmac_ctx_t *ctx, const u32 *w, const int len)
|
2017-07-01 16:09:05 +00:00
|
|
|
{
|
|
|
|
md4_update (&ctx->ipad, w, len);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_hmac_update_swap (md4_hmac_ctx_t *ctx, const u32 *w, const int len)
|
2017-07-14 14:58:30 +00:00
|
|
|
{
|
|
|
|
md4_update_swap (&ctx->ipad, w, len);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_hmac_update_utf16le (md4_hmac_ctx_t *ctx, const u32 *w, const int len)
|
2017-07-14 14:58:30 +00:00
|
|
|
{
|
|
|
|
md4_update_utf16le (&ctx->ipad, w, len);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_hmac_update_utf16le_swap (md4_hmac_ctx_t *ctx, const u32 *w, const int len)
|
2017-07-14 14:58:30 +00:00
|
|
|
{
|
|
|
|
md4_update_utf16le_swap (&ctx->ipad, w, len);
|
|
|
|
}
|
2017-07-31 08:23:04 +00:00
|
|
|
|
2019-03-25 11:24:04 +00:00
|
|
|
DECLSPEC void md4_hmac_update_global (md4_hmac_ctx_t *ctx, GLOBAL_AS const u32 *w, const int len)
|
2017-07-01 16:09:05 +00:00
|
|
|
{
|
|
|
|
md4_update_global (&ctx->ipad, w, len);
|
|
|
|
}
|
|
|
|
|
2019-03-25 11:24:04 +00:00
|
|
|
DECLSPEC void md4_hmac_update_global_swap (md4_hmac_ctx_t *ctx, GLOBAL_AS const u32 *w, const int len)
|
2017-07-01 16:09:05 +00:00
|
|
|
{
|
|
|
|
md4_update_global_swap (&ctx->ipad, w, len);
|
|
|
|
}
|
|
|
|
|
2019-03-25 11:24:04 +00:00
|
|
|
DECLSPEC void md4_hmac_update_global_utf16le (md4_hmac_ctx_t *ctx, GLOBAL_AS const u32 *w, const int len)
|
2017-07-01 16:09:05 +00:00
|
|
|
{
|
|
|
|
md4_update_global_utf16le (&ctx->ipad, w, len);
|
|
|
|
}
|
|
|
|
|
2019-03-25 11:24:04 +00:00
|
|
|
DECLSPEC void md4_hmac_update_global_utf16le_swap (md4_hmac_ctx_t *ctx, GLOBAL_AS const u32 *w, const int len)
|
2017-07-01 16:09:05 +00:00
|
|
|
{
|
|
|
|
md4_update_global_utf16le_swap (&ctx->ipad, w, len);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_hmac_final (md4_hmac_ctx_t *ctx)
|
2017-07-01 16:09:05 +00:00
|
|
|
{
|
|
|
|
md4_final (&ctx->ipad);
|
|
|
|
|
2019-04-14 13:59:03 +00:00
|
|
|
ctx->opad.w0[0] = ctx->ipad.h[0];
|
|
|
|
ctx->opad.w0[1] = ctx->ipad.h[1];
|
|
|
|
ctx->opad.w0[2] = ctx->ipad.h[2];
|
|
|
|
ctx->opad.w0[3] = ctx->ipad.h[3];
|
|
|
|
ctx->opad.w1[0] = 0;
|
|
|
|
ctx->opad.w1[1] = 0;
|
|
|
|
ctx->opad.w1[2] = 0;
|
|
|
|
ctx->opad.w1[3] = 0;
|
|
|
|
ctx->opad.w2[0] = 0;
|
|
|
|
ctx->opad.w2[1] = 0;
|
|
|
|
ctx->opad.w2[2] = 0;
|
|
|
|
ctx->opad.w2[3] = 0;
|
|
|
|
ctx->opad.w3[0] = 0;
|
|
|
|
ctx->opad.w3[1] = 0;
|
|
|
|
ctx->opad.w3[2] = 0;
|
|
|
|
ctx->opad.w3[3] = 0;
|
|
|
|
|
|
|
|
ctx->opad.len += 16;
|
2017-07-01 16:09:05 +00:00
|
|
|
|
|
|
|
md4_final (&ctx->opad);
|
|
|
|
}
|
|
|
|
|
2017-06-18 21:31:40 +00:00
|
|
|
// while input buf can be a vector datatype, the length of the different elements can not
|
|
|
|
|
2018-07-22 09:47:42 +00:00
|
|
|
DECLSPEC void md4_transform_vector (const u32x *w0, const u32x *w1, const u32x *w2, const u32x *w3, u32x *digest)
|
2017-06-18 21:31:40 +00:00
|
|
|
{
|
|
|
|
u32x a = digest[0];
|
|
|
|
u32x b = digest[1];
|
|
|
|
u32x c = digest[2];
|
|
|
|
u32x d = digest[3];
|
|
|
|
|
|
|
|
MD4_STEP (MD4_Fo, a, b, c, d, w0[0], MD4C00, MD4S00);
|
|
|
|
MD4_STEP (MD4_Fo, d, a, b, c, w0[1], MD4C00, MD4S01);
|
|
|
|
MD4_STEP (MD4_Fo, c, d, a, b, w0[2], MD4C00, MD4S02);
|
|
|
|
MD4_STEP (MD4_Fo, b, c, d, a, w0[3], MD4C00, MD4S03);
|
|
|
|
MD4_STEP (MD4_Fo, a, b, c, d, w1[0], MD4C00, MD4S00);
|
|
|
|
MD4_STEP (MD4_Fo, d, a, b, c, w1[1], MD4C00, MD4S01);
|
|
|
|
MD4_STEP (MD4_Fo, c, d, a, b, w1[2], MD4C00, MD4S02);
|
|
|
|
MD4_STEP (MD4_Fo, b, c, d, a, w1[3], MD4C00, MD4S03);
|
|
|
|
MD4_STEP (MD4_Fo, a, b, c, d, w2[0], MD4C00, MD4S00);
|
|
|
|
MD4_STEP (MD4_Fo, d, a, b, c, w2[1], MD4C00, MD4S01);
|
|
|
|
MD4_STEP (MD4_Fo, c, d, a, b, w2[2], MD4C00, MD4S02);
|
|
|
|
MD4_STEP (MD4_Fo, b, c, d, a, w2[3], MD4C00, MD4S03);
|
|
|
|
MD4_STEP (MD4_Fo, a, b, c, d, w3[0], MD4C00, MD4S00);
|
|
|
|
MD4_STEP (MD4_Fo, d, a, b, c, w3[1], MD4C00, MD4S01);
|
|
|
|
MD4_STEP (MD4_Fo, c, d, a, b, w3[2], MD4C00, MD4S02);
|
|
|
|
MD4_STEP (MD4_Fo, b, c, d, a, w3[3], MD4C00, MD4S03);
|
|
|
|
|
|
|
|
MD4_STEP (MD4_Go, a, b, c, d, w0[0], MD4C01, MD4S10);
|
|
|
|
MD4_STEP (MD4_Go, d, a, b, c, w1[0], MD4C01, MD4S11);
|
|
|
|
MD4_STEP (MD4_Go, c, d, a, b, w2[0], MD4C01, MD4S12);
|
|
|
|
MD4_STEP (MD4_Go, b, c, d, a, w3[0], MD4C01, MD4S13);
|
|
|
|
MD4_STEP (MD4_Go, a, b, c, d, w0[1], MD4C01, MD4S10);
|
|
|
|
MD4_STEP (MD4_Go, d, a, b, c, w1[1], MD4C01, MD4S11);
|
|
|
|
MD4_STEP (MD4_Go, c, d, a, b, w2[1], MD4C01, MD4S12);
|
|
|
|
MD4_STEP (MD4_Go, b, c, d, a, w3[1], MD4C01, MD4S13);
|
|
|
|
MD4_STEP (MD4_Go, a, b, c, d, w0[2], MD4C01, MD4S10);
|
|
|
|
MD4_STEP (MD4_Go, d, a, b, c, w1[2], MD4C01, MD4S11);
|
|
|
|
MD4_STEP (MD4_Go, c, d, a, b, w2[2], MD4C01, MD4S12);
|
|
|
|
MD4_STEP (MD4_Go, b, c, d, a, w3[2], MD4C01, MD4S13);
|
|
|
|
MD4_STEP (MD4_Go, a, b, c, d, w0[3], MD4C01, MD4S10);
|
|
|
|
MD4_STEP (MD4_Go, d, a, b, c, w1[3], MD4C01, MD4S11);
|
|
|
|
MD4_STEP (MD4_Go, c, d, a, b, w2[3], MD4C01, MD4S12);
|
|
|
|
MD4_STEP (MD4_Go, b, c, d, a, w3[3], MD4C01, MD4S13);
|
|
|
|
|
|
|
|
MD4_STEP (MD4_H , a, b, c, d, w0[0], MD4C02, MD4S20);
|
|
|
|
MD4_STEP (MD4_H , d, a, b, c, w2[0], MD4C02, MD4S21);
|
|
|
|
MD4_STEP (MD4_H , c, d, a, b, w1[0], MD4C02, MD4S22);
|
|
|
|
MD4_STEP (MD4_H , b, c, d, a, w3[0], MD4C02, MD4S23);
|
|
|
|
MD4_STEP (MD4_H , a, b, c, d, w0[2], MD4C02, MD4S20);
|
|
|
|
MD4_STEP (MD4_H , d, a, b, c, w2[2], MD4C02, MD4S21);
|
|
|
|
MD4_STEP (MD4_H , c, d, a, b, w1[2], MD4C02, MD4S22);
|
|
|
|
MD4_STEP (MD4_H , b, c, d, a, w3[2], MD4C02, MD4S23);
|
|
|
|
MD4_STEP (MD4_H , a, b, c, d, w0[1], MD4C02, MD4S20);
|
|
|
|
MD4_STEP (MD4_H , d, a, b, c, w2[1], MD4C02, MD4S21);
|
|
|
|
MD4_STEP (MD4_H , c, d, a, b, w1[1], MD4C02, MD4S22);
|
|
|
|
MD4_STEP (MD4_H , b, c, d, a, w3[1], MD4C02, MD4S23);
|
|
|
|
MD4_STEP (MD4_H , a, b, c, d, w0[3], MD4C02, MD4S20);
|
|
|
|
MD4_STEP (MD4_H , d, a, b, c, w2[3], MD4C02, MD4S21);
|
|
|
|
MD4_STEP (MD4_H , c, d, a, b, w1[3], MD4C02, MD4S22);
|
|
|
|
MD4_STEP (MD4_H , b, c, d, a, w3[3], MD4C02, MD4S23);
|
|
|
|
|
|
|
|
digest[0] += a;
|
|
|
|
digest[1] += b;
|
|
|
|
digest[2] += c;
|
|
|
|
digest[3] += d;
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_init_vector (md4_ctx_vector_t *ctx)
|
2017-06-18 21:31:40 +00:00
|
|
|
{
|
2017-06-19 14:42:21 +00:00
|
|
|
ctx->h[0] = MD4M_A;
|
|
|
|
ctx->h[1] = MD4M_B;
|
|
|
|
ctx->h[2] = MD4M_C;
|
|
|
|
ctx->h[3] = MD4M_D;
|
|
|
|
|
|
|
|
ctx->w0[0] = 0;
|
|
|
|
ctx->w0[1] = 0;
|
|
|
|
ctx->w0[2] = 0;
|
|
|
|
ctx->w0[3] = 0;
|
|
|
|
ctx->w1[0] = 0;
|
|
|
|
ctx->w1[1] = 0;
|
|
|
|
ctx->w1[2] = 0;
|
|
|
|
ctx->w1[3] = 0;
|
|
|
|
ctx->w2[0] = 0;
|
|
|
|
ctx->w2[1] = 0;
|
|
|
|
ctx->w2[2] = 0;
|
|
|
|
ctx->w2[3] = 0;
|
|
|
|
ctx->w3[0] = 0;
|
|
|
|
ctx->w3[1] = 0;
|
|
|
|
ctx->w3[2] = 0;
|
|
|
|
ctx->w3[3] = 0;
|
|
|
|
|
|
|
|
ctx->len = 0;
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_init_vector_from_scalar (md4_ctx_vector_t *ctx, md4_ctx_t *ctx0)
|
2017-07-12 13:45:22 +00:00
|
|
|
{
|
|
|
|
ctx->h[0] = ctx0->h[0];
|
|
|
|
ctx->h[1] = ctx0->h[1];
|
|
|
|
ctx->h[2] = ctx0->h[2];
|
|
|
|
ctx->h[3] = ctx0->h[3];
|
|
|
|
|
|
|
|
ctx->w0[0] = ctx0->w0[0];
|
|
|
|
ctx->w0[1] = ctx0->w0[1];
|
|
|
|
ctx->w0[2] = ctx0->w0[2];
|
|
|
|
ctx->w0[3] = ctx0->w0[3];
|
|
|
|
ctx->w1[0] = ctx0->w1[0];
|
|
|
|
ctx->w1[1] = ctx0->w1[1];
|
|
|
|
ctx->w1[2] = ctx0->w1[2];
|
|
|
|
ctx->w1[3] = ctx0->w1[3];
|
|
|
|
ctx->w2[0] = ctx0->w2[0];
|
|
|
|
ctx->w2[1] = ctx0->w2[1];
|
|
|
|
ctx->w2[2] = ctx0->w2[2];
|
|
|
|
ctx->w2[3] = ctx0->w2[3];
|
|
|
|
ctx->w3[0] = ctx0->w3[0];
|
|
|
|
ctx->w3[1] = ctx0->w3[1];
|
|
|
|
ctx->w3[2] = ctx0->w3[2];
|
|
|
|
ctx->w3[3] = ctx0->w3[3];
|
|
|
|
|
|
|
|
ctx->len = ctx0->len;
|
|
|
|
}
|
|
|
|
|
2018-07-22 09:47:42 +00:00
|
|
|
DECLSPEC void md4_update_vector_64 (md4_ctx_vector_t *ctx, u32x *w0, u32x *w1, u32x *w2, u32x *w3, const int len)
|
2017-06-18 21:31:40 +00:00
|
|
|
{
|
2019-04-17 11:21:35 +00:00
|
|
|
MAYBE_VOLATILE const int pos = ctx->len & 63;
|
2017-06-18 21:31:40 +00:00
|
|
|
|
2017-06-19 14:42:21 +00:00
|
|
|
ctx->len += len;
|
2017-06-18 21:31:40 +00:00
|
|
|
|
2019-04-15 16:11:15 +00:00
|
|
|
if (pos == 0)
|
2017-06-18 21:31:40 +00:00
|
|
|
{
|
2019-04-15 16:11:15 +00:00
|
|
|
ctx->w0[0] = w0[0];
|
|
|
|
ctx->w0[1] = w0[1];
|
|
|
|
ctx->w0[2] = w0[2];
|
|
|
|
ctx->w0[3] = w0[3];
|
|
|
|
ctx->w1[0] = w1[0];
|
|
|
|
ctx->w1[1] = w1[1];
|
|
|
|
ctx->w1[2] = w1[2];
|
|
|
|
ctx->w1[3] = w1[3];
|
|
|
|
ctx->w2[0] = w2[0];
|
|
|
|
ctx->w2[1] = w2[1];
|
|
|
|
ctx->w2[2] = w2[2];
|
|
|
|
ctx->w2[3] = w2[3];
|
|
|
|
ctx->w3[0] = w3[0];
|
|
|
|
ctx->w3[1] = w3[1];
|
|
|
|
ctx->w3[2] = w3[2];
|
|
|
|
ctx->w3[3] = w3[3];
|
|
|
|
|
|
|
|
if (len == 64)
|
|
|
|
{
|
|
|
|
md4_transform_vector (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->h);
|
|
|
|
|
|
|
|
ctx->w0[0] = 0;
|
|
|
|
ctx->w0[1] = 0;
|
|
|
|
ctx->w0[2] = 0;
|
|
|
|
ctx->w0[3] = 0;
|
|
|
|
ctx->w1[0] = 0;
|
|
|
|
ctx->w1[1] = 0;
|
|
|
|
ctx->w1[2] = 0;
|
|
|
|
ctx->w1[3] = 0;
|
|
|
|
ctx->w2[0] = 0;
|
|
|
|
ctx->w2[1] = 0;
|
|
|
|
ctx->w2[2] = 0;
|
|
|
|
ctx->w2[3] = 0;
|
|
|
|
ctx->w3[0] = 0;
|
|
|
|
ctx->w3[1] = 0;
|
|
|
|
ctx->w3[2] = 0;
|
|
|
|
ctx->w3[3] = 0;
|
|
|
|
}
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2019-04-15 16:11:15 +00:00
|
|
|
if ((pos + len) < 64)
|
|
|
|
{
|
|
|
|
switch_buffer_by_offset_le (w0, w1, w2, w3, pos);
|
|
|
|
|
|
|
|
ctx->w0[0] |= w0[0];
|
|
|
|
ctx->w0[1] |= w0[1];
|
|
|
|
ctx->w0[2] |= w0[2];
|
|
|
|
ctx->w0[3] |= w0[3];
|
|
|
|
ctx->w1[0] |= w1[0];
|
|
|
|
ctx->w1[1] |= w1[1];
|
|
|
|
ctx->w1[2] |= w1[2];
|
|
|
|
ctx->w1[3] |= w1[3];
|
|
|
|
ctx->w2[0] |= w2[0];
|
|
|
|
ctx->w2[1] |= w2[1];
|
|
|
|
ctx->w2[2] |= w2[2];
|
|
|
|
ctx->w2[3] |= w2[3];
|
|
|
|
ctx->w3[0] |= w3[0];
|
|
|
|
ctx->w3[1] |= w3[1];
|
|
|
|
ctx->w3[2] |= w3[2];
|
|
|
|
ctx->w3[3] |= w3[3];
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
u32x c0[4] = { 0 };
|
|
|
|
u32x c1[4] = { 0 };
|
|
|
|
u32x c2[4] = { 0 };
|
|
|
|
u32x c3[4] = { 0 };
|
|
|
|
|
|
|
|
switch_buffer_by_offset_carry_le (w0, w1, w2, w3, c0, c1, c2, c3, pos);
|
|
|
|
|
|
|
|
ctx->w0[0] |= w0[0];
|
|
|
|
ctx->w0[1] |= w0[1];
|
|
|
|
ctx->w0[2] |= w0[2];
|
|
|
|
ctx->w0[3] |= w0[3];
|
|
|
|
ctx->w1[0] |= w1[0];
|
|
|
|
ctx->w1[1] |= w1[1];
|
|
|
|
ctx->w1[2] |= w1[2];
|
|
|
|
ctx->w1[3] |= w1[3];
|
|
|
|
ctx->w2[0] |= w2[0];
|
|
|
|
ctx->w2[1] |= w2[1];
|
|
|
|
ctx->w2[2] |= w2[2];
|
|
|
|
ctx->w2[3] |= w2[3];
|
|
|
|
ctx->w3[0] |= w3[0];
|
|
|
|
ctx->w3[1] |= w3[1];
|
|
|
|
ctx->w3[2] |= w3[2];
|
|
|
|
ctx->w3[3] |= w3[3];
|
|
|
|
|
|
|
|
md4_transform_vector (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->h);
|
|
|
|
|
|
|
|
ctx->w0[0] = c0[0];
|
|
|
|
ctx->w0[1] = c0[1];
|
|
|
|
ctx->w0[2] = c0[2];
|
|
|
|
ctx->w0[3] = c0[3];
|
|
|
|
ctx->w1[0] = c1[0];
|
|
|
|
ctx->w1[1] = c1[1];
|
|
|
|
ctx->w1[2] = c1[2];
|
|
|
|
ctx->w1[3] = c1[3];
|
|
|
|
ctx->w2[0] = c2[0];
|
|
|
|
ctx->w2[1] = c2[1];
|
|
|
|
ctx->w2[2] = c2[2];
|
|
|
|
ctx->w2[3] = c2[3];
|
|
|
|
ctx->w3[0] = c3[0];
|
|
|
|
ctx->w3[1] = c3[1];
|
|
|
|
ctx->w3[2] = c3[2];
|
|
|
|
ctx->w3[3] = c3[3];
|
|
|
|
}
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_update_vector (md4_ctx_vector_t *ctx, const u32x *w, const int len)
|
2017-06-18 21:31:40 +00:00
|
|
|
{
|
|
|
|
u32x w0[4];
|
|
|
|
u32x w1[4];
|
|
|
|
u32x w2[4];
|
|
|
|
u32x w3[4];
|
|
|
|
|
2017-06-21 14:21:12 +00:00
|
|
|
int pos1;
|
|
|
|
int pos4;
|
2017-06-18 21:31:40 +00:00
|
|
|
|
2017-06-21 14:21:12 +00:00
|
|
|
for (pos1 = 0, pos4 = 0; pos1 < len - 64; pos1 += 64, pos4 += 16)
|
2017-06-18 21:31:40 +00:00
|
|
|
{
|
2017-06-21 14:21:12 +00:00
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
w2[0] = w[pos4 + 8];
|
|
|
|
w2[1] = w[pos4 + 9];
|
|
|
|
w2[2] = w[pos4 + 10];
|
|
|
|
w2[3] = w[pos4 + 11];
|
|
|
|
w3[0] = w[pos4 + 12];
|
|
|
|
w3[1] = w[pos4 + 13];
|
|
|
|
w3[2] = w[pos4 + 14];
|
|
|
|
w3[3] = w[pos4 + 15];
|
2017-06-18 21:31:40 +00:00
|
|
|
|
2017-06-19 14:42:21 +00:00
|
|
|
md4_update_vector_64 (ctx, w0, w1, w2, w3, 64);
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
|
2017-06-21 14:21:12 +00:00
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
w2[0] = w[pos4 + 8];
|
|
|
|
w2[1] = w[pos4 + 9];
|
|
|
|
w2[2] = w[pos4 + 10];
|
|
|
|
w2[3] = w[pos4 + 11];
|
|
|
|
w3[0] = w[pos4 + 12];
|
|
|
|
w3[1] = w[pos4 + 13];
|
|
|
|
w3[2] = w[pos4 + 14];
|
|
|
|
w3[3] = w[pos4 + 15];
|
|
|
|
|
|
|
|
md4_update_vector_64 (ctx, w0, w1, w2, w3, len - pos1);
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_update_vector_swap (md4_ctx_vector_t *ctx, const u32x *w, const int len)
|
2017-07-14 11:24:40 +00:00
|
|
|
{
|
|
|
|
u32x w0[4];
|
|
|
|
u32x w1[4];
|
|
|
|
u32x w2[4];
|
|
|
|
u32x w3[4];
|
|
|
|
|
|
|
|
int pos1;
|
|
|
|
int pos4;
|
|
|
|
|
|
|
|
for (pos1 = 0, pos4 = 0; pos1 < len - 64; pos1 += 64, pos4 += 16)
|
|
|
|
{
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
w2[0] = w[pos4 + 8];
|
|
|
|
w2[1] = w[pos4 + 9];
|
|
|
|
w2[2] = w[pos4 + 10];
|
|
|
|
w2[3] = w[pos4 + 11];
|
|
|
|
w3[0] = w[pos4 + 12];
|
|
|
|
w3[1] = w[pos4 + 13];
|
|
|
|
w3[2] = w[pos4 + 14];
|
|
|
|
w3[3] = w[pos4 + 15];
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32 (w0[0]);
|
|
|
|
w0[1] = hc_swap32 (w0[1]);
|
|
|
|
w0[2] = hc_swap32 (w0[2]);
|
|
|
|
w0[3] = hc_swap32 (w0[3]);
|
|
|
|
w1[0] = hc_swap32 (w1[0]);
|
|
|
|
w1[1] = hc_swap32 (w1[1]);
|
|
|
|
w1[2] = hc_swap32 (w1[2]);
|
|
|
|
w1[3] = hc_swap32 (w1[3]);
|
|
|
|
w2[0] = hc_swap32 (w2[0]);
|
|
|
|
w2[1] = hc_swap32 (w2[1]);
|
|
|
|
w2[2] = hc_swap32 (w2[2]);
|
|
|
|
w2[3] = hc_swap32 (w2[3]);
|
|
|
|
w3[0] = hc_swap32 (w3[0]);
|
|
|
|
w3[1] = hc_swap32 (w3[1]);
|
|
|
|
w3[2] = hc_swap32 (w3[2]);
|
|
|
|
w3[3] = hc_swap32 (w3[3]);
|
2017-07-14 11:24:40 +00:00
|
|
|
|
|
|
|
md4_update_vector_64 (ctx, w0, w1, w2, w3, 64);
|
|
|
|
}
|
|
|
|
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
w2[0] = w[pos4 + 8];
|
|
|
|
w2[1] = w[pos4 + 9];
|
|
|
|
w2[2] = w[pos4 + 10];
|
|
|
|
w2[3] = w[pos4 + 11];
|
|
|
|
w3[0] = w[pos4 + 12];
|
|
|
|
w3[1] = w[pos4 + 13];
|
|
|
|
w3[2] = w[pos4 + 14];
|
|
|
|
w3[3] = w[pos4 + 15];
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32 (w0[0]);
|
|
|
|
w0[1] = hc_swap32 (w0[1]);
|
|
|
|
w0[2] = hc_swap32 (w0[2]);
|
|
|
|
w0[3] = hc_swap32 (w0[3]);
|
|
|
|
w1[0] = hc_swap32 (w1[0]);
|
|
|
|
w1[1] = hc_swap32 (w1[1]);
|
|
|
|
w1[2] = hc_swap32 (w1[2]);
|
|
|
|
w1[3] = hc_swap32 (w1[3]);
|
|
|
|
w2[0] = hc_swap32 (w2[0]);
|
|
|
|
w2[1] = hc_swap32 (w2[1]);
|
|
|
|
w2[2] = hc_swap32 (w2[2]);
|
|
|
|
w2[3] = hc_swap32 (w2[3]);
|
|
|
|
w3[0] = hc_swap32 (w3[0]);
|
|
|
|
w3[1] = hc_swap32 (w3[1]);
|
|
|
|
w3[2] = hc_swap32 (w3[2]);
|
|
|
|
w3[3] = hc_swap32 (w3[3]);
|
2017-07-14 11:24:40 +00:00
|
|
|
|
|
|
|
md4_update_vector_64 (ctx, w0, w1, w2, w3, len - pos1);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_update_vector_utf16le (md4_ctx_vector_t *ctx, const u32x *w, const int len)
|
2017-07-12 22:16:29 +00:00
|
|
|
{
|
|
|
|
u32x w0[4];
|
|
|
|
u32x w1[4];
|
|
|
|
u32x w2[4];
|
|
|
|
u32x w3[4];
|
|
|
|
|
|
|
|
int pos1;
|
|
|
|
int pos4;
|
|
|
|
|
|
|
|
for (pos1 = 0, pos4 = 0; pos1 < len - 32; pos1 += 32, pos4 += 8)
|
|
|
|
{
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
|
|
|
|
make_utf16le (w1, w2, w3);
|
|
|
|
make_utf16le (w0, w0, w1);
|
|
|
|
|
|
|
|
md4_update_vector_64 (ctx, w0, w1, w2, w3, 32 * 2);
|
|
|
|
}
|
|
|
|
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
|
|
|
|
make_utf16le (w1, w2, w3);
|
|
|
|
make_utf16le (w0, w0, w1);
|
|
|
|
|
|
|
|
md4_update_vector_64 (ctx, w0, w1, w2, w3, (len - pos1) * 2);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_update_vector_utf16le_swap (md4_ctx_vector_t *ctx, const u32x *w, const int len)
|
2017-07-14 11:24:40 +00:00
|
|
|
{
|
|
|
|
u32x w0[4];
|
|
|
|
u32x w1[4];
|
|
|
|
u32x w2[4];
|
|
|
|
u32x w3[4];
|
|
|
|
|
|
|
|
int pos1;
|
|
|
|
int pos4;
|
|
|
|
|
|
|
|
for (pos1 = 0, pos4 = 0; pos1 < len - 32; pos1 += 32, pos4 += 8)
|
|
|
|
{
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
|
|
|
|
make_utf16le (w1, w2, w3);
|
|
|
|
make_utf16le (w0, w0, w1);
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32 (w0[0]);
|
|
|
|
w0[1] = hc_swap32 (w0[1]);
|
|
|
|
w0[2] = hc_swap32 (w0[2]);
|
|
|
|
w0[3] = hc_swap32 (w0[3]);
|
|
|
|
w1[0] = hc_swap32 (w1[0]);
|
|
|
|
w1[1] = hc_swap32 (w1[1]);
|
|
|
|
w1[2] = hc_swap32 (w1[2]);
|
|
|
|
w1[3] = hc_swap32 (w1[3]);
|
|
|
|
w2[0] = hc_swap32 (w2[0]);
|
|
|
|
w2[1] = hc_swap32 (w2[1]);
|
|
|
|
w2[2] = hc_swap32 (w2[2]);
|
|
|
|
w2[3] = hc_swap32 (w2[3]);
|
|
|
|
w3[0] = hc_swap32 (w3[0]);
|
|
|
|
w3[1] = hc_swap32 (w3[1]);
|
|
|
|
w3[2] = hc_swap32 (w3[2]);
|
|
|
|
w3[3] = hc_swap32 (w3[3]);
|
2017-07-14 11:24:40 +00:00
|
|
|
|
2017-07-14 12:16:48 +00:00
|
|
|
md4_update_vector_64 (ctx, w0, w1, w2, w3, 32 * 2);
|
2017-07-14 11:24:40 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
w0[0] = w[pos4 + 0];
|
|
|
|
w0[1] = w[pos4 + 1];
|
|
|
|
w0[2] = w[pos4 + 2];
|
|
|
|
w0[3] = w[pos4 + 3];
|
|
|
|
w1[0] = w[pos4 + 4];
|
|
|
|
w1[1] = w[pos4 + 5];
|
|
|
|
w1[2] = w[pos4 + 6];
|
|
|
|
w1[3] = w[pos4 + 7];
|
|
|
|
|
|
|
|
make_utf16le (w1, w2, w3);
|
|
|
|
make_utf16le (w0, w0, w1);
|
|
|
|
|
2019-03-23 21:15:38 +00:00
|
|
|
w0[0] = hc_swap32 (w0[0]);
|
|
|
|
w0[1] = hc_swap32 (w0[1]);
|
|
|
|
w0[2] = hc_swap32 (w0[2]);
|
|
|
|
w0[3] = hc_swap32 (w0[3]);
|
|
|
|
w1[0] = hc_swap32 (w1[0]);
|
|
|
|
w1[1] = hc_swap32 (w1[1]);
|
|
|
|
w1[2] = hc_swap32 (w1[2]);
|
|
|
|
w1[3] = hc_swap32 (w1[3]);
|
|
|
|
w2[0] = hc_swap32 (w2[0]);
|
|
|
|
w2[1] = hc_swap32 (w2[1]);
|
|
|
|
w2[2] = hc_swap32 (w2[2]);
|
|
|
|
w2[3] = hc_swap32 (w2[3]);
|
|
|
|
w3[0] = hc_swap32 (w3[0]);
|
|
|
|
w3[1] = hc_swap32 (w3[1]);
|
|
|
|
w3[2] = hc_swap32 (w3[2]);
|
|
|
|
w3[3] = hc_swap32 (w3[3]);
|
2017-07-14 11:24:40 +00:00
|
|
|
|
2017-07-14 12:16:48 +00:00
|
|
|
md4_update_vector_64 (ctx, w0, w1, w2, w3, (len - pos1) * 2);
|
2017-07-14 11:24:40 +00:00
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_final_vector (md4_ctx_vector_t *ctx)
|
2017-06-18 21:31:40 +00:00
|
|
|
{
|
2019-04-17 11:21:35 +00:00
|
|
|
MAYBE_VOLATILE const int pos = ctx->len & 63;
|
2017-06-18 21:31:40 +00:00
|
|
|
|
2017-06-19 14:42:21 +00:00
|
|
|
append_0x80_4x4 (ctx->w0, ctx->w1, ctx->w2, ctx->w3, pos);
|
2017-06-18 21:31:40 +00:00
|
|
|
|
|
|
|
if (pos >= 56)
|
|
|
|
{
|
2017-06-19 14:42:21 +00:00
|
|
|
md4_transform_vector (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->h);
|
|
|
|
|
|
|
|
ctx->w0[0] = 0;
|
|
|
|
ctx->w0[1] = 0;
|
|
|
|
ctx->w0[2] = 0;
|
|
|
|
ctx->w0[3] = 0;
|
|
|
|
ctx->w1[0] = 0;
|
|
|
|
ctx->w1[1] = 0;
|
|
|
|
ctx->w1[2] = 0;
|
|
|
|
ctx->w1[3] = 0;
|
|
|
|
ctx->w2[0] = 0;
|
|
|
|
ctx->w2[1] = 0;
|
|
|
|
ctx->w2[2] = 0;
|
|
|
|
ctx->w2[3] = 0;
|
|
|
|
ctx->w3[0] = 0;
|
|
|
|
ctx->w3[1] = 0;
|
|
|
|
ctx->w3[2] = 0;
|
|
|
|
ctx->w3[3] = 0;
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
|
|
|
|
2017-06-19 14:42:21 +00:00
|
|
|
ctx->w3[2] = ctx->len * 8;
|
|
|
|
ctx->w3[3] = 0;
|
2017-06-18 21:31:40 +00:00
|
|
|
|
2017-06-19 14:42:21 +00:00
|
|
|
md4_transform_vector (ctx->w0, ctx->w1, ctx->w2, ctx->w3, ctx->h);
|
2017-06-18 21:31:40 +00:00
|
|
|
}
|
2017-07-13 10:18:17 +00:00
|
|
|
|
|
|
|
// HMAC + Vector
|
|
|
|
|
2018-07-22 09:47:42 +00:00
|
|
|
DECLSPEC void md4_hmac_init_vector_64 (md4_hmac_ctx_vector_t *ctx, const u32x *w0, const u32x *w1, const u32x *w2, const u32x *w3)
|
2017-07-13 10:18:17 +00:00
|
|
|
{
|
|
|
|
u32x t0[4];
|
|
|
|
u32x t1[4];
|
|
|
|
u32x t2[4];
|
|
|
|
u32x t3[4];
|
|
|
|
|
|
|
|
// ipad
|
|
|
|
|
|
|
|
t0[0] = w0[0] ^ 0x36363636;
|
|
|
|
t0[1] = w0[1] ^ 0x36363636;
|
|
|
|
t0[2] = w0[2] ^ 0x36363636;
|
|
|
|
t0[3] = w0[3] ^ 0x36363636;
|
|
|
|
t1[0] = w1[0] ^ 0x36363636;
|
|
|
|
t1[1] = w1[1] ^ 0x36363636;
|
|
|
|
t1[2] = w1[2] ^ 0x36363636;
|
|
|
|
t1[3] = w1[3] ^ 0x36363636;
|
|
|
|
t2[0] = w2[0] ^ 0x36363636;
|
|
|
|
t2[1] = w2[1] ^ 0x36363636;
|
|
|
|
t2[2] = w2[2] ^ 0x36363636;
|
|
|
|
t2[3] = w2[3] ^ 0x36363636;
|
|
|
|
t3[0] = w3[0] ^ 0x36363636;
|
|
|
|
t3[1] = w3[1] ^ 0x36363636;
|
|
|
|
t3[2] = w3[2] ^ 0x36363636;
|
|
|
|
t3[3] = w3[3] ^ 0x36363636;
|
|
|
|
|
|
|
|
md4_init_vector (&ctx->ipad);
|
|
|
|
|
2019-04-14 15:03:37 +00:00
|
|
|
md4_transform_vector (t0, t1, t2, t3, ctx->ipad.h);
|
|
|
|
|
|
|
|
ctx->ipad.len = 64;
|
2017-07-13 10:18:17 +00:00
|
|
|
|
|
|
|
// opad
|
|
|
|
|
|
|
|
t0[0] = w0[0] ^ 0x5c5c5c5c;
|
|
|
|
t0[1] = w0[1] ^ 0x5c5c5c5c;
|
|
|
|
t0[2] = w0[2] ^ 0x5c5c5c5c;
|
|
|
|
t0[3] = w0[3] ^ 0x5c5c5c5c;
|
|
|
|
t1[0] = w1[0] ^ 0x5c5c5c5c;
|
|
|
|
t1[1] = w1[1] ^ 0x5c5c5c5c;
|
|
|
|
t1[2] = w1[2] ^ 0x5c5c5c5c;
|
|
|
|
t1[3] = w1[3] ^ 0x5c5c5c5c;
|
|
|
|
t2[0] = w2[0] ^ 0x5c5c5c5c;
|
|
|
|
t2[1] = w2[1] ^ 0x5c5c5c5c;
|
|
|
|
t2[2] = w2[2] ^ 0x5c5c5c5c;
|
|
|
|
t2[3] = w2[3] ^ 0x5c5c5c5c;
|
|
|
|
t3[0] = w3[0] ^ 0x5c5c5c5c;
|
|
|
|
t3[1] = w3[1] ^ 0x5c5c5c5c;
|
|
|
|
t3[2] = w3[2] ^ 0x5c5c5c5c;
|
|
|
|
t3[3] = w3[3] ^ 0x5c5c5c5c;
|
|
|
|
|
|
|
|
md4_init_vector (&ctx->opad);
|
|
|
|
|
2019-04-14 15:03:37 +00:00
|
|
|
md4_transform_vector (t0, t1, t2, t3, ctx->opad.h);
|
|
|
|
|
|
|
|
ctx->opad.len = 64;
|
2017-07-13 10:18:17 +00:00
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_hmac_init_vector (md4_hmac_ctx_vector_t *ctx, const u32x *w, const int len)
|
2017-07-13 10:18:17 +00:00
|
|
|
{
|
|
|
|
u32x w0[4];
|
|
|
|
u32x w1[4];
|
|
|
|
u32x w2[4];
|
|
|
|
u32x w3[4];
|
|
|
|
|
|
|
|
if (len > 64)
|
|
|
|
{
|
|
|
|
md4_ctx_vector_t tmp;
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md4_init_vector (&tmp);
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md4_update_vector (&tmp, w, len);
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md4_final_vector (&tmp);
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w0[0] = tmp.h[0];
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w0[1] = tmp.h[1];
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w0[2] = tmp.h[2];
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w0[3] = tmp.h[3];
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w1[0] = 0;
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w1[1] = 0;
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w1[2] = 0;
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w1[3] = 0;
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w2[0] = 0;
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w2[1] = 0;
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w2[2] = 0;
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w2[3] = 0;
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w3[0] = 0;
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w3[1] = 0;
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w3[2] = 0;
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w3[3] = 0;
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|
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}
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else
|
|
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|
{
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w0[0] = w[ 0];
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w0[1] = w[ 1];
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w0[2] = w[ 2];
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w0[3] = w[ 3];
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|
w1[0] = w[ 4];
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w1[1] = w[ 5];
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w1[2] = w[ 6];
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w1[3] = w[ 7];
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w2[0] = w[ 8];
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|
|
|
w2[1] = w[ 9];
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|
|
w2[2] = w[10];
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|
w2[3] = w[11];
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|
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w3[0] = w[12];
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|
|
|
w3[1] = w[13];
|
|
|
|
w3[2] = w[14];
|
|
|
|
w3[3] = w[15];
|
|
|
|
}
|
|
|
|
|
|
|
|
md4_hmac_init_vector_64 (ctx, w0, w1, w2, w3);
|
|
|
|
}
|
|
|
|
|
2018-07-22 09:47:42 +00:00
|
|
|
DECLSPEC void md4_hmac_update_vector_64 (md4_hmac_ctx_vector_t *ctx, u32x *w0, u32x *w1, u32x *w2, u32x *w3, const int len)
|
2017-07-13 10:18:17 +00:00
|
|
|
{
|
|
|
|
md4_update_vector_64 (&ctx->ipad, w0, w1, w2, w3, len);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_hmac_update_vector (md4_hmac_ctx_vector_t *ctx, const u32x *w, const int len)
|
2017-07-13 10:18:17 +00:00
|
|
|
{
|
|
|
|
md4_update_vector (&ctx->ipad, w, len);
|
|
|
|
}
|
|
|
|
|
2018-02-06 18:12:24 +00:00
|
|
|
DECLSPEC void md4_hmac_final_vector (md4_hmac_ctx_vector_t *ctx)
|
2017-07-13 10:18:17 +00:00
|
|
|
{
|
|
|
|
md4_final_vector (&ctx->ipad);
|
|
|
|
|
2019-04-14 13:59:03 +00:00
|
|
|
ctx->opad.w0[0] = ctx->ipad.h[0];
|
|
|
|
ctx->opad.w0[1] = ctx->ipad.h[1];
|
|
|
|
ctx->opad.w0[2] = ctx->ipad.h[2];
|
|
|
|
ctx->opad.w0[3] = ctx->ipad.h[3];
|
|
|
|
ctx->opad.w1[0] = 0;
|
|
|
|
ctx->opad.w1[1] = 0;
|
|
|
|
ctx->opad.w1[2] = 0;
|
|
|
|
ctx->opad.w1[3] = 0;
|
|
|
|
ctx->opad.w2[0] = 0;
|
|
|
|
ctx->opad.w2[1] = 0;
|
|
|
|
ctx->opad.w2[2] = 0;
|
|
|
|
ctx->opad.w2[3] = 0;
|
|
|
|
ctx->opad.w3[0] = 0;
|
|
|
|
ctx->opad.w3[1] = 0;
|
|
|
|
ctx->opad.w3[2] = 0;
|
|
|
|
ctx->opad.w3[3] = 0;
|
|
|
|
|
|
|
|
ctx->opad.len += 16;
|
2017-07-13 10:18:17 +00:00
|
|
|
|
|
|
|
md4_final_vector (&ctx->opad);
|
|
|
|
}
|