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hashcat/OpenCL/m11400_a3.cl

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Initial commit
2015-12-04 14:47:52 +00:00
/**
Fixed all gpu code (see PR #179 for details)
2016-01-30 22:02:15 +00:00
* Authors.....: Jens Steube <jens.steube@gmail.com>
* Gabriele Gristina <matrix@hashcat.net>
Allow and support vector-width 16, which is current maximum for OpenCL. Closes #226.
2016-02-16 15:42:08 +00:00
* magnum <john.magnum@hushmail.com>
Fixed all gpu code (see PR #179 for details)
2016-01-30 22:02:15 +00:00
*
Initial commit
2015-12-04 14:47:52 +00:00
* License.....: MIT
*/
#define _MD5_
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
//incompatible because of brances
//#define NEW_SIMD_CODE
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
Move files from include/ to OpenCL/ if they are used within kernels Rename includes in OpenCL so that it's easier to recognize them as such
2016-05-25 21:04:26 +00:00
#include "inc_hash_constants.h"
#include "inc_vendor.cl"
Initial commit
2015-12-04 14:47:52 +00:00
#define DGST_R0 0
#define DGST_R1 3
#define DGST_R2 2
#define DGST_R3 1
Move files from include/ to OpenCL/ if they are used within kernels Rename includes in OpenCL so that it's easier to recognize them as such
2016-05-25 21:04:26 +00:00
#include "inc_hash_functions.cl"
#include "inc_types.cl"
#include "inc_common.cl"
#include "inc_simd.cl"
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
#if VECT_SIZE == 1
#define uint_to_hex_lower8(i) (u32x) (l_bin2asc[(i)])
#elif VECT_SIZE == 2
#define uint_to_hex_lower8(i) (u32x) (l_bin2asc[(i).s0], l_bin2asc[(i).s1])
#elif VECT_SIZE == 4
#define uint_to_hex_lower8(i) (u32x) (l_bin2asc[(i).s0], l_bin2asc[(i).s1], l_bin2asc[(i).s2], l_bin2asc[(i).s3])
#elif VECT_SIZE == 8
#define uint_to_hex_lower8(i) (u32x) (l_bin2asc[(i).s0], l_bin2asc[(i).s1], l_bin2asc[(i).s2], l_bin2asc[(i).s3], l_bin2asc[(i).s4], l_bin2asc[(i).s5], l_bin2asc[(i).s6], l_bin2asc[(i).s7])
Allow and support vector-width 16, which is current maximum for OpenCL. Closes #226.
2016-02-16 15:42:08 +00:00
#elif VECT_SIZE == 16
#define uint_to_hex_lower8(i) (u32x) (l_bin2asc[(i).s0], l_bin2asc[(i).s1], l_bin2asc[(i).s2], l_bin2asc[(i).s3], l_bin2asc[(i).s4], l_bin2asc[(i).s5], l_bin2asc[(i).s6], l_bin2asc[(i).s7], l_bin2asc[(i).s8], l_bin2asc[(i).s9], l_bin2asc[(i).sa], l_bin2asc[(i).sb], l_bin2asc[(i).sc], l_bin2asc[(i).sd], l_bin2asc[(i).se], l_bin2asc[(i).sf])
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
#endif
- Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance - Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility - Added -cl-std=CL1.1 to all kernel build options - Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache - Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 21:15:26 +00:00
u32 memcat32 (u32x block0[16], u32x block1[16], const u32 block_len, const u32x append0[4], const u32x append1[4], const u32x append2[4], const u32x append3[4], const u32 append_len)
Initial commit
2015-12-04 14:47:52 +00:00
{
const u32 mod = block_len & 3;
const u32 div = block_len / 4;
Fix for -m 1500, -m 3000: Missing "defined" keyword Fix for -m 1000: MD4_H1 copy/paste error Fix for -m 8900, -m 9300: Invalid value for device_processor_cores for CPU devices Fix for -m 9100: Variable salt2 initializer needed some clauses for clearness Temporary limit gpu_accel for CPU devices to 1 for development phase Mark pocl as too bleeding edge for production use, recommend native drivers Remove workarounds for pocl Rename VENDOR_ID_UNKNOWN to VENDOR_ID_GENERIC in host code Rename IS_UNKNOWN to IS_GENERIC in kernel code
2016-01-07 19:14:34 +00:00
#if defined IS_AMD || defined IS_GENERIC
Initial commit
2015-12-04 14:47:52 +00:00
const int offset_minus_4 = 4 - mod;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x append0_t[4];
Initial commit
2015-12-04 14:47:52 +00:00
Fix more append_* functions in kernels
2015-12-15 15:50:21 +00:00
append0_t[0] = amd_bytealign (append0[0], 0, offset_minus_4);
Initial commit
2015-12-04 14:47:52 +00:00
append0_t[1] = amd_bytealign (append0[1], append0[0], offset_minus_4);
append0_t[2] = amd_bytealign (append0[2], append0[1], offset_minus_4);
append0_t[3] = amd_bytealign (append0[3], append0[2], offset_minus_4);
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x append1_t[4];
Initial commit
2015-12-04 14:47:52 +00:00
append1_t[0] = amd_bytealign (append1[0], append0[3], offset_minus_4);
append1_t[1] = amd_bytealign (append1[1], append1[0], offset_minus_4);
append1_t[2] = amd_bytealign (append1[2], append1[1], offset_minus_4);
append1_t[3] = amd_bytealign (append1[3], append1[2], offset_minus_4);
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x append2_t[4];
Initial commit
2015-12-04 14:47:52 +00:00
append2_t[0] = amd_bytealign (append2[0], append1[3], offset_minus_4);
append2_t[1] = amd_bytealign (append2[1], append2[0], offset_minus_4);
append2_t[2] = amd_bytealign (append2[2], append2[1], offset_minus_4);
append2_t[3] = amd_bytealign (append2[3], append2[2], offset_minus_4);
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x append3_t[4];
Initial commit
2015-12-04 14:47:52 +00:00
append3_t[0] = amd_bytealign (append3[0], append2[3], offset_minus_4);
append3_t[1] = amd_bytealign (append3[1], append3[0], offset_minus_4);
append3_t[2] = amd_bytealign (append3[2], append3[1], offset_minus_4);
append3_t[3] = amd_bytealign (append3[3], append3[2], offset_minus_4);
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x append4_t[4];
Initial commit
2015-12-04 14:47:52 +00:00
append4_t[0] = amd_bytealign ( 0, append3[3], offset_minus_4);
append4_t[1] = 0;
append4_t[2] = 0;
append4_t[3] = 0;
if (mod == 0)
{
append0_t[0] = append0[0];
append0_t[1] = append0[1];
append0_t[2] = append0[2];
append0_t[3] = append0[3];
append1_t[0] = append1[0];
append1_t[1] = append1[1];
append1_t[2] = append1[2];
append1_t[3] = append1[3];
append2_t[0] = append2[0];
append2_t[1] = append2[1];
append2_t[2] = append2[2];
append2_t[3] = append2[3];
append3_t[0] = append3[0];
append3_t[1] = append3[1];
append3_t[2] = append3[2];
append3_t[3] = append3[3];
append4_t[0] = 0;
append4_t[1] = 0;
append4_t[2] = 0;
append4_t[3] = 0;
}
Fix more append_* functions in kernels
2015-12-15 15:50:21 +00:00
#endif
#ifdef IS_NV
const int offset_minus_4 = 4 - mod;
const int selector = (0x76543210 >> (offset_minus_4 * 4)) & 0xffff;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x append0_t[4];
Fix more append_* functions in kernels
2015-12-15 15:50:21 +00:00
append0_t[0] = __byte_perm ( 0, append0[0], selector);
append0_t[1] = __byte_perm (append0[0], append0[1], selector);
append0_t[2] = __byte_perm (append0[1], append0[2], selector);
append0_t[3] = __byte_perm (append0[2], append0[3], selector);
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x append1_t[4];
Fix more append_* functions in kernels
2015-12-15 15:50:21 +00:00
append1_t[0] = __byte_perm (append0[3], append1[0], selector);
append1_t[1] = __byte_perm (append1[0], append1[1], selector);
append1_t[2] = __byte_perm (append1[1], append1[2], selector);
append1_t[3] = __byte_perm (append1[2], append1[3], selector);
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x append2_t[4];
Fix more append_* functions in kernels
2015-12-15 15:50:21 +00:00
append2_t[0] = __byte_perm (append1[3], append2[0], selector);
append2_t[1] = __byte_perm (append2[0], append2[1], selector);
append2_t[2] = __byte_perm (append2[1], append2[2], selector);
append2_t[3] = __byte_perm (append2[2], append2[3], selector);
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x append3_t[4];
Fix more append_* functions in kernels
2015-12-15 15:50:21 +00:00
append3_t[0] = __byte_perm (append2[3], append3[0], selector);
append3_t[1] = __byte_perm (append3[0], append3[1], selector);
append3_t[2] = __byte_perm (append3[1], append3[2], selector);
append3_t[3] = __byte_perm (append3[2], append3[3], selector);
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x append4_t[4];
Fix more append_* functions in kernels
2015-12-15 15:50:21 +00:00
append4_t[0] = __byte_perm (append3[3], 0, selector);
append4_t[1] = 0;
append4_t[2] = 0;
append4_t[3] = 0;
#endif
Initial commit
2015-12-04 14:47:52 +00:00
switch (div)
{
case 0: block0[ 0] |= append0_t[0];
block0[ 1] = append0_t[1];
block0[ 2] = append0_t[2];
block0[ 3] = append0_t[3];
block0[ 4] = append1_t[0];
block0[ 5] = append1_t[1];
block0[ 6] = append1_t[2];
block0[ 7] = append1_t[3];
block0[ 8] = append2_t[0];
block0[ 9] = append2_t[1];
block0[10] = append2_t[2];
block0[11] = append2_t[3];
block0[12] = append3_t[0];
block0[13] = append3_t[1];
block0[14] = append3_t[2];
block0[15] = append3_t[3];
block1[ 0] = append4_t[0];
block1[ 1] = append4_t[1];
block1[ 2] = append4_t[2];
block1[ 3] = append4_t[3];
break;
case 1: block0[ 1] |= append0_t[0];
block0[ 2] = append0_t[1];
block0[ 3] = append0_t[2];
block0[ 4] = append0_t[3];
block0[ 5] = append1_t[0];
block0[ 6] = append1_t[1];
block0[ 7] = append1_t[2];
block0[ 8] = append1_t[3];
block0[ 9] = append2_t[0];
block0[10] = append2_t[1];
block0[11] = append2_t[2];
block0[12] = append2_t[3];
block0[13] = append3_t[0];
block0[14] = append3_t[1];
block0[15] = append3_t[2];
block1[ 0] = append3_t[3];
block1[ 1] = append4_t[0];
block1[ 2] = append4_t[1];
block1[ 3] = append4_t[2];
block1[ 4] = append4_t[3];
break;
case 2: block0[ 2] |= append0_t[0];
block0[ 3] = append0_t[1];
block0[ 4] = append0_t[2];
block0[ 5] = append0_t[3];
block0[ 6] = append1_t[0];
block0[ 7] = append1_t[1];
block0[ 8] = append1_t[2];
block0[ 9] = append1_t[3];
block0[10] = append2_t[0];
block0[11] = append2_t[1];
block0[12] = append2_t[2];
block0[13] = append2_t[3];
block0[14] = append3_t[0];
block0[15] = append3_t[1];
block1[ 0] = append3_t[2];
block1[ 1] = append3_t[3];
block1[ 2] = append4_t[0];
block1[ 3] = append4_t[1];
block1[ 4] = append4_t[2];
block1[ 5] = append4_t[3];
break;
case 3: block0[ 3] |= append0_t[0];
block0[ 4] = append0_t[1];
block0[ 5] = append0_t[2];
block0[ 6] = append0_t[3];
block0[ 7] = append1_t[0];
block0[ 8] = append1_t[1];
block0[ 9] = append1_t[2];
block0[10] = append1_t[3];
block0[11] = append2_t[0];
block0[12] = append2_t[1];
block0[13] = append2_t[2];
block0[14] = append2_t[3];
block0[15] = append3_t[0];
block1[ 0] = append3_t[1];
block1[ 1] = append3_t[2];
block1[ 2] = append3_t[3];
block1[ 3] = append4_t[0];
block1[ 4] = append4_t[1];
block1[ 5] = append4_t[2];
block1[ 6] = append4_t[3];
break;
case 4: block0[ 4] |= append0_t[0];
block0[ 5] = append0_t[1];
block0[ 6] = append0_t[2];
block0[ 7] = append0_t[3];
block0[ 8] = append1_t[0];
block0[ 9] = append1_t[1];
block0[10] = append1_t[2];
block0[11] = append1_t[3];
block0[12] = append2_t[0];
block0[13] = append2_t[1];
block0[14] = append2_t[2];
block0[15] = append2_t[3];
block1[ 0] = append3_t[0];
block1[ 1] = append3_t[1];
block1[ 2] = append3_t[2];
block1[ 3] = append3_t[3];
block1[ 4] = append4_t[0];
block1[ 5] = append4_t[1];
block1[ 6] = append4_t[2];
block1[ 7] = append4_t[3];
break;
case 5: block0[ 5] |= append0_t[0];
block0[ 6] = append0_t[1];
block0[ 7] = append0_t[2];
block0[ 8] = append0_t[3];
block0[ 9] = append1_t[0];
block0[10] = append1_t[1];
block0[11] = append1_t[2];
block0[12] = append1_t[3];
block0[13] = append2_t[0];
block0[14] = append2_t[1];
block0[15] = append2_t[2];
block1[ 0] = append2_t[3];
block1[ 1] = append3_t[0];
block1[ 2] = append3_t[1];
block1[ 3] = append3_t[2];
block1[ 4] = append3_t[3];
block1[ 5] = append4_t[0];
block1[ 6] = append4_t[1];
block1[ 7] = append4_t[2];
block1[ 8] = append4_t[3];
break;
case 6: block0[ 6] |= append0_t[0];
block0[ 7] = append0_t[1];
block0[ 8] = append0_t[2];
block0[ 9] = append0_t[3];
block0[10] = append1_t[0];
block0[11] = append1_t[1];
block0[12] = append1_t[2];
block0[13] = append1_t[3];
block0[14] = append2_t[0];
block0[15] = append2_t[1];
block1[ 0] = append2_t[2];
block1[ 1] = append2_t[3];
block1[ 2] = append3_t[0];
block1[ 3] = append3_t[1];
block1[ 4] = append3_t[2];
block1[ 5] = append3_t[3];
block1[ 6] = append4_t[0];
block1[ 7] = append4_t[1];
block1[ 8] = append4_t[2];
block1[ 9] = append4_t[3];
break;
case 7: block0[ 7] |= append0_t[0];
block0[ 8] = append0_t[1];
block0[ 9] = append0_t[2];
block0[10] = append0_t[3];
block0[11] = append1_t[0];
block0[12] = append1_t[1];
block0[13] = append1_t[2];
block0[14] = append1_t[3];
block0[15] = append2_t[0];
block1[ 0] = append2_t[1];
block1[ 1] = append2_t[2];
block1[ 2] = append2_t[3];
block1[ 3] = append3_t[0];
block1[ 4] = append3_t[1];
block1[ 5] = append3_t[2];
block1[ 6] = append3_t[3];
block1[ 7] = append4_t[0];
block1[ 8] = append4_t[1];
block1[ 9] = append4_t[2];
block1[10] = append4_t[3];
break;
case 8: block0[ 8] |= append0_t[0];
block0[ 9] = append0_t[1];
block0[10] = append0_t[2];
block0[11] = append0_t[3];
block0[12] = append1_t[0];
block0[13] = append1_t[1];
block0[14] = append1_t[2];
block0[15] = append1_t[3];
block1[ 0] = append2_t[0];
block1[ 1] = append2_t[1];
block1[ 2] = append2_t[2];
block1[ 3] = append2_t[3];
block1[ 4] = append3_t[0];
block1[ 5] = append3_t[1];
block1[ 6] = append3_t[2];
block1[ 7] = append3_t[3];
block1[ 8] = append4_t[0];
block1[ 9] = append4_t[1];
block1[10] = append4_t[2];
block1[11] = append4_t[3];
break;
case 9: block0[ 9] |= append0_t[0];
block0[10] = append0_t[1];
block0[11] = append0_t[2];
block0[12] = append0_t[3];
block0[13] = append1_t[0];
block0[14] = append1_t[1];
block0[15] = append1_t[2];
block1[ 0] = append1_t[3];
block1[ 1] = append2_t[0];
block1[ 2] = append2_t[1];
block1[ 3] = append2_t[2];
block1[ 4] = append2_t[3];
block1[ 5] = append3_t[0];
block1[ 6] = append3_t[1];
block1[ 7] = append3_t[2];
block1[ 8] = append3_t[3];
block1[ 9] = append4_t[0];
block1[10] = append4_t[1];
block1[11] = append4_t[2];
block1[12] = append4_t[3];
break;
case 10: block0[10] |= append0_t[0];
block0[11] = append0_t[1];
block0[12] = append0_t[2];
block0[13] = append0_t[3];
block0[14] = append1_t[0];
block0[15] = append1_t[1];
block1[ 0] = append1_t[2];
block1[ 1] = append1_t[3];
block1[ 2] = append2_t[0];
block1[ 3] = append2_t[1];
block1[ 4] = append2_t[2];
block1[ 5] = append2_t[3];
block1[ 6] = append3_t[0];
block1[ 7] = append3_t[1];
block1[ 8] = append3_t[2];
block1[ 9] = append3_t[3];
block1[10] = append4_t[0];
block1[11] = append4_t[1];
block1[12] = append4_t[2];
block1[13] = append4_t[3];
break;
case 11: block0[11] |= append0_t[0];
block0[12] = append0_t[1];
block0[13] = append0_t[2];
block0[14] = append0_t[3];
block0[15] = append1_t[0];
block1[ 0] = append1_t[1];
block1[ 1] = append1_t[2];
block1[ 2] = append1_t[3];
block1[ 3] = append2_t[0];
block1[ 4] = append2_t[1];
block1[ 5] = append2_t[2];
block1[ 6] = append2_t[3];
block1[ 7] = append3_t[0];
block1[ 8] = append3_t[1];
block1[ 9] = append3_t[2];
block1[10] = append3_t[3];
block1[11] = append4_t[0];
block1[12] = append4_t[1];
block1[13] = append4_t[2];
block1[14] = append4_t[3];
break;
case 12: block0[12] |= append0_t[0];
block0[13] = append0_t[1];
block0[14] = append0_t[2];
block0[15] = append0_t[3];
block1[ 0] = append1_t[0];
block1[ 1] = append1_t[1];
block1[ 2] = append1_t[2];
block1[ 3] = append1_t[3];
block1[ 4] = append2_t[0];
block1[ 5] = append2_t[1];
block1[ 6] = append2_t[2];
block1[ 7] = append2_t[3];
block1[ 8] = append3_t[0];
block1[ 9] = append3_t[1];
block1[10] = append3_t[2];
block1[11] = append3_t[3];
block1[12] = append4_t[0];
block1[13] = append4_t[1];
block1[14] = append4_t[2];
block1[15] = append4_t[3];
break;
case 13: block0[13] |= append0_t[0];
block0[14] = append0_t[1];
block0[15] = append0_t[2];
block1[ 0] = append0_t[3];
block1[ 1] = append1_t[0];
block1[ 2] = append1_t[1];
block1[ 3] = append1_t[2];
block1[ 4] = append1_t[3];
block1[ 5] = append2_t[0];
block1[ 6] = append2_t[1];
block1[ 7] = append2_t[2];
block1[ 8] = append2_t[3];
block1[ 9] = append3_t[0];
block1[10] = append3_t[1];
block1[11] = append3_t[2];
block1[12] = append3_t[3];
block1[13] = append4_t[0];
block1[14] = append4_t[1];
block1[15] = append4_t[2];
break;
case 14: block0[14] |= append0_t[0];
block0[15] = append0_t[1];
block1[ 0] = append0_t[2];
block1[ 1] = append0_t[3];
block1[ 2] = append1_t[0];
block1[ 3] = append1_t[1];
block1[ 4] = append1_t[2];
block1[ 5] = append1_t[3];
block1[ 6] = append2_t[0];
block1[ 7] = append2_t[1];
block1[ 8] = append2_t[2];
block1[ 9] = append2_t[3];
block1[10] = append3_t[0];
block1[11] = append3_t[1];
block1[12] = append3_t[2];
block1[13] = append3_t[3];
block1[14] = append4_t[0];
block1[15] = append4_t[1];
break;
case 15: block0[15] |= append0_t[0];
block1[ 0] = append0_t[1];
block1[ 1] = append0_t[2];
block1[ 2] = append0_t[3];
block1[ 3] = append1_t[1];
block1[ 4] = append1_t[2];
block1[ 5] = append1_t[3];
block1[ 6] = append1_t[0];
block1[ 7] = append2_t[0];
block1[ 8] = append2_t[1];
block1[ 9] = append2_t[2];
block1[10] = append2_t[3];
block1[11] = append3_t[0];
block1[12] = append3_t[1];
block1[13] = append3_t[2];
block1[14] = append3_t[3];
block1[15] = append4_t[0];
break;
case 16: block1[ 0] |= append0_t[0];
block1[ 1] = append0_t[1];
block1[ 2] = append0_t[2];
block1[ 3] = append0_t[3];
block1[ 4] = append1_t[0];
block1[ 5] = append1_t[1];
block1[ 6] = append1_t[2];
block1[ 7] = append1_t[3];
block1[ 8] = append2_t[0];
block1[ 9] = append2_t[1];
block1[10] = append2_t[2];
block1[11] = append2_t[3];
block1[12] = append3_t[0];
block1[13] = append3_t[1];
block1[14] = append3_t[2];
block1[15] = append3_t[3];
break;
case 17: block1[ 1] |= append0_t[0];
block1[ 2] = append0_t[1];
block1[ 3] = append0_t[2];
block1[ 4] = append0_t[3];
block1[ 5] = append1_t[0];
block1[ 6] = append1_t[1];
block1[ 7] = append1_t[2];
block1[ 8] = append1_t[3];
block1[ 9] = append2_t[0];
block1[10] = append2_t[1];
block1[11] = append2_t[2];
block1[12] = append2_t[3];
block1[13] = append3_t[0];
block1[14] = append3_t[1];
block1[15] = append3_t[2];
break;
case 18: block1[ 2] |= append0_t[0];
block1[ 3] = append0_t[1];
block1[ 4] = append0_t[2];
block1[ 5] = append0_t[3];
block1[ 6] = append1_t[0];
block1[ 7] = append1_t[1];
block1[ 8] = append1_t[2];
block1[ 9] = append1_t[3];
block1[10] = append2_t[0];
block1[11] = append2_t[1];
block1[12] = append2_t[2];
block1[13] = append2_t[3];
block1[14] = append3_t[0];
block1[15] = append3_t[1];
break;
case 19: block1[ 3] |= append0_t[0];
block1[ 4] = append0_t[1];
block1[ 5] = append0_t[2];
block1[ 6] = append0_t[3];
block1[ 7] = append1_t[0];
block1[ 8] = append1_t[1];
block1[ 9] = append1_t[2];
block1[10] = append1_t[3];
block1[11] = append2_t[0];
block1[12] = append2_t[1];
block1[13] = append2_t[2];
block1[14] = append2_t[3];
block1[15] = append3_t[0];
break;
case 20: block1[ 4] |= append0_t[0];
block1[ 5] = append0_t[1];
block1[ 6] = append0_t[2];
block1[ 7] = append0_t[3];
block1[ 8] = append1_t[0];
block1[ 9] = append1_t[1];
block1[10] = append1_t[2];
block1[11] = append1_t[3];
block1[12] = append2_t[0];
block1[13] = append2_t[1];
block1[14] = append2_t[2];
block1[15] = append2_t[3];
break;
case 21: block1[ 5] |= append0_t[0];
block1[ 6] = append0_t[1];
block1[ 7] = append0_t[2];
block1[ 8] = append0_t[3];
block1[ 9] = append1_t[0];
block1[10] = append1_t[1];
block1[11] = append1_t[2];
block1[12] = append1_t[3];
block1[13] = append2_t[0];
block1[14] = append2_t[1];
block1[15] = append2_t[2];
break;
case 22: block1[ 6] |= append0_t[0];
block1[ 7] = append0_t[1];
block1[ 8] = append0_t[2];
block1[ 9] = append0_t[3];
block1[10] = append1_t[0];
block1[11] = append1_t[1];
block1[12] = append1_t[2];
block1[13] = append1_t[3];
block1[14] = append2_t[0];
block1[15] = append2_t[1];
break;
case 23: block1[ 7] |= append0_t[0];
block1[ 8] = append0_t[1];
block1[ 9] = append0_t[2];
block1[10] = append0_t[3];
block1[11] = append1_t[0];
block1[12] = append1_t[1];
block1[13] = append1_t[2];
block1[14] = append1_t[3];
block1[15] = append2_t[0];
break;
case 24: block1[ 8] |= append0_t[0];
block1[ 9] = append0_t[1];
block1[10] = append0_t[2];
block1[11] = append0_t[3];
block1[12] = append1_t[0];
block1[13] = append1_t[1];
block1[14] = append1_t[2];
block1[15] = append1_t[3];
break;
case 25: block1[ 9] |= append0_t[0];
block1[10] = append0_t[1];
block1[11] = append0_t[2];
block1[12] = append0_t[3];
block1[13] = append1_t[0];
block1[14] = append1_t[1];
block1[15] = append1_t[2];
break;
case 26: block1[10] |= append0_t[0];
block1[11] = append0_t[1];
block1[12] = append0_t[2];
block1[13] = append0_t[3];
block1[14] = append1_t[0];
block1[15] = append1_t[1];
break;
case 27: block1[11] |= append0_t[0];
block1[12] = append0_t[1];
block1[13] = append0_t[2];
block1[14] = append0_t[3];
block1[15] = append1_t[0];
break;
case 28: block1[12] |= append0_t[0];
block1[13] = append0_t[1];
block1[14] = append0_t[2];
block1[15] = append0_t[3];
break;
case 29: block1[13] |= append0_t[0];
block1[14] = append0_t[1];
block1[15] = append0_t[2];
break;
case 30: block1[14] |= append0_t[0];
block1[15] = append0_t[1];
break;
}
u32 new_len = block_len + append_len;
return new_len;
}
- Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance - Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility - Added -cl-std=CL1.1 to all kernel build options - Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache - Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 21:15:26 +00:00
void m11400m_0_0 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 pw_len, __global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, __local u32 *l_bin2asc)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
* modifier
*/
const u32 gid = get_global_id (0);
const u32 lid = get_local_id (0);
/**
* salt
*/
const u32 salt_len = esalt_bufs[salt_pos].salt_len; // not a bug, we need to get it from the esalt
const u32 pw_salt_len = salt_len + pw_len;
u32 salt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 salt_buf1[16];
Initial commit
2015-12-04 14:47:52 +00:00
salt_buf0[ 0] = esalt_bufs[salt_pos].salt_buf[ 0];
salt_buf0[ 1] = esalt_bufs[salt_pos].salt_buf[ 1];
salt_buf0[ 2] = esalt_bufs[salt_pos].salt_buf[ 2];
salt_buf0[ 3] = esalt_bufs[salt_pos].salt_buf[ 3];
salt_buf0[ 4] = esalt_bufs[salt_pos].salt_buf[ 4];
salt_buf0[ 5] = esalt_bufs[salt_pos].salt_buf[ 5];
salt_buf0[ 6] = esalt_bufs[salt_pos].salt_buf[ 6];
salt_buf0[ 7] = esalt_bufs[salt_pos].salt_buf[ 7];
salt_buf0[ 8] = esalt_bufs[salt_pos].salt_buf[ 8];
salt_buf0[ 9] = esalt_bufs[salt_pos].salt_buf[ 9];
salt_buf0[10] = esalt_bufs[salt_pos].salt_buf[10];
salt_buf0[11] = esalt_bufs[salt_pos].salt_buf[11];
salt_buf0[12] = esalt_bufs[salt_pos].salt_buf[12];
salt_buf0[13] = esalt_bufs[salt_pos].salt_buf[13];
salt_buf0[14] = esalt_bufs[salt_pos].salt_buf[14];
salt_buf0[15] = esalt_bufs[salt_pos].salt_buf[15];
salt_buf1[ 0] = esalt_bufs[salt_pos].salt_buf[16];
salt_buf1[ 1] = esalt_bufs[salt_pos].salt_buf[17];
salt_buf1[ 2] = esalt_bufs[salt_pos].salt_buf[18];
salt_buf1[ 3] = esalt_bufs[salt_pos].salt_buf[19];
salt_buf1[ 4] = esalt_bufs[salt_pos].salt_buf[20];
salt_buf1[ 5] = esalt_bufs[salt_pos].salt_buf[21];
salt_buf1[ 6] = esalt_bufs[salt_pos].salt_buf[22];
salt_buf1[ 7] = esalt_bufs[salt_pos].salt_buf[23];
salt_buf1[ 8] = esalt_bufs[salt_pos].salt_buf[24];
salt_buf1[ 9] = esalt_bufs[salt_pos].salt_buf[25];
salt_buf1[10] = esalt_bufs[salt_pos].salt_buf[26];
salt_buf1[11] = esalt_bufs[salt_pos].salt_buf[27];
salt_buf1[12] = esalt_bufs[salt_pos].salt_buf[28];
salt_buf1[13] = esalt_bufs[salt_pos].salt_buf[29];
salt_buf1[14] = 0;
salt_buf1[15] = 0;
/**
* esalt
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
u32 esalt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 esalt_buf1[16];
Initial commit
2015-12-04 14:47:52 +00:00
esalt_buf0[ 0] = esalt_bufs[salt_pos].esalt_buf[ 0];
esalt_buf0[ 1] = esalt_bufs[salt_pos].esalt_buf[ 1];
esalt_buf0[ 2] = esalt_bufs[salt_pos].esalt_buf[ 2];
esalt_buf0[ 3] = esalt_bufs[salt_pos].esalt_buf[ 3];
esalt_buf0[ 4] = esalt_bufs[salt_pos].esalt_buf[ 4];
esalt_buf0[ 5] = esalt_bufs[salt_pos].esalt_buf[ 5];
esalt_buf0[ 6] = esalt_bufs[salt_pos].esalt_buf[ 6];
esalt_buf0[ 7] = esalt_bufs[salt_pos].esalt_buf[ 7];
esalt_buf0[ 8] = esalt_bufs[salt_pos].esalt_buf[ 8];
esalt_buf0[ 9] = esalt_bufs[salt_pos].esalt_buf[ 9];
esalt_buf0[10] = esalt_bufs[salt_pos].esalt_buf[10];
esalt_buf0[11] = esalt_bufs[salt_pos].esalt_buf[11];
esalt_buf0[12] = esalt_bufs[salt_pos].esalt_buf[12];
esalt_buf0[13] = esalt_bufs[salt_pos].esalt_buf[13];
esalt_buf0[14] = esalt_bufs[salt_pos].esalt_buf[14];
esalt_buf0[15] = esalt_bufs[salt_pos].esalt_buf[15];
esalt_buf1[ 0] = esalt_bufs[salt_pos].esalt_buf[16];
esalt_buf1[ 1] = esalt_bufs[salt_pos].esalt_buf[17];
esalt_buf1[ 2] = esalt_bufs[salt_pos].esalt_buf[18];
esalt_buf1[ 3] = esalt_bufs[salt_pos].esalt_buf[19];
esalt_buf1[ 4] = esalt_bufs[salt_pos].esalt_buf[20];
esalt_buf1[ 5] = esalt_bufs[salt_pos].esalt_buf[21];
esalt_buf1[ 6] = esalt_bufs[salt_pos].esalt_buf[22];
esalt_buf1[ 7] = esalt_bufs[salt_pos].esalt_buf[23];
esalt_buf1[ 8] = esalt_bufs[salt_pos].esalt_buf[24];
esalt_buf1[ 9] = esalt_bufs[salt_pos].esalt_buf[25];
esalt_buf1[10] = esalt_bufs[salt_pos].esalt_buf[26];
esalt_buf1[11] = esalt_bufs[salt_pos].esalt_buf[27];
esalt_buf1[12] = esalt_bufs[salt_pos].esalt_buf[28];
esalt_buf1[13] = esalt_bufs[salt_pos].esalt_buf[29];
esalt_buf1[14] = esalt_bufs[salt_pos].esalt_buf[30];
esalt_buf1[15] = esalt_bufs[salt_pos].esalt_buf[31];
const u32 digest_esalt_len = 32 + esalt_len;
/**
* loop
*/
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0l = w0[0];
Initial commit
2015-12-04 14:47:52 +00:00
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
for (u32 il_pos = 0; il_pos < il_cnt; il_pos += VECT_SIZE)
Initial commit
2015-12-04 14:47:52 +00:00
{
Prepare NEW_SIMD_MODE for -a 1 kernels
2016-02-20 15:13:06 +00:00
const u32x w0r = ix_create_bft (bfs_buf, il_pos);
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
const u32x w0lr = w0l | w0r;
Initial commit
2015-12-04 14:47:52 +00:00
/*
* HA1 = md5 ($salt . $pass)
*/
// append the pass to the salt
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x block0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32x block1[16];
Initial commit
2015-12-04 14:47:52 +00:00
block0[ 0] = salt_buf0[ 0];
block0[ 1] = salt_buf0[ 1];
block0[ 2] = salt_buf0[ 2];
block0[ 3] = salt_buf0[ 3];
block0[ 4] = salt_buf0[ 4];
block0[ 5] = salt_buf0[ 5];
block0[ 6] = salt_buf0[ 6];
block0[ 7] = salt_buf0[ 7];
block0[ 8] = salt_buf0[ 8];
block0[ 9] = salt_buf0[ 9];
block0[10] = salt_buf0[10];
block0[11] = salt_buf0[11];
block0[12] = salt_buf0[12];
block0[13] = salt_buf0[13];
block0[14] = salt_buf0[14];
block0[15] = salt_buf0[15];
block1[ 0] = salt_buf1[ 0];
block1[ 1] = salt_buf1[ 1];
block1[ 2] = salt_buf1[ 2];
block1[ 3] = salt_buf1[ 3];
block1[ 4] = salt_buf1[ 4];
block1[ 5] = salt_buf1[ 5];
block1[ 6] = salt_buf1[ 6];
block1[ 7] = salt_buf1[ 7];
block1[ 8] = salt_buf1[ 8];
block1[ 9] = salt_buf1[ 9];
block1[10] = salt_buf1[10];
block1[11] = salt_buf1[11];
block1[12] = salt_buf1[12];
block1[13] = salt_buf1[13];
block1[14] = salt_buf1[14];
block1[15] = salt_buf1[15];
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x w0_t[4];
u32x w1_t[4];
u32x w2_t[4];
u32x w3_t[4];
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
w0_t[0] = w0lr;
w0_t[1] = w0[1];
w0_t[2] = w0[2];
w0_t[3] = w0[3];
w1_t[0] = w1[0];
w1_t[1] = w1[1];
w1_t[2] = w1[2];
w1_t[3] = w1[3];
w2_t[0] = w2[0];
w2_t[1] = w2[1];
w2_t[2] = w2[2];
w2_t[3] = w2[3];
w3_t[0] = w3[0];
w3_t[1] = w3[1];
w3_t[2] = w3[2];
w3_t[3] = w3[3];
memcat32 (block0, block1, salt_len, w0_t, w1_t, w2_t, w3_t, pw_len);
Initial commit
2015-12-04 14:47:52 +00:00
w0_t[0] = block0[ 0];
w0_t[1] = block0[ 1];
w0_t[2] = block0[ 2];
w0_t[3] = block0[ 3];
w1_t[0] = block0[ 4];
w1_t[1] = block0[ 5];
w1_t[2] = block0[ 6];
w1_t[3] = block0[ 7];
w2_t[0] = block0[ 8];
w2_t[1] = block0[ 9];
w2_t[2] = block0[10];
w2_t[3] = block0[11];
w3_t[0] = block0[12];
w3_t[1] = block0[13];
w3_t[2] = pw_salt_len * 8;
w3_t[3] = 0;
// md5
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x a = MD5M_A;
u32x b = MD5M_B;
u32x c = MD5M_C;
u32x d = MD5M_D;
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
/*
* final = md5 ($HA1 . $esalt)
* we have at least 2 MD5 blocks/transformations, but we might need 3
*/
w0_t[0] = uint_to_hex_lower8 ((a >> 0) & 255) << 0
| uint_to_hex_lower8 ((a >> 8) & 255) << 16;
w0_t[1] = uint_to_hex_lower8 ((a >> 16) & 255) << 0
| uint_to_hex_lower8 ((a >> 24) & 255) << 16;
w0_t[2] = uint_to_hex_lower8 ((b >> 0) & 255) << 0
| uint_to_hex_lower8 ((b >> 8) & 255) << 16;
w0_t[3] = uint_to_hex_lower8 ((b >> 16) & 255) << 0
| uint_to_hex_lower8 ((b >> 24) & 255) << 16;
w1_t[0] = uint_to_hex_lower8 ((c >> 0) & 255) << 0
| uint_to_hex_lower8 ((c >> 8) & 255) << 16;
w1_t[1] = uint_to_hex_lower8 ((c >> 16) & 255) << 0
| uint_to_hex_lower8 ((c >> 24) & 255) << 16;
w1_t[2] = uint_to_hex_lower8 ((d >> 0) & 255) << 0
| uint_to_hex_lower8 ((d >> 8) & 255) << 16;
w1_t[3] = uint_to_hex_lower8 ((d >> 16) & 255) << 0
| uint_to_hex_lower8 ((d >> 24) & 255) << 16;
w2_t[0] = esalt_buf0[0];
w2_t[1] = esalt_buf0[1];
w2_t[2] = esalt_buf0[2];
w2_t[3] = esalt_buf0[3];
w3_t[0] = esalt_buf0[4];
w3_t[1] = esalt_buf0[5];
w3_t[2] = esalt_buf0[6];
w3_t[3] = esalt_buf0[7];
// md5
// 1st transform
a = MD5M_A;
b = MD5M_B;
c = MD5M_C;
d = MD5M_D;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x r_a = a;
u32x r_b = b;
u32x r_c = c;
u32x r_d = d;
Initial commit
2015-12-04 14:47:52 +00:00
// 2nd transform
w0_t[0] = esalt_buf0[ 8];
w0_t[1] = esalt_buf0[ 9];
w0_t[2] = esalt_buf0[10];
w0_t[3] = esalt_buf0[11];
w1_t[0] = esalt_buf0[12];
w1_t[1] = esalt_buf0[13];
w1_t[2] = esalt_buf0[14];
w1_t[3] = esalt_buf0[15];
w2_t[0] = esalt_buf1[ 0];
w2_t[1] = esalt_buf1[ 1];
w2_t[2] = esalt_buf1[ 2];
w2_t[3] = esalt_buf1[ 3];
w3_t[0] = esalt_buf1[ 4];
w3_t[1] = esalt_buf1[ 5];
w3_t[2] = digest_esalt_len * 8;
w3_t[3] = 0;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += r_a;
b += r_b;
c += r_c;
d += r_d;
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
COMPARE_M_SIMD (a, d, c, b);
Initial commit
2015-12-04 14:47:52 +00:00
}
}
- Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance - Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility - Added -cl-std=CL1.1 to all kernel build options - Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache - Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 21:15:26 +00:00
void m11400m_0_1 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 pw_len, __global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, __local u32 *l_bin2asc)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
* modifier
*/
const u32 gid = get_global_id (0);
const u32 lid = get_local_id (0);
/**
* salt
*/
const u32 salt_len = esalt_bufs[salt_pos].salt_len; // not a bug, we need to get it from the esalt
const u32 pw_salt_len = salt_len + pw_len;
u32 salt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 salt_buf1[16];
Initial commit
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salt_buf0[ 0] = esalt_bufs[salt_pos].salt_buf[ 0];
salt_buf0[ 1] = esalt_bufs[salt_pos].salt_buf[ 1];
salt_buf0[ 2] = esalt_bufs[salt_pos].salt_buf[ 2];
salt_buf0[ 3] = esalt_bufs[salt_pos].salt_buf[ 3];
salt_buf0[ 4] = esalt_bufs[salt_pos].salt_buf[ 4];
salt_buf0[ 5] = esalt_bufs[salt_pos].salt_buf[ 5];
salt_buf0[ 6] = esalt_bufs[salt_pos].salt_buf[ 6];
salt_buf0[ 7] = esalt_bufs[salt_pos].salt_buf[ 7];
salt_buf0[ 8] = esalt_bufs[salt_pos].salt_buf[ 8];
salt_buf0[ 9] = esalt_bufs[salt_pos].salt_buf[ 9];
salt_buf0[10] = esalt_bufs[salt_pos].salt_buf[10];
salt_buf0[11] = esalt_bufs[salt_pos].salt_buf[11];
salt_buf0[12] = esalt_bufs[salt_pos].salt_buf[12];
salt_buf0[13] = esalt_bufs[salt_pos].salt_buf[13];
salt_buf0[14] = esalt_bufs[salt_pos].salt_buf[14];
salt_buf0[15] = esalt_bufs[salt_pos].salt_buf[15];
salt_buf1[ 0] = esalt_bufs[salt_pos].salt_buf[16];
salt_buf1[ 1] = esalt_bufs[salt_pos].salt_buf[17];
salt_buf1[ 2] = esalt_bufs[salt_pos].salt_buf[18];
salt_buf1[ 3] = esalt_bufs[salt_pos].salt_buf[19];
salt_buf1[ 4] = esalt_bufs[salt_pos].salt_buf[20];
salt_buf1[ 5] = esalt_bufs[salt_pos].salt_buf[21];
salt_buf1[ 6] = esalt_bufs[salt_pos].salt_buf[22];
salt_buf1[ 7] = esalt_bufs[salt_pos].salt_buf[23];
salt_buf1[ 8] = esalt_bufs[salt_pos].salt_buf[24];
salt_buf1[ 9] = esalt_bufs[salt_pos].salt_buf[25];
salt_buf1[10] = esalt_bufs[salt_pos].salt_buf[26];
salt_buf1[11] = esalt_bufs[salt_pos].salt_buf[27];
salt_buf1[12] = esalt_bufs[salt_pos].salt_buf[28];
salt_buf1[13] = esalt_bufs[salt_pos].salt_buf[29];
salt_buf1[14] = 0;
salt_buf1[15] = 0;
/**
* esalt
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
u32 esalt_buf0[16];
Cleanup -m 114xx kernels to latest standard
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u32 esalt_buf1[16];
u32 esalt_buf2[16];
Initial commit
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esalt_buf0[ 0] = esalt_bufs[salt_pos].esalt_buf[ 0];
esalt_buf0[ 1] = esalt_bufs[salt_pos].esalt_buf[ 1];
esalt_buf0[ 2] = esalt_bufs[salt_pos].esalt_buf[ 2];
esalt_buf0[ 3] = esalt_bufs[salt_pos].esalt_buf[ 3];
esalt_buf0[ 4] = esalt_bufs[salt_pos].esalt_buf[ 4];
esalt_buf0[ 5] = esalt_bufs[salt_pos].esalt_buf[ 5];
esalt_buf0[ 6] = esalt_bufs[salt_pos].esalt_buf[ 6];
esalt_buf0[ 7] = esalt_bufs[salt_pos].esalt_buf[ 7];
esalt_buf0[ 8] = esalt_bufs[salt_pos].esalt_buf[ 8];
esalt_buf0[ 9] = esalt_bufs[salt_pos].esalt_buf[ 9];
esalt_buf0[10] = esalt_bufs[salt_pos].esalt_buf[10];
esalt_buf0[11] = esalt_bufs[salt_pos].esalt_buf[11];
esalt_buf0[12] = esalt_bufs[salt_pos].esalt_buf[12];
esalt_buf0[13] = esalt_bufs[salt_pos].esalt_buf[13];
esalt_buf0[14] = esalt_bufs[salt_pos].esalt_buf[14];
esalt_buf0[15] = esalt_bufs[salt_pos].esalt_buf[15];
esalt_buf1[ 0] = esalt_bufs[salt_pos].esalt_buf[16];
esalt_buf1[ 1] = esalt_bufs[salt_pos].esalt_buf[17];
esalt_buf1[ 2] = esalt_bufs[salt_pos].esalt_buf[18];
esalt_buf1[ 3] = esalt_bufs[salt_pos].esalt_buf[19];
esalt_buf1[ 4] = esalt_bufs[salt_pos].esalt_buf[20];
esalt_buf1[ 5] = esalt_bufs[salt_pos].esalt_buf[21];
esalt_buf1[ 6] = esalt_bufs[salt_pos].esalt_buf[22];
esalt_buf1[ 7] = esalt_bufs[salt_pos].esalt_buf[23];
esalt_buf1[ 8] = esalt_bufs[salt_pos].esalt_buf[24];
esalt_buf1[ 9] = esalt_bufs[salt_pos].esalt_buf[25];
esalt_buf1[10] = esalt_bufs[salt_pos].esalt_buf[26];
esalt_buf1[11] = esalt_bufs[salt_pos].esalt_buf[27];
esalt_buf1[12] = esalt_bufs[salt_pos].esalt_buf[28];
esalt_buf1[13] = esalt_bufs[salt_pos].esalt_buf[29];
esalt_buf1[14] = esalt_bufs[salt_pos].esalt_buf[30];
esalt_buf1[15] = esalt_bufs[salt_pos].esalt_buf[31];
esalt_buf2[ 0] = esalt_bufs[salt_pos].esalt_buf[32];
esalt_buf2[ 1] = esalt_bufs[salt_pos].esalt_buf[33];
esalt_buf2[ 2] = esalt_bufs[salt_pos].esalt_buf[34];
esalt_buf2[ 3] = esalt_bufs[salt_pos].esalt_buf[35];
esalt_buf2[ 4] = esalt_bufs[salt_pos].esalt_buf[36];
esalt_buf2[ 5] = esalt_bufs[salt_pos].esalt_buf[37];
esalt_buf2[ 6] = 0;
esalt_buf2[ 7] = 0;
esalt_buf2[ 8] = 0;
esalt_buf2[ 9] = 0;
esalt_buf2[10] = 0;
esalt_buf2[11] = 0;
esalt_buf2[12] = 0;
esalt_buf2[13] = 0;
esalt_buf2[14] = 0;
esalt_buf2[15] = 0;
const u32 digest_esalt_len = 32 + esalt_len;
/**
* loop
*/
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0l = w0[0];
Initial commit
2015-12-04 14:47:52 +00:00
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
for (u32 il_pos = 0; il_pos < il_cnt; il_pos += VECT_SIZE)
Initial commit
2015-12-04 14:47:52 +00:00
{
Prepare NEW_SIMD_MODE for -a 1 kernels
2016-02-20 15:13:06 +00:00
const u32x w0r = ix_create_bft (bfs_buf, il_pos);
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
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const u32x w0lr = w0l | w0r;
Initial commit
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/*
* HA1 = md5 ($salt . $pass)
*/
// append the pass to the salt
Converted _a3 kernels, use SIMD for CPU and GPU
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u32x block0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32x block1[16];
Initial commit
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block0[ 0] = salt_buf0[ 0];
block0[ 1] = salt_buf0[ 1];
block0[ 2] = salt_buf0[ 2];
block0[ 3] = salt_buf0[ 3];
block0[ 4] = salt_buf0[ 4];
block0[ 5] = salt_buf0[ 5];
block0[ 6] = salt_buf0[ 6];
block0[ 7] = salt_buf0[ 7];
block0[ 8] = salt_buf0[ 8];
block0[ 9] = salt_buf0[ 9];
block0[10] = salt_buf0[10];
block0[11] = salt_buf0[11];
block0[12] = salt_buf0[12];
block0[13] = salt_buf0[13];
block0[14] = salt_buf0[14];
block0[15] = salt_buf0[15];
block1[ 0] = salt_buf1[ 0];
block1[ 1] = salt_buf1[ 1];
block1[ 2] = salt_buf1[ 2];
block1[ 3] = salt_buf1[ 3];
block1[ 4] = salt_buf1[ 4];
block1[ 5] = salt_buf1[ 5];
block1[ 6] = salt_buf1[ 6];
block1[ 7] = salt_buf1[ 7];
block1[ 8] = salt_buf1[ 8];
block1[ 9] = salt_buf1[ 9];
block1[10] = salt_buf1[10];
block1[11] = salt_buf1[11];
block1[12] = salt_buf1[12];
block1[13] = salt_buf1[13];
block1[14] = salt_buf1[14];
block1[15] = salt_buf1[15];
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x w0_t[4];
u32x w1_t[4];
u32x w2_t[4];
u32x w3_t[4];
w0_t[0] = w0lr;
w0_t[1] = w0[1];
w0_t[2] = w0[2];
w0_t[3] = w0[3];
w1_t[0] = w1[0];
w1_t[1] = w1[1];
w1_t[2] = w1[2];
w1_t[3] = w1[3];
w2_t[0] = w2[0];
w2_t[1] = w2[1];
w2_t[2] = w2[2];
w2_t[3] = w2[3];
w3_t[0] = w3[0];
w3_t[1] = w3[1];
w3_t[2] = w3[2];
w3_t[3] = w3[3];
memcat32 (block0, block1, salt_len, w0_t, w1_t, w2_t, w3_t, pw_len);
Initial commit
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w0_t[0] = block0[ 0];
w0_t[1] = block0[ 1];
w0_t[2] = block0[ 2];
w0_t[3] = block0[ 3];
w1_t[0] = block0[ 4];
w1_t[1] = block0[ 5];
w1_t[2] = block0[ 6];
w1_t[3] = block0[ 7];
w2_t[0] = block0[ 8];
w2_t[1] = block0[ 9];
w2_t[2] = block0[10];
w2_t[3] = block0[11];
w3_t[0] = block0[12];
w3_t[1] = block0[13];
w3_t[2] = pw_salt_len * 8;
w3_t[3] = 0;
// md5
Converted _a3 kernels, use SIMD for CPU and GPU
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u32x a = MD5M_A;
u32x b = MD5M_B;
u32x c = MD5M_C;
u32x d = MD5M_D;
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
/*
* final = md5 ($HA1 . $esalt)
* we have at least 2 MD5 blocks/transformations, but we might need 3
*/
w0_t[0] = uint_to_hex_lower8 ((a >> 0) & 255) << 0
| uint_to_hex_lower8 ((a >> 8) & 255) << 16;
w0_t[1] = uint_to_hex_lower8 ((a >> 16) & 255) << 0
| uint_to_hex_lower8 ((a >> 24) & 255) << 16;
w0_t[2] = uint_to_hex_lower8 ((b >> 0) & 255) << 0
| uint_to_hex_lower8 ((b >> 8) & 255) << 16;
w0_t[3] = uint_to_hex_lower8 ((b >> 16) & 255) << 0
| uint_to_hex_lower8 ((b >> 24) & 255) << 16;
w1_t[0] = uint_to_hex_lower8 ((c >> 0) & 255) << 0
| uint_to_hex_lower8 ((c >> 8) & 255) << 16;
w1_t[1] = uint_to_hex_lower8 ((c >> 16) & 255) << 0
| uint_to_hex_lower8 ((c >> 24) & 255) << 16;
w1_t[2] = uint_to_hex_lower8 ((d >> 0) & 255) << 0
| uint_to_hex_lower8 ((d >> 8) & 255) << 16;
w1_t[3] = uint_to_hex_lower8 ((d >> 16) & 255) << 0
| uint_to_hex_lower8 ((d >> 24) & 255) << 16;
w2_t[0] = esalt_buf0[0];
w2_t[1] = esalt_buf0[1];
w2_t[2] = esalt_buf0[2];
w2_t[3] = esalt_buf0[3];
w3_t[0] = esalt_buf0[4];
w3_t[1] = esalt_buf0[5];
w3_t[2] = esalt_buf0[6];
w3_t[3] = esalt_buf0[7];
// md5
// 1st transform
a = MD5M_A;
b = MD5M_B;
c = MD5M_C;
d = MD5M_D;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x r_a = a;
u32x r_b = b;
u32x r_c = c;
u32x r_d = d;
Initial commit
2015-12-04 14:47:52 +00:00
// 2nd transform
w0_t[0] = esalt_buf0[ 8];
w0_t[1] = esalt_buf0[ 9];
w0_t[2] = esalt_buf0[10];
w0_t[3] = esalt_buf0[11];
w1_t[0] = esalt_buf0[12];
w1_t[1] = esalt_buf0[13];
w1_t[2] = esalt_buf0[14];
w1_t[3] = esalt_buf0[15];
w2_t[0] = esalt_buf1[ 0];
w2_t[1] = esalt_buf1[ 1];
w2_t[2] = esalt_buf1[ 2];
w2_t[3] = esalt_buf1[ 3];
w3_t[0] = esalt_buf1[ 4];
w3_t[1] = esalt_buf1[ 5];
w3_t[2] = esalt_buf1[ 6];
w3_t[3] = esalt_buf1[ 7];
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
// this is for sure the final block
a += r_a;
b += r_b;
c += r_c;
d += r_d;
r_a = a;
r_b = b;
r_c = c;
r_d = d;
w0_t[0] = esalt_buf1[ 8];
w0_t[1] = esalt_buf1[ 9];
w0_t[2] = esalt_buf1[10];
w0_t[3] = esalt_buf1[11];
w1_t[0] = esalt_buf1[12];
w1_t[1] = esalt_buf1[13];
w1_t[2] = esalt_buf1[14];
w1_t[3] = esalt_buf1[15];
w2_t[0] = esalt_buf2[ 0];
w2_t[1] = esalt_buf2[ 1];
w2_t[2] = esalt_buf2[ 2];
w2_t[3] = esalt_buf2[ 3];
w3_t[0] = esalt_buf2[ 4];
w3_t[1] = esalt_buf2[ 5];
w3_t[2] = digest_esalt_len * 8;
w3_t[3] = 0;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += r_a;
b += r_b;
c += r_c;
d += r_d;
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
COMPARE_M_SIMD (a, d, c, b);
Initial commit
2015-12-04 14:47:52 +00:00
}
}
- Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance - Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility - Added -cl-std=CL1.1 to all kernel build options - Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache - Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 21:15:26 +00:00
void m11400m_1_0 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 pw_len, __global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, __local u32 *l_bin2asc)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
* modifier
*/
const u32 gid = get_global_id (0);
const u32 lid = get_local_id (0);
/**
* salt
*/
const u32 salt_len = esalt_bufs[salt_pos].salt_len; // not a bug, we need to get it from the esalt
const u32 pw_salt_len = salt_len + pw_len;
u32 salt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 salt_buf1[16];
Initial commit
2015-12-04 14:47:52 +00:00
salt_buf0[ 0] = esalt_bufs[salt_pos].salt_buf[ 0];
salt_buf0[ 1] = esalt_bufs[salt_pos].salt_buf[ 1];
salt_buf0[ 2] = esalt_bufs[salt_pos].salt_buf[ 2];
salt_buf0[ 3] = esalt_bufs[salt_pos].salt_buf[ 3];
salt_buf0[ 4] = esalt_bufs[salt_pos].salt_buf[ 4];
salt_buf0[ 5] = esalt_bufs[salt_pos].salt_buf[ 5];
salt_buf0[ 6] = esalt_bufs[salt_pos].salt_buf[ 6];
salt_buf0[ 7] = esalt_bufs[salt_pos].salt_buf[ 7];
salt_buf0[ 8] = esalt_bufs[salt_pos].salt_buf[ 8];
salt_buf0[ 9] = esalt_bufs[salt_pos].salt_buf[ 9];
salt_buf0[10] = esalt_bufs[salt_pos].salt_buf[10];
salt_buf0[11] = esalt_bufs[salt_pos].salt_buf[11];
salt_buf0[12] = esalt_bufs[salt_pos].salt_buf[12];
salt_buf0[13] = esalt_bufs[salt_pos].salt_buf[13];
salt_buf0[14] = esalt_bufs[salt_pos].salt_buf[14];
salt_buf0[15] = esalt_bufs[salt_pos].salt_buf[15];
salt_buf1[ 0] = esalt_bufs[salt_pos].salt_buf[16];
salt_buf1[ 1] = esalt_bufs[salt_pos].salt_buf[17];
salt_buf1[ 2] = esalt_bufs[salt_pos].salt_buf[18];
salt_buf1[ 3] = esalt_bufs[salt_pos].salt_buf[19];
salt_buf1[ 4] = esalt_bufs[salt_pos].salt_buf[20];
salt_buf1[ 5] = esalt_bufs[salt_pos].salt_buf[21];
salt_buf1[ 6] = esalt_bufs[salt_pos].salt_buf[22];
salt_buf1[ 7] = esalt_bufs[salt_pos].salt_buf[23];
salt_buf1[ 8] = esalt_bufs[salt_pos].salt_buf[24];
salt_buf1[ 9] = esalt_bufs[salt_pos].salt_buf[25];
salt_buf1[10] = esalt_bufs[salt_pos].salt_buf[26];
salt_buf1[11] = esalt_bufs[salt_pos].salt_buf[27];
salt_buf1[12] = esalt_bufs[salt_pos].salt_buf[28];
salt_buf1[13] = esalt_bufs[salt_pos].salt_buf[29];
salt_buf1[14] = 0;
salt_buf1[15] = 0;
/**
* esalt
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
u32 esalt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 esalt_buf1[16];
Initial commit
2015-12-04 14:47:52 +00:00
esalt_buf0[ 0] = esalt_bufs[salt_pos].esalt_buf[ 0];
esalt_buf0[ 1] = esalt_bufs[salt_pos].esalt_buf[ 1];
esalt_buf0[ 2] = esalt_bufs[salt_pos].esalt_buf[ 2];
esalt_buf0[ 3] = esalt_bufs[salt_pos].esalt_buf[ 3];
esalt_buf0[ 4] = esalt_bufs[salt_pos].esalt_buf[ 4];
esalt_buf0[ 5] = esalt_bufs[salt_pos].esalt_buf[ 5];
esalt_buf0[ 6] = esalt_bufs[salt_pos].esalt_buf[ 6];
esalt_buf0[ 7] = esalt_bufs[salt_pos].esalt_buf[ 7];
esalt_buf0[ 8] = esalt_bufs[salt_pos].esalt_buf[ 8];
esalt_buf0[ 9] = esalt_bufs[salt_pos].esalt_buf[ 9];
esalt_buf0[10] = esalt_bufs[salt_pos].esalt_buf[10];
esalt_buf0[11] = esalt_bufs[salt_pos].esalt_buf[11];
esalt_buf0[12] = esalt_bufs[salt_pos].esalt_buf[12];
esalt_buf0[13] = esalt_bufs[salt_pos].esalt_buf[13];
esalt_buf0[14] = esalt_bufs[salt_pos].esalt_buf[14];
esalt_buf0[15] = esalt_bufs[salt_pos].esalt_buf[15];
esalt_buf1[ 0] = esalt_bufs[salt_pos].esalt_buf[16];
esalt_buf1[ 1] = esalt_bufs[salt_pos].esalt_buf[17];
esalt_buf1[ 2] = esalt_bufs[salt_pos].esalt_buf[18];
esalt_buf1[ 3] = esalt_bufs[salt_pos].esalt_buf[19];
esalt_buf1[ 4] = esalt_bufs[salt_pos].esalt_buf[20];
esalt_buf1[ 5] = esalt_bufs[salt_pos].esalt_buf[21];
esalt_buf1[ 6] = esalt_bufs[salt_pos].esalt_buf[22];
esalt_buf1[ 7] = esalt_bufs[salt_pos].esalt_buf[23];
esalt_buf1[ 8] = esalt_bufs[salt_pos].esalt_buf[24];
esalt_buf1[ 9] = esalt_bufs[salt_pos].esalt_buf[25];
esalt_buf1[10] = esalt_bufs[salt_pos].esalt_buf[26];
esalt_buf1[11] = esalt_bufs[salt_pos].esalt_buf[27];
esalt_buf1[12] = esalt_bufs[salt_pos].esalt_buf[28];
esalt_buf1[13] = esalt_bufs[salt_pos].esalt_buf[29];
esalt_buf1[14] = esalt_bufs[salt_pos].esalt_buf[30];
esalt_buf1[15] = esalt_bufs[salt_pos].esalt_buf[31];
const u32 digest_esalt_len = 32 + esalt_len;
/**
* loop
*/
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0l = w0[0];
Initial commit
2015-12-04 14:47:52 +00:00
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
for (u32 il_pos = 0; il_pos < il_cnt; il_pos += VECT_SIZE)
Initial commit
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{
Prepare NEW_SIMD_MODE for -a 1 kernels
2016-02-20 15:13:06 +00:00
const u32x w0r = ix_create_bft (bfs_buf, il_pos);
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
const u32x w0lr = w0l | w0r;
Initial commit
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/*
* HA1 = md5 ($salt . $pass)
*/
// append the pass to the salt
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x block0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32x block1[16];
Initial commit
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block0[ 0] = salt_buf0[ 0];
block0[ 1] = salt_buf0[ 1];
block0[ 2] = salt_buf0[ 2];
block0[ 3] = salt_buf0[ 3];
block0[ 4] = salt_buf0[ 4];
block0[ 5] = salt_buf0[ 5];
block0[ 6] = salt_buf0[ 6];
block0[ 7] = salt_buf0[ 7];
block0[ 8] = salt_buf0[ 8];
block0[ 9] = salt_buf0[ 9];
block0[10] = salt_buf0[10];
block0[11] = salt_buf0[11];
block0[12] = salt_buf0[12];
block0[13] = salt_buf0[13];
block0[14] = salt_buf0[14];
block0[15] = salt_buf0[15];
block1[ 0] = salt_buf1[ 0];
block1[ 1] = salt_buf1[ 1];
block1[ 2] = salt_buf1[ 2];
block1[ 3] = salt_buf1[ 3];
block1[ 4] = salt_buf1[ 4];
block1[ 5] = salt_buf1[ 5];
block1[ 6] = salt_buf1[ 6];
block1[ 7] = salt_buf1[ 7];
block1[ 8] = salt_buf1[ 8];
block1[ 9] = salt_buf1[ 9];
block1[10] = salt_buf1[10];
block1[11] = salt_buf1[11];
block1[12] = salt_buf1[12];
block1[13] = salt_buf1[13];
block1[14] = salt_buf1[14];
block1[15] = salt_buf1[15];
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x w0_t[4];
u32x w1_t[4];
u32x w2_t[4];
u32x w3_t[4];
w0_t[0] = w0lr;
w0_t[1] = w0[1];
w0_t[2] = w0[2];
w0_t[3] = w0[3];
w1_t[0] = w1[0];
w1_t[1] = w1[1];
w1_t[2] = w1[2];
w1_t[3] = w1[3];
w2_t[0] = w2[0];
w2_t[1] = w2[1];
w2_t[2] = w2[2];
w2_t[3] = w2[3];
w3_t[0] = w3[0];
w3_t[1] = w3[1];
w3_t[2] = w3[2];
w3_t[3] = w3[3];
memcat32 (block0, block1, salt_len, w0_t, w1_t, w2_t, w3_t, pw_len);
Initial commit
2015-12-04 14:47:52 +00:00
w0_t[0] = block0[ 0];
w0_t[1] = block0[ 1];
w0_t[2] = block0[ 2];
w0_t[3] = block0[ 3];
w1_t[0] = block0[ 4];
w1_t[1] = block0[ 5];
w1_t[2] = block0[ 6];
w1_t[3] = block0[ 7];
w2_t[0] = block0[ 8];
w2_t[1] = block0[ 9];
w2_t[2] = block0[10];
w2_t[3] = block0[11];
w3_t[0] = block0[12];
w3_t[1] = block0[13];
w3_t[2] = block0[14];
w3_t[3] = block0[15];
// md5
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x a = MD5M_A;
u32x b = MD5M_B;
u32x c = MD5M_C;
u32x d = MD5M_D;
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x r_a = a;
u32x r_b = b;
u32x r_c = c;
u32x r_d = d;
Initial commit
2015-12-04 14:47:52 +00:00
w0_t[0] = block1[ 0];
w0_t[1] = block1[ 1];
w0_t[2] = block1[ 2];
w0_t[3] = block1[ 3];
w1_t[0] = block1[ 4];
w1_t[1] = block1[ 5];
w1_t[2] = block1[ 6];
w1_t[3] = block1[ 7];
w2_t[0] = block1[ 8];
w2_t[1] = block1[ 9];
w2_t[2] = block1[10];
w2_t[3] = block1[11];
w3_t[0] = block1[12];
w3_t[1] = block1[13];
w3_t[2] = pw_salt_len * 8;
w3_t[3] = 0;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += r_a;
b += r_b;
c += r_c;
d += r_d;
/*
* final = md5 ($HA1 . $esalt)
* we have at least 2 MD5 blocks/transformations, but we might need 3
*/
w0_t[0] = uint_to_hex_lower8 ((a >> 0) & 255) << 0
| uint_to_hex_lower8 ((a >> 8) & 255) << 16;
w0_t[1] = uint_to_hex_lower8 ((a >> 16) & 255) << 0
| uint_to_hex_lower8 ((a >> 24) & 255) << 16;
w0_t[2] = uint_to_hex_lower8 ((b >> 0) & 255) << 0
| uint_to_hex_lower8 ((b >> 8) & 255) << 16;
w0_t[3] = uint_to_hex_lower8 ((b >> 16) & 255) << 0
| uint_to_hex_lower8 ((b >> 24) & 255) << 16;
w1_t[0] = uint_to_hex_lower8 ((c >> 0) & 255) << 0
| uint_to_hex_lower8 ((c >> 8) & 255) << 16;
w1_t[1] = uint_to_hex_lower8 ((c >> 16) & 255) << 0
| uint_to_hex_lower8 ((c >> 24) & 255) << 16;
w1_t[2] = uint_to_hex_lower8 ((d >> 0) & 255) << 0
| uint_to_hex_lower8 ((d >> 8) & 255) << 16;
w1_t[3] = uint_to_hex_lower8 ((d >> 16) & 255) << 0
| uint_to_hex_lower8 ((d >> 24) & 255) << 16;
w2_t[0] = esalt_buf0[0];
w2_t[1] = esalt_buf0[1];
w2_t[2] = esalt_buf0[2];
w2_t[3] = esalt_buf0[3];
w3_t[0] = esalt_buf0[4];
w3_t[1] = esalt_buf0[5];
w3_t[2] = esalt_buf0[6];
w3_t[3] = esalt_buf0[7];
// md5
// 1st transform
a = MD5M_A;
b = MD5M_B;
c = MD5M_C;
d = MD5M_D;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
r_a = a;
r_b = b;
r_c = c;
r_d = d;
// 2nd transform
w0_t[0] = esalt_buf0[ 8];
w0_t[1] = esalt_buf0[ 9];
w0_t[2] = esalt_buf0[10];
w0_t[3] = esalt_buf0[11];
w1_t[0] = esalt_buf0[12];
w1_t[1] = esalt_buf0[13];
w1_t[2] = esalt_buf0[14];
w1_t[3] = esalt_buf0[15];
w2_t[0] = esalt_buf1[ 0];
w2_t[1] = esalt_buf1[ 1];
w2_t[2] = esalt_buf1[ 2];
w2_t[3] = esalt_buf1[ 3];
w3_t[0] = esalt_buf1[ 4];
w3_t[1] = esalt_buf1[ 5];
w3_t[2] = digest_esalt_len * 8;
w3_t[3] = 0;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += r_a;
b += r_b;
c += r_c;
d += r_d;
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
COMPARE_M_SIMD (a, d, c, b);
Initial commit
2015-12-04 14:47:52 +00:00
}
}
- Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance - Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility - Added -cl-std=CL1.1 to all kernel build options - Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache - Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 21:15:26 +00:00
void m11400m_1_1 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 pw_len, __global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, __local u32 *l_bin2asc)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
* modifier
*/
const u32 gid = get_global_id (0);
const u32 lid = get_local_id (0);
/**
* salt
*/
const u32 salt_len = esalt_bufs[salt_pos].salt_len; // not a bug, we need to get it from the esalt
const u32 pw_salt_len = salt_len + pw_len;
u32 salt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 salt_buf1[16];
Initial commit
2015-12-04 14:47:52 +00:00
salt_buf0[ 0] = esalt_bufs[salt_pos].salt_buf[ 0];
salt_buf0[ 1] = esalt_bufs[salt_pos].salt_buf[ 1];
salt_buf0[ 2] = esalt_bufs[salt_pos].salt_buf[ 2];
salt_buf0[ 3] = esalt_bufs[salt_pos].salt_buf[ 3];
salt_buf0[ 4] = esalt_bufs[salt_pos].salt_buf[ 4];
salt_buf0[ 5] = esalt_bufs[salt_pos].salt_buf[ 5];
salt_buf0[ 6] = esalt_bufs[salt_pos].salt_buf[ 6];
salt_buf0[ 7] = esalt_bufs[salt_pos].salt_buf[ 7];
salt_buf0[ 8] = esalt_bufs[salt_pos].salt_buf[ 8];
salt_buf0[ 9] = esalt_bufs[salt_pos].salt_buf[ 9];
salt_buf0[10] = esalt_bufs[salt_pos].salt_buf[10];
salt_buf0[11] = esalt_bufs[salt_pos].salt_buf[11];
salt_buf0[12] = esalt_bufs[salt_pos].salt_buf[12];
salt_buf0[13] = esalt_bufs[salt_pos].salt_buf[13];
salt_buf0[14] = esalt_bufs[salt_pos].salt_buf[14];
salt_buf0[15] = esalt_bufs[salt_pos].salt_buf[15];
salt_buf1[ 0] = esalt_bufs[salt_pos].salt_buf[16];
salt_buf1[ 1] = esalt_bufs[salt_pos].salt_buf[17];
salt_buf1[ 2] = esalt_bufs[salt_pos].salt_buf[18];
salt_buf1[ 3] = esalt_bufs[salt_pos].salt_buf[19];
salt_buf1[ 4] = esalt_bufs[salt_pos].salt_buf[20];
salt_buf1[ 5] = esalt_bufs[salt_pos].salt_buf[21];
salt_buf1[ 6] = esalt_bufs[salt_pos].salt_buf[22];
salt_buf1[ 7] = esalt_bufs[salt_pos].salt_buf[23];
salt_buf1[ 8] = esalt_bufs[salt_pos].salt_buf[24];
salt_buf1[ 9] = esalt_bufs[salt_pos].salt_buf[25];
salt_buf1[10] = esalt_bufs[salt_pos].salt_buf[26];
salt_buf1[11] = esalt_bufs[salt_pos].salt_buf[27];
salt_buf1[12] = esalt_bufs[salt_pos].salt_buf[28];
salt_buf1[13] = esalt_bufs[salt_pos].salt_buf[29];
salt_buf1[14] = 0;
salt_buf1[15] = 0;
/**
* esalt
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
u32 esalt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 esalt_buf1[16];
u32 esalt_buf2[16];
Initial commit
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esalt_buf0[ 0] = esalt_bufs[salt_pos].esalt_buf[ 0];
esalt_buf0[ 1] = esalt_bufs[salt_pos].esalt_buf[ 1];
esalt_buf0[ 2] = esalt_bufs[salt_pos].esalt_buf[ 2];
esalt_buf0[ 3] = esalt_bufs[salt_pos].esalt_buf[ 3];
esalt_buf0[ 4] = esalt_bufs[salt_pos].esalt_buf[ 4];
esalt_buf0[ 5] = esalt_bufs[salt_pos].esalt_buf[ 5];
esalt_buf0[ 6] = esalt_bufs[salt_pos].esalt_buf[ 6];
esalt_buf0[ 7] = esalt_bufs[salt_pos].esalt_buf[ 7];
esalt_buf0[ 8] = esalt_bufs[salt_pos].esalt_buf[ 8];
esalt_buf0[ 9] = esalt_bufs[salt_pos].esalt_buf[ 9];
esalt_buf0[10] = esalt_bufs[salt_pos].esalt_buf[10];
esalt_buf0[11] = esalt_bufs[salt_pos].esalt_buf[11];
esalt_buf0[12] = esalt_bufs[salt_pos].esalt_buf[12];
esalt_buf0[13] = esalt_bufs[salt_pos].esalt_buf[13];
esalt_buf0[14] = esalt_bufs[salt_pos].esalt_buf[14];
esalt_buf0[15] = esalt_bufs[salt_pos].esalt_buf[15];
esalt_buf1[ 0] = esalt_bufs[salt_pos].esalt_buf[16];
esalt_buf1[ 1] = esalt_bufs[salt_pos].esalt_buf[17];
esalt_buf1[ 2] = esalt_bufs[salt_pos].esalt_buf[18];
esalt_buf1[ 3] = esalt_bufs[salt_pos].esalt_buf[19];
esalt_buf1[ 4] = esalt_bufs[salt_pos].esalt_buf[20];
esalt_buf1[ 5] = esalt_bufs[salt_pos].esalt_buf[21];
esalt_buf1[ 6] = esalt_bufs[salt_pos].esalt_buf[22];
esalt_buf1[ 7] = esalt_bufs[salt_pos].esalt_buf[23];
esalt_buf1[ 8] = esalt_bufs[salt_pos].esalt_buf[24];
esalt_buf1[ 9] = esalt_bufs[salt_pos].esalt_buf[25];
esalt_buf1[10] = esalt_bufs[salt_pos].esalt_buf[26];
esalt_buf1[11] = esalt_bufs[salt_pos].esalt_buf[27];
esalt_buf1[12] = esalt_bufs[salt_pos].esalt_buf[28];
esalt_buf1[13] = esalt_bufs[salt_pos].esalt_buf[29];
esalt_buf1[14] = esalt_bufs[salt_pos].esalt_buf[30];
esalt_buf1[15] = esalt_bufs[salt_pos].esalt_buf[31];
esalt_buf2[ 0] = esalt_bufs[salt_pos].esalt_buf[32];
esalt_buf2[ 1] = esalt_bufs[salt_pos].esalt_buf[33];
esalt_buf2[ 2] = esalt_bufs[salt_pos].esalt_buf[34];
esalt_buf2[ 3] = esalt_bufs[salt_pos].esalt_buf[35];
esalt_buf2[ 4] = esalt_bufs[salt_pos].esalt_buf[36];
esalt_buf2[ 5] = esalt_bufs[salt_pos].esalt_buf[37];
esalt_buf2[ 6] = 0;
esalt_buf2[ 7] = 0;
esalt_buf2[ 8] = 0;
esalt_buf2[ 9] = 0;
esalt_buf2[10] = 0;
esalt_buf2[11] = 0;
esalt_buf2[12] = 0;
esalt_buf2[13] = 0;
esalt_buf2[14] = 0;
esalt_buf2[15] = 0;
const u32 digest_esalt_len = 32 + esalt_len;
/**
* loop
*/
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0l = w0[0];
Initial commit
2015-12-04 14:47:52 +00:00
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
for (u32 il_pos = 0; il_pos < il_cnt; il_pos += VECT_SIZE)
Initial commit
2015-12-04 14:47:52 +00:00
{
Prepare NEW_SIMD_MODE for -a 1 kernels
2016-02-20 15:13:06 +00:00
const u32x w0r = ix_create_bft (bfs_buf, il_pos);
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
const u32x w0lr = w0l | w0r;
Initial commit
2015-12-04 14:47:52 +00:00
/*
* HA1 = md5 ($salt . $pass)
*/
// append the pass to the salt
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x block0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32x block1[16];
Initial commit
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block0[ 0] = salt_buf0[ 0];
block0[ 1] = salt_buf0[ 1];
block0[ 2] = salt_buf0[ 2];
block0[ 3] = salt_buf0[ 3];
block0[ 4] = salt_buf0[ 4];
block0[ 5] = salt_buf0[ 5];
block0[ 6] = salt_buf0[ 6];
block0[ 7] = salt_buf0[ 7];
block0[ 8] = salt_buf0[ 8];
block0[ 9] = salt_buf0[ 9];
block0[10] = salt_buf0[10];
block0[11] = salt_buf0[11];
block0[12] = salt_buf0[12];
block0[13] = salt_buf0[13];
block0[14] = salt_buf0[14];
block0[15] = salt_buf0[15];
block1[ 0] = salt_buf1[ 0];
block1[ 1] = salt_buf1[ 1];
block1[ 2] = salt_buf1[ 2];
block1[ 3] = salt_buf1[ 3];
block1[ 4] = salt_buf1[ 4];
block1[ 5] = salt_buf1[ 5];
block1[ 6] = salt_buf1[ 6];
block1[ 7] = salt_buf1[ 7];
block1[ 8] = salt_buf1[ 8];
block1[ 9] = salt_buf1[ 9];
block1[10] = salt_buf1[10];
block1[11] = salt_buf1[11];
block1[12] = salt_buf1[12];
block1[13] = salt_buf1[13];
block1[14] = salt_buf1[14];
block1[15] = salt_buf1[15];
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x w0_t[4];
u32x w1_t[4];
u32x w2_t[4];
u32x w3_t[4];
w0_t[0] = w0lr;
w0_t[1] = w0[1];
w0_t[2] = w0[2];
w0_t[3] = w0[3];
w1_t[0] = w1[0];
w1_t[1] = w1[1];
w1_t[2] = w1[2];
w1_t[3] = w1[3];
w2_t[0] = w2[0];
w2_t[1] = w2[1];
w2_t[2] = w2[2];
w2_t[3] = w2[3];
w3_t[0] = w3[0];
w3_t[1] = w3[1];
w3_t[2] = w3[2];
w3_t[3] = w3[3];
memcat32 (block0, block1, salt_len, w0_t, w1_t, w2_t, w3_t, pw_len);
Initial commit
2015-12-04 14:47:52 +00:00
w0_t[0] = block0[ 0];
w0_t[1] = block0[ 1];
w0_t[2] = block0[ 2];
w0_t[3] = block0[ 3];
w1_t[0] = block0[ 4];
w1_t[1] = block0[ 5];
w1_t[2] = block0[ 6];
w1_t[3] = block0[ 7];
w2_t[0] = block0[ 8];
w2_t[1] = block0[ 9];
w2_t[2] = block0[10];
w2_t[3] = block0[11];
w3_t[0] = block0[12];
w3_t[1] = block0[13];
w3_t[2] = block0[14];
w3_t[3] = block0[15];
// md5
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x a = MD5M_A;
u32x b = MD5M_B;
u32x c = MD5M_C;
u32x d = MD5M_D;
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x r_a = a;
u32x r_b = b;
u32x r_c = c;
u32x r_d = d;
Initial commit
2015-12-04 14:47:52 +00:00
w0_t[0] = block1[ 0];
w0_t[1] = block1[ 1];
w0_t[2] = block1[ 2];
w0_t[3] = block1[ 3];
w1_t[0] = block1[ 4];
w1_t[1] = block1[ 5];
w1_t[2] = block1[ 6];
w1_t[3] = block1[ 7];
w2_t[0] = block1[ 8];
w2_t[1] = block1[ 9];
w2_t[2] = block1[10];
w2_t[3] = block1[11];
w3_t[0] = block1[12];
w3_t[1] = block1[13];
w3_t[2] = pw_salt_len * 8;
w3_t[3] = 0;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += r_a;
b += r_b;
c += r_c;
d += r_d;
/*
* final = md5 ($HA1 . $esalt)
* we have at least 2 MD5 blocks/transformations, but we might need 3
*/
w0_t[0] = uint_to_hex_lower8 ((a >> 0) & 255) << 0
| uint_to_hex_lower8 ((a >> 8) & 255) << 16;
w0_t[1] = uint_to_hex_lower8 ((a >> 16) & 255) << 0
| uint_to_hex_lower8 ((a >> 24) & 255) << 16;
w0_t[2] = uint_to_hex_lower8 ((b >> 0) & 255) << 0
| uint_to_hex_lower8 ((b >> 8) & 255) << 16;
w0_t[3] = uint_to_hex_lower8 ((b >> 16) & 255) << 0
| uint_to_hex_lower8 ((b >> 24) & 255) << 16;
w1_t[0] = uint_to_hex_lower8 ((c >> 0) & 255) << 0
| uint_to_hex_lower8 ((c >> 8) & 255) << 16;
w1_t[1] = uint_to_hex_lower8 ((c >> 16) & 255) << 0
| uint_to_hex_lower8 ((c >> 24) & 255) << 16;
w1_t[2] = uint_to_hex_lower8 ((d >> 0) & 255) << 0
| uint_to_hex_lower8 ((d >> 8) & 255) << 16;
w1_t[3] = uint_to_hex_lower8 ((d >> 16) & 255) << 0
| uint_to_hex_lower8 ((d >> 24) & 255) << 16;
w2_t[0] = esalt_buf0[0];
w2_t[1] = esalt_buf0[1];
w2_t[2] = esalt_buf0[2];
w2_t[3] = esalt_buf0[3];
w3_t[0] = esalt_buf0[4];
w3_t[1] = esalt_buf0[5];
w3_t[2] = esalt_buf0[6];
w3_t[3] = esalt_buf0[7];
// md5
// 1st transform
a = MD5M_A;
b = MD5M_B;
c = MD5M_C;
d = MD5M_D;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
r_a = a;
r_b = b;
r_c = c;
r_d = d;
// 2nd transform
w0_t[0] = esalt_buf0[ 8];
w0_t[1] = esalt_buf0[ 9];
w0_t[2] = esalt_buf0[10];
w0_t[3] = esalt_buf0[11];
w1_t[0] = esalt_buf0[12];
w1_t[1] = esalt_buf0[13];
w1_t[2] = esalt_buf0[14];
w1_t[3] = esalt_buf0[15];
w2_t[0] = esalt_buf1[ 0];
w2_t[1] = esalt_buf1[ 1];
w2_t[2] = esalt_buf1[ 2];
w2_t[3] = esalt_buf1[ 3];
w3_t[0] = esalt_buf1[ 4];
w3_t[1] = esalt_buf1[ 5];
w3_t[2] = esalt_buf1[ 6];
w3_t[3] = esalt_buf1[ 7];
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
// this is for sure the final block
a += r_a;
b += r_b;
c += r_c;
d += r_d;
r_a = a;
r_b = b;
r_c = c;
r_d = d;
w0_t[0] = esalt_buf1[ 8];
w0_t[1] = esalt_buf1[ 9];
w0_t[2] = esalt_buf1[10];
w0_t[3] = esalt_buf1[11];
w1_t[0] = esalt_buf1[12];
w1_t[1] = esalt_buf1[13];
w1_t[2] = esalt_buf1[14];
w1_t[3] = esalt_buf1[15];
w2_t[0] = esalt_buf2[ 0];
w2_t[1] = esalt_buf2[ 1];
w2_t[2] = esalt_buf2[ 2];
w2_t[3] = esalt_buf2[ 3];
w3_t[0] = esalt_buf2[ 4];
w3_t[1] = esalt_buf2[ 5];
w3_t[2] = digest_esalt_len * 8;
w3_t[3] = 0;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += r_a;
b += r_b;
c += r_c;
d += r_d;
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
COMPARE_M_SIMD (a, d, c, b);
Initial commit
2015-12-04 14:47:52 +00:00
}
}
- Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance - Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility - Added -cl-std=CL1.1 to all kernel build options - Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache - Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 21:15:26 +00:00
void m11400s_0_0 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 pw_len, __global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, __local u32 *l_bin2asc)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
* modifier
*/
const u32 gid = get_global_id (0);
const u32 lid = get_local_id (0);
/**
* digest
*/
const u32 search[4] =
{
digests_buf[digests_offset].digest_buf[DGST_R0],
digests_buf[digests_offset].digest_buf[DGST_R1],
digests_buf[digests_offset].digest_buf[DGST_R2],
digests_buf[digests_offset].digest_buf[DGST_R3]
};
/**
* salt
*/
const u32 salt_len = esalt_bufs[salt_pos].salt_len; // not a bug, we need to get it from the esalt
const u32 pw_salt_len = salt_len + pw_len;
u32 salt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 salt_buf1[16];
Initial commit
2015-12-04 14:47:52 +00:00
salt_buf0[ 0] = esalt_bufs[salt_pos].salt_buf[ 0];
salt_buf0[ 1] = esalt_bufs[salt_pos].salt_buf[ 1];
salt_buf0[ 2] = esalt_bufs[salt_pos].salt_buf[ 2];
salt_buf0[ 3] = esalt_bufs[salt_pos].salt_buf[ 3];
salt_buf0[ 4] = esalt_bufs[salt_pos].salt_buf[ 4];
salt_buf0[ 5] = esalt_bufs[salt_pos].salt_buf[ 5];
salt_buf0[ 6] = esalt_bufs[salt_pos].salt_buf[ 6];
salt_buf0[ 7] = esalt_bufs[salt_pos].salt_buf[ 7];
salt_buf0[ 8] = esalt_bufs[salt_pos].salt_buf[ 8];
salt_buf0[ 9] = esalt_bufs[salt_pos].salt_buf[ 9];
salt_buf0[10] = esalt_bufs[salt_pos].salt_buf[10];
salt_buf0[11] = esalt_bufs[salt_pos].salt_buf[11];
salt_buf0[12] = esalt_bufs[salt_pos].salt_buf[12];
salt_buf0[13] = esalt_bufs[salt_pos].salt_buf[13];
salt_buf0[14] = esalt_bufs[salt_pos].salt_buf[14];
salt_buf0[15] = esalt_bufs[salt_pos].salt_buf[15];
salt_buf1[ 0] = esalt_bufs[salt_pos].salt_buf[16];
salt_buf1[ 1] = esalt_bufs[salt_pos].salt_buf[17];
salt_buf1[ 2] = esalt_bufs[salt_pos].salt_buf[18];
salt_buf1[ 3] = esalt_bufs[salt_pos].salt_buf[19];
salt_buf1[ 4] = esalt_bufs[salt_pos].salt_buf[20];
salt_buf1[ 5] = esalt_bufs[salt_pos].salt_buf[21];
salt_buf1[ 6] = esalt_bufs[salt_pos].salt_buf[22];
salt_buf1[ 7] = esalt_bufs[salt_pos].salt_buf[23];
salt_buf1[ 8] = esalt_bufs[salt_pos].salt_buf[24];
salt_buf1[ 9] = esalt_bufs[salt_pos].salt_buf[25];
salt_buf1[10] = esalt_bufs[salt_pos].salt_buf[26];
salt_buf1[11] = esalt_bufs[salt_pos].salt_buf[27];
salt_buf1[12] = esalt_bufs[salt_pos].salt_buf[28];
salt_buf1[13] = esalt_bufs[salt_pos].salt_buf[29];
salt_buf1[14] = 0;
salt_buf1[15] = 0;
/**
* esalt
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
u32 esalt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 esalt_buf1[16];
Initial commit
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esalt_buf0[ 0] = esalt_bufs[salt_pos].esalt_buf[ 0];
esalt_buf0[ 1] = esalt_bufs[salt_pos].esalt_buf[ 1];
esalt_buf0[ 2] = esalt_bufs[salt_pos].esalt_buf[ 2];
esalt_buf0[ 3] = esalt_bufs[salt_pos].esalt_buf[ 3];
esalt_buf0[ 4] = esalt_bufs[salt_pos].esalt_buf[ 4];
esalt_buf0[ 5] = esalt_bufs[salt_pos].esalt_buf[ 5];
esalt_buf0[ 6] = esalt_bufs[salt_pos].esalt_buf[ 6];
esalt_buf0[ 7] = esalt_bufs[salt_pos].esalt_buf[ 7];
esalt_buf0[ 8] = esalt_bufs[salt_pos].esalt_buf[ 8];
esalt_buf0[ 9] = esalt_bufs[salt_pos].esalt_buf[ 9];
esalt_buf0[10] = esalt_bufs[salt_pos].esalt_buf[10];
esalt_buf0[11] = esalt_bufs[salt_pos].esalt_buf[11];
esalt_buf0[12] = esalt_bufs[salt_pos].esalt_buf[12];
esalt_buf0[13] = esalt_bufs[salt_pos].esalt_buf[13];
esalt_buf0[14] = esalt_bufs[salt_pos].esalt_buf[14];
esalt_buf0[15] = esalt_bufs[salt_pos].esalt_buf[15];
esalt_buf1[ 0] = esalt_bufs[salt_pos].esalt_buf[16];
esalt_buf1[ 1] = esalt_bufs[salt_pos].esalt_buf[17];
esalt_buf1[ 2] = esalt_bufs[salt_pos].esalt_buf[18];
esalt_buf1[ 3] = esalt_bufs[salt_pos].esalt_buf[19];
esalt_buf1[ 4] = esalt_bufs[salt_pos].esalt_buf[20];
esalt_buf1[ 5] = esalt_bufs[salt_pos].esalt_buf[21];
esalt_buf1[ 6] = esalt_bufs[salt_pos].esalt_buf[22];
esalt_buf1[ 7] = esalt_bufs[salt_pos].esalt_buf[23];
esalt_buf1[ 8] = esalt_bufs[salt_pos].esalt_buf[24];
esalt_buf1[ 9] = esalt_bufs[salt_pos].esalt_buf[25];
esalt_buf1[10] = esalt_bufs[salt_pos].esalt_buf[26];
esalt_buf1[11] = esalt_bufs[salt_pos].esalt_buf[27];
esalt_buf1[12] = esalt_bufs[salt_pos].esalt_buf[28];
esalt_buf1[13] = esalt_bufs[salt_pos].esalt_buf[29];
esalt_buf1[14] = esalt_bufs[salt_pos].esalt_buf[30];
esalt_buf1[15] = esalt_bufs[salt_pos].esalt_buf[31];
const u32 digest_esalt_len = 32 + esalt_len;
/**
* loop
*/
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0l = w0[0];
Initial commit
2015-12-04 14:47:52 +00:00
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
for (u32 il_pos = 0; il_pos < il_cnt; il_pos += VECT_SIZE)
Initial commit
2015-12-04 14:47:52 +00:00
{
Prepare NEW_SIMD_MODE for -a 1 kernels
2016-02-20 15:13:06 +00:00
const u32x w0r = ix_create_bft (bfs_buf, il_pos);
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
const u32x w0lr = w0l | w0r;
Initial commit
2015-12-04 14:47:52 +00:00
/*
* HA1 = md5 ($salt . $pass)
*/
// append the pass to the salt
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x block0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32x block1[16];
Initial commit
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block0[ 0] = salt_buf0[ 0];
block0[ 1] = salt_buf0[ 1];
block0[ 2] = salt_buf0[ 2];
block0[ 3] = salt_buf0[ 3];
block0[ 4] = salt_buf0[ 4];
block0[ 5] = salt_buf0[ 5];
block0[ 6] = salt_buf0[ 6];
block0[ 7] = salt_buf0[ 7];
block0[ 8] = salt_buf0[ 8];
block0[ 9] = salt_buf0[ 9];
block0[10] = salt_buf0[10];
block0[11] = salt_buf0[11];
block0[12] = salt_buf0[12];
block0[13] = salt_buf0[13];
block0[14] = salt_buf0[14];
block0[15] = salt_buf0[15];
block1[ 0] = salt_buf1[ 0];
block1[ 1] = salt_buf1[ 1];
block1[ 2] = salt_buf1[ 2];
block1[ 3] = salt_buf1[ 3];
block1[ 4] = salt_buf1[ 4];
block1[ 5] = salt_buf1[ 5];
block1[ 6] = salt_buf1[ 6];
block1[ 7] = salt_buf1[ 7];
block1[ 8] = salt_buf1[ 8];
block1[ 9] = salt_buf1[ 9];
block1[10] = salt_buf1[10];
block1[11] = salt_buf1[11];
block1[12] = salt_buf1[12];
block1[13] = salt_buf1[13];
block1[14] = salt_buf1[14];
block1[15] = salt_buf1[15];
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x w0_t[4];
u32x w1_t[4];
u32x w2_t[4];
u32x w3_t[4];
w0_t[0] = w0lr;
w0_t[1] = w0[1];
w0_t[2] = w0[2];
w0_t[3] = w0[3];
w1_t[0] = w1[0];
w1_t[1] = w1[1];
w1_t[2] = w1[2];
w1_t[3] = w1[3];
w2_t[0] = w2[0];
w2_t[1] = w2[1];
w2_t[2] = w2[2];
w2_t[3] = w2[3];
w3_t[0] = w3[0];
w3_t[1] = w3[1];
w3_t[2] = w3[2];
w3_t[3] = w3[3];
memcat32 (block0, block1, salt_len, w0_t, w1_t, w2_t, w3_t, pw_len);
Initial commit
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w0_t[0] = block0[ 0];
w0_t[1] = block0[ 1];
w0_t[2] = block0[ 2];
w0_t[3] = block0[ 3];
w1_t[0] = block0[ 4];
w1_t[1] = block0[ 5];
w1_t[2] = block0[ 6];
w1_t[3] = block0[ 7];
w2_t[0] = block0[ 8];
w2_t[1] = block0[ 9];
w2_t[2] = block0[10];
w2_t[3] = block0[11];
w3_t[0] = block0[12];
w3_t[1] = block0[13];
w3_t[2] = pw_salt_len * 8;
w3_t[3] = 0;
// md5
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x a = MD5M_A;
u32x b = MD5M_B;
u32x c = MD5M_C;
u32x d = MD5M_D;
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
/*
* final = md5 ($HA1 . $esalt)
* we have at least 2 MD5 blocks/transformations, but we might need 3
*/
w0_t[0] = uint_to_hex_lower8 ((a >> 0) & 255) << 0
| uint_to_hex_lower8 ((a >> 8) & 255) << 16;
w0_t[1] = uint_to_hex_lower8 ((a >> 16) & 255) << 0
| uint_to_hex_lower8 ((a >> 24) & 255) << 16;
w0_t[2] = uint_to_hex_lower8 ((b >> 0) & 255) << 0
| uint_to_hex_lower8 ((b >> 8) & 255) << 16;
w0_t[3] = uint_to_hex_lower8 ((b >> 16) & 255) << 0
| uint_to_hex_lower8 ((b >> 24) & 255) << 16;
w1_t[0] = uint_to_hex_lower8 ((c >> 0) & 255) << 0
| uint_to_hex_lower8 ((c >> 8) & 255) << 16;
w1_t[1] = uint_to_hex_lower8 ((c >> 16) & 255) << 0
| uint_to_hex_lower8 ((c >> 24) & 255) << 16;
w1_t[2] = uint_to_hex_lower8 ((d >> 0) & 255) << 0
| uint_to_hex_lower8 ((d >> 8) & 255) << 16;
w1_t[3] = uint_to_hex_lower8 ((d >> 16) & 255) << 0
| uint_to_hex_lower8 ((d >> 24) & 255) << 16;
w2_t[0] = esalt_buf0[0];
w2_t[1] = esalt_buf0[1];
w2_t[2] = esalt_buf0[2];
w2_t[3] = esalt_buf0[3];
w3_t[0] = esalt_buf0[4];
w3_t[1] = esalt_buf0[5];
w3_t[2] = esalt_buf0[6];
w3_t[3] = esalt_buf0[7];
// md5
// 1st transform
a = MD5M_A;
b = MD5M_B;
c = MD5M_C;
d = MD5M_D;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x r_a = a;
u32x r_b = b;
u32x r_c = c;
u32x r_d = d;
Initial commit
2015-12-04 14:47:52 +00:00
// 2nd transform
w0_t[0] = esalt_buf0[ 8];
w0_t[1] = esalt_buf0[ 9];
w0_t[2] = esalt_buf0[10];
w0_t[3] = esalt_buf0[11];
w1_t[0] = esalt_buf0[12];
w1_t[1] = esalt_buf0[13];
w1_t[2] = esalt_buf0[14];
w1_t[3] = esalt_buf0[15];
w2_t[0] = esalt_buf1[ 0];
w2_t[1] = esalt_buf1[ 1];
w2_t[2] = esalt_buf1[ 2];
w2_t[3] = esalt_buf1[ 3];
w3_t[0] = esalt_buf1[ 4];
w3_t[1] = esalt_buf1[ 5];
w3_t[2] = digest_esalt_len * 8;
w3_t[3] = 0;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += r_a;
b += r_b;
c += r_c;
d += r_d;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
COMPARE_S_SIMD (a, d, c, b);
Initial commit
2015-12-04 14:47:52 +00:00
}
}
- Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance - Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility - Added -cl-std=CL1.1 to all kernel build options - Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache - Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 21:15:26 +00:00
void m11400s_0_1 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 pw_len, __global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, __local u32 *l_bin2asc)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
* modifier
*/
const u32 gid = get_global_id (0);
const u32 lid = get_local_id (0);
/**
* digest
*/
const u32 search[4] =
{
digests_buf[digests_offset].digest_buf[DGST_R0],
digests_buf[digests_offset].digest_buf[DGST_R1],
digests_buf[digests_offset].digest_buf[DGST_R2],
digests_buf[digests_offset].digest_buf[DGST_R3]
};
/**
* salt
*/
const u32 salt_len = esalt_bufs[salt_pos].salt_len; // not a bug, we need to get it from the esalt
const u32 pw_salt_len = salt_len + pw_len;
u32 salt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 salt_buf1[16];
Initial commit
2015-12-04 14:47:52 +00:00
salt_buf0[ 0] = esalt_bufs[salt_pos].salt_buf[ 0];
salt_buf0[ 1] = esalt_bufs[salt_pos].salt_buf[ 1];
salt_buf0[ 2] = esalt_bufs[salt_pos].salt_buf[ 2];
salt_buf0[ 3] = esalt_bufs[salt_pos].salt_buf[ 3];
salt_buf0[ 4] = esalt_bufs[salt_pos].salt_buf[ 4];
salt_buf0[ 5] = esalt_bufs[salt_pos].salt_buf[ 5];
salt_buf0[ 6] = esalt_bufs[salt_pos].salt_buf[ 6];
salt_buf0[ 7] = esalt_bufs[salt_pos].salt_buf[ 7];
salt_buf0[ 8] = esalt_bufs[salt_pos].salt_buf[ 8];
salt_buf0[ 9] = esalt_bufs[salt_pos].salt_buf[ 9];
salt_buf0[10] = esalt_bufs[salt_pos].salt_buf[10];
salt_buf0[11] = esalt_bufs[salt_pos].salt_buf[11];
salt_buf0[12] = esalt_bufs[salt_pos].salt_buf[12];
salt_buf0[13] = esalt_bufs[salt_pos].salt_buf[13];
salt_buf0[14] = esalt_bufs[salt_pos].salt_buf[14];
salt_buf0[15] = esalt_bufs[salt_pos].salt_buf[15];
salt_buf1[ 0] = esalt_bufs[salt_pos].salt_buf[16];
salt_buf1[ 1] = esalt_bufs[salt_pos].salt_buf[17];
salt_buf1[ 2] = esalt_bufs[salt_pos].salt_buf[18];
salt_buf1[ 3] = esalt_bufs[salt_pos].salt_buf[19];
salt_buf1[ 4] = esalt_bufs[salt_pos].salt_buf[20];
salt_buf1[ 5] = esalt_bufs[salt_pos].salt_buf[21];
salt_buf1[ 6] = esalt_bufs[salt_pos].salt_buf[22];
salt_buf1[ 7] = esalt_bufs[salt_pos].salt_buf[23];
salt_buf1[ 8] = esalt_bufs[salt_pos].salt_buf[24];
salt_buf1[ 9] = esalt_bufs[salt_pos].salt_buf[25];
salt_buf1[10] = esalt_bufs[salt_pos].salt_buf[26];
salt_buf1[11] = esalt_bufs[salt_pos].salt_buf[27];
salt_buf1[12] = esalt_bufs[salt_pos].salt_buf[28];
salt_buf1[13] = esalt_bufs[salt_pos].salt_buf[29];
salt_buf1[14] = 0;
salt_buf1[15] = 0;
/**
* esalt
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
u32 esalt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 esalt_buf1[16];
u32 esalt_buf2[16];
Initial commit
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esalt_buf0[ 0] = esalt_bufs[salt_pos].esalt_buf[ 0];
esalt_buf0[ 1] = esalt_bufs[salt_pos].esalt_buf[ 1];
esalt_buf0[ 2] = esalt_bufs[salt_pos].esalt_buf[ 2];
esalt_buf0[ 3] = esalt_bufs[salt_pos].esalt_buf[ 3];
esalt_buf0[ 4] = esalt_bufs[salt_pos].esalt_buf[ 4];
esalt_buf0[ 5] = esalt_bufs[salt_pos].esalt_buf[ 5];
esalt_buf0[ 6] = esalt_bufs[salt_pos].esalt_buf[ 6];
esalt_buf0[ 7] = esalt_bufs[salt_pos].esalt_buf[ 7];
esalt_buf0[ 8] = esalt_bufs[salt_pos].esalt_buf[ 8];
esalt_buf0[ 9] = esalt_bufs[salt_pos].esalt_buf[ 9];
esalt_buf0[10] = esalt_bufs[salt_pos].esalt_buf[10];
esalt_buf0[11] = esalt_bufs[salt_pos].esalt_buf[11];
esalt_buf0[12] = esalt_bufs[salt_pos].esalt_buf[12];
esalt_buf0[13] = esalt_bufs[salt_pos].esalt_buf[13];
esalt_buf0[14] = esalt_bufs[salt_pos].esalt_buf[14];
esalt_buf0[15] = esalt_bufs[salt_pos].esalt_buf[15];
esalt_buf1[ 0] = esalt_bufs[salt_pos].esalt_buf[16];
esalt_buf1[ 1] = esalt_bufs[salt_pos].esalt_buf[17];
esalt_buf1[ 2] = esalt_bufs[salt_pos].esalt_buf[18];
esalt_buf1[ 3] = esalt_bufs[salt_pos].esalt_buf[19];
esalt_buf1[ 4] = esalt_bufs[salt_pos].esalt_buf[20];
esalt_buf1[ 5] = esalt_bufs[salt_pos].esalt_buf[21];
esalt_buf1[ 6] = esalt_bufs[salt_pos].esalt_buf[22];
esalt_buf1[ 7] = esalt_bufs[salt_pos].esalt_buf[23];
esalt_buf1[ 8] = esalt_bufs[salt_pos].esalt_buf[24];
esalt_buf1[ 9] = esalt_bufs[salt_pos].esalt_buf[25];
esalt_buf1[10] = esalt_bufs[salt_pos].esalt_buf[26];
esalt_buf1[11] = esalt_bufs[salt_pos].esalt_buf[27];
esalt_buf1[12] = esalt_bufs[salt_pos].esalt_buf[28];
esalt_buf1[13] = esalt_bufs[salt_pos].esalt_buf[29];
esalt_buf1[14] = esalt_bufs[salt_pos].esalt_buf[30];
esalt_buf1[15] = esalt_bufs[salt_pos].esalt_buf[31];
esalt_buf2[ 0] = esalt_bufs[salt_pos].esalt_buf[32];
esalt_buf2[ 1] = esalt_bufs[salt_pos].esalt_buf[33];
esalt_buf2[ 2] = esalt_bufs[salt_pos].esalt_buf[34];
esalt_buf2[ 3] = esalt_bufs[salt_pos].esalt_buf[35];
esalt_buf2[ 4] = esalt_bufs[salt_pos].esalt_buf[36];
esalt_buf2[ 5] = esalt_bufs[salt_pos].esalt_buf[37];
esalt_buf2[ 6] = 0;
esalt_buf2[ 7] = 0;
esalt_buf2[ 8] = 0;
esalt_buf2[ 9] = 0;
esalt_buf2[10] = 0;
esalt_buf2[11] = 0;
esalt_buf2[12] = 0;
esalt_buf2[13] = 0;
esalt_buf2[14] = 0;
esalt_buf2[15] = 0;
const u32 digest_esalt_len = 32 + esalt_len;
/**
* loop
*/
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0l = w0[0];
Initial commit
2015-12-04 14:47:52 +00:00
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
for (u32 il_pos = 0; il_pos < il_cnt; il_pos += VECT_SIZE)
Initial commit
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{
Prepare NEW_SIMD_MODE for -a 1 kernels
2016-02-20 15:13:06 +00:00
const u32x w0r = ix_create_bft (bfs_buf, il_pos);
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
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const u32x w0lr = w0l | w0r;
Initial commit
2015-12-04 14:47:52 +00:00
/*
* HA1 = md5 ($salt . $pass)
*/
// append the pass to the salt
Converted _a3 kernels, use SIMD for CPU and GPU
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u32x block0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32x block1[16];
Initial commit
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block0[ 0] = salt_buf0[ 0];
block0[ 1] = salt_buf0[ 1];
block0[ 2] = salt_buf0[ 2];
block0[ 3] = salt_buf0[ 3];
block0[ 4] = salt_buf0[ 4];
block0[ 5] = salt_buf0[ 5];
block0[ 6] = salt_buf0[ 6];
block0[ 7] = salt_buf0[ 7];
block0[ 8] = salt_buf0[ 8];
block0[ 9] = salt_buf0[ 9];
block0[10] = salt_buf0[10];
block0[11] = salt_buf0[11];
block0[12] = salt_buf0[12];
block0[13] = salt_buf0[13];
block0[14] = salt_buf0[14];
block0[15] = salt_buf0[15];
block1[ 0] = salt_buf1[ 0];
block1[ 1] = salt_buf1[ 1];
block1[ 2] = salt_buf1[ 2];
block1[ 3] = salt_buf1[ 3];
block1[ 4] = salt_buf1[ 4];
block1[ 5] = salt_buf1[ 5];
block1[ 6] = salt_buf1[ 6];
block1[ 7] = salt_buf1[ 7];
block1[ 8] = salt_buf1[ 8];
block1[ 9] = salt_buf1[ 9];
block1[10] = salt_buf1[10];
block1[11] = salt_buf1[11];
block1[12] = salt_buf1[12];
block1[13] = salt_buf1[13];
block1[14] = salt_buf1[14];
block1[15] = salt_buf1[15];
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x w0_t[4];
u32x w1_t[4];
u32x w2_t[4];
u32x w3_t[4];
w0_t[0] = w0lr;
w0_t[1] = w0[1];
w0_t[2] = w0[2];
w0_t[3] = w0[3];
w1_t[0] = w1[0];
w1_t[1] = w1[1];
w1_t[2] = w1[2];
w1_t[3] = w1[3];
w2_t[0] = w2[0];
w2_t[1] = w2[1];
w2_t[2] = w2[2];
w2_t[3] = w2[3];
w3_t[0] = w3[0];
w3_t[1] = w3[1];
w3_t[2] = w3[2];
w3_t[3] = w3[3];
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
memcat32 (block0, block1, salt_len, w0_t, w1_t, w2_t, w3_t, pw_len);
Initial commit
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w0_t[0] = block0[ 0];
w0_t[1] = block0[ 1];
w0_t[2] = block0[ 2];
w0_t[3] = block0[ 3];
w1_t[0] = block0[ 4];
w1_t[1] = block0[ 5];
w1_t[2] = block0[ 6];
w1_t[3] = block0[ 7];
w2_t[0] = block0[ 8];
w2_t[1] = block0[ 9];
w2_t[2] = block0[10];
w2_t[3] = block0[11];
w3_t[0] = block0[12];
w3_t[1] = block0[13];
w3_t[2] = pw_salt_len * 8;
w3_t[3] = 0;
// md5
Converted _a3 kernels, use SIMD for CPU and GPU
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u32x a = MD5M_A;
u32x b = MD5M_B;
u32x c = MD5M_C;
u32x d = MD5M_D;
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
/*
* final = md5 ($HA1 . $esalt)
* we have at least 2 MD5 blocks/transformations, but we might need 3
*/
w0_t[0] = uint_to_hex_lower8 ((a >> 0) & 255) << 0
| uint_to_hex_lower8 ((a >> 8) & 255) << 16;
w0_t[1] = uint_to_hex_lower8 ((a >> 16) & 255) << 0
| uint_to_hex_lower8 ((a >> 24) & 255) << 16;
w0_t[2] = uint_to_hex_lower8 ((b >> 0) & 255) << 0
| uint_to_hex_lower8 ((b >> 8) & 255) << 16;
w0_t[3] = uint_to_hex_lower8 ((b >> 16) & 255) << 0
| uint_to_hex_lower8 ((b >> 24) & 255) << 16;
w1_t[0] = uint_to_hex_lower8 ((c >> 0) & 255) << 0
| uint_to_hex_lower8 ((c >> 8) & 255) << 16;
w1_t[1] = uint_to_hex_lower8 ((c >> 16) & 255) << 0
| uint_to_hex_lower8 ((c >> 24) & 255) << 16;
w1_t[2] = uint_to_hex_lower8 ((d >> 0) & 255) << 0
| uint_to_hex_lower8 ((d >> 8) & 255) << 16;
w1_t[3] = uint_to_hex_lower8 ((d >> 16) & 255) << 0
| uint_to_hex_lower8 ((d >> 24) & 255) << 16;
w2_t[0] = esalt_buf0[0];
w2_t[1] = esalt_buf0[1];
w2_t[2] = esalt_buf0[2];
w2_t[3] = esalt_buf0[3];
w3_t[0] = esalt_buf0[4];
w3_t[1] = esalt_buf0[5];
w3_t[2] = esalt_buf0[6];
w3_t[3] = esalt_buf0[7];
// md5
// 1st transform
a = MD5M_A;
b = MD5M_B;
c = MD5M_C;
d = MD5M_D;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x r_a = a;
u32x r_b = b;
u32x r_c = c;
u32x r_d = d;
Initial commit
2015-12-04 14:47:52 +00:00
// 2nd transform
w0_t[0] = esalt_buf0[ 8];
w0_t[1] = esalt_buf0[ 9];
w0_t[2] = esalt_buf0[10];
w0_t[3] = esalt_buf0[11];
w1_t[0] = esalt_buf0[12];
w1_t[1] = esalt_buf0[13];
w1_t[2] = esalt_buf0[14];
w1_t[3] = esalt_buf0[15];
w2_t[0] = esalt_buf1[ 0];
w2_t[1] = esalt_buf1[ 1];
w2_t[2] = esalt_buf1[ 2];
w2_t[3] = esalt_buf1[ 3];
w3_t[0] = esalt_buf1[ 4];
w3_t[1] = esalt_buf1[ 5];
w3_t[2] = esalt_buf1[ 6];
w3_t[3] = esalt_buf1[ 7];
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
// this is for sure the final block
a += r_a;
b += r_b;
c += r_c;
d += r_d;
r_a = a;
r_b = b;
r_c = c;
r_d = d;
w0_t[0] = esalt_buf1[ 8];
w0_t[1] = esalt_buf1[ 9];
w0_t[2] = esalt_buf1[10];
w0_t[3] = esalt_buf1[11];
w1_t[0] = esalt_buf1[12];
w1_t[1] = esalt_buf1[13];
w1_t[2] = esalt_buf1[14];
w1_t[3] = esalt_buf1[15];
w2_t[0] = esalt_buf2[ 0];
w2_t[1] = esalt_buf2[ 1];
w2_t[2] = esalt_buf2[ 2];
w2_t[3] = esalt_buf2[ 3];
w3_t[0] = esalt_buf2[ 4];
w3_t[1] = esalt_buf2[ 5];
w3_t[2] = digest_esalt_len * 8;
w3_t[3] = 0;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += r_a;
b += r_b;
c += r_c;
d += r_d;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
COMPARE_S_SIMD (a, d, c, b);
Initial commit
2015-12-04 14:47:52 +00:00
}
}
- Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance - Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility - Added -cl-std=CL1.1 to all kernel build options - Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache - Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 21:15:26 +00:00
void m11400s_1_0 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 pw_len, __global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, __local u32 *l_bin2asc)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
* modifier
*/
const u32 gid = get_global_id (0);
const u32 lid = get_local_id (0);
/**
* digest
*/
const u32 search[4] =
{
digests_buf[digests_offset].digest_buf[DGST_R0],
digests_buf[digests_offset].digest_buf[DGST_R1],
digests_buf[digests_offset].digest_buf[DGST_R2],
digests_buf[digests_offset].digest_buf[DGST_R3]
};
/**
* salt
*/
const u32 salt_len = esalt_bufs[salt_pos].salt_len; // not a bug, we need to get it from the esalt
const u32 pw_salt_len = salt_len + pw_len;
u32 salt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 salt_buf1[16];
Initial commit
2015-12-04 14:47:52 +00:00
salt_buf0[ 0] = esalt_bufs[salt_pos].salt_buf[ 0];
salt_buf0[ 1] = esalt_bufs[salt_pos].salt_buf[ 1];
salt_buf0[ 2] = esalt_bufs[salt_pos].salt_buf[ 2];
salt_buf0[ 3] = esalt_bufs[salt_pos].salt_buf[ 3];
salt_buf0[ 4] = esalt_bufs[salt_pos].salt_buf[ 4];
salt_buf0[ 5] = esalt_bufs[salt_pos].salt_buf[ 5];
salt_buf0[ 6] = esalt_bufs[salt_pos].salt_buf[ 6];
salt_buf0[ 7] = esalt_bufs[salt_pos].salt_buf[ 7];
salt_buf0[ 8] = esalt_bufs[salt_pos].salt_buf[ 8];
salt_buf0[ 9] = esalt_bufs[salt_pos].salt_buf[ 9];
salt_buf0[10] = esalt_bufs[salt_pos].salt_buf[10];
salt_buf0[11] = esalt_bufs[salt_pos].salt_buf[11];
salt_buf0[12] = esalt_bufs[salt_pos].salt_buf[12];
salt_buf0[13] = esalt_bufs[salt_pos].salt_buf[13];
salt_buf0[14] = esalt_bufs[salt_pos].salt_buf[14];
salt_buf0[15] = esalt_bufs[salt_pos].salt_buf[15];
salt_buf1[ 0] = esalt_bufs[salt_pos].salt_buf[16];
salt_buf1[ 1] = esalt_bufs[salt_pos].salt_buf[17];
salt_buf1[ 2] = esalt_bufs[salt_pos].salt_buf[18];
salt_buf1[ 3] = esalt_bufs[salt_pos].salt_buf[19];
salt_buf1[ 4] = esalt_bufs[salt_pos].salt_buf[20];
salt_buf1[ 5] = esalt_bufs[salt_pos].salt_buf[21];
salt_buf1[ 6] = esalt_bufs[salt_pos].salt_buf[22];
salt_buf1[ 7] = esalt_bufs[salt_pos].salt_buf[23];
salt_buf1[ 8] = esalt_bufs[salt_pos].salt_buf[24];
salt_buf1[ 9] = esalt_bufs[salt_pos].salt_buf[25];
salt_buf1[10] = esalt_bufs[salt_pos].salt_buf[26];
salt_buf1[11] = esalt_bufs[salt_pos].salt_buf[27];
salt_buf1[12] = esalt_bufs[salt_pos].salt_buf[28];
salt_buf1[13] = esalt_bufs[salt_pos].salt_buf[29];
salt_buf1[14] = 0;
salt_buf1[15] = 0;
/**
* esalt
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
u32 esalt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 esalt_buf1[16];
Initial commit
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esalt_buf0[ 0] = esalt_bufs[salt_pos].esalt_buf[ 0];
esalt_buf0[ 1] = esalt_bufs[salt_pos].esalt_buf[ 1];
esalt_buf0[ 2] = esalt_bufs[salt_pos].esalt_buf[ 2];
esalt_buf0[ 3] = esalt_bufs[salt_pos].esalt_buf[ 3];
esalt_buf0[ 4] = esalt_bufs[salt_pos].esalt_buf[ 4];
esalt_buf0[ 5] = esalt_bufs[salt_pos].esalt_buf[ 5];
esalt_buf0[ 6] = esalt_bufs[salt_pos].esalt_buf[ 6];
esalt_buf0[ 7] = esalt_bufs[salt_pos].esalt_buf[ 7];
esalt_buf0[ 8] = esalt_bufs[salt_pos].esalt_buf[ 8];
esalt_buf0[ 9] = esalt_bufs[salt_pos].esalt_buf[ 9];
esalt_buf0[10] = esalt_bufs[salt_pos].esalt_buf[10];
esalt_buf0[11] = esalt_bufs[salt_pos].esalt_buf[11];
esalt_buf0[12] = esalt_bufs[salt_pos].esalt_buf[12];
esalt_buf0[13] = esalt_bufs[salt_pos].esalt_buf[13];
esalt_buf0[14] = esalt_bufs[salt_pos].esalt_buf[14];
esalt_buf0[15] = esalt_bufs[salt_pos].esalt_buf[15];
esalt_buf1[ 0] = esalt_bufs[salt_pos].esalt_buf[16];
esalt_buf1[ 1] = esalt_bufs[salt_pos].esalt_buf[17];
esalt_buf1[ 2] = esalt_bufs[salt_pos].esalt_buf[18];
esalt_buf1[ 3] = esalt_bufs[salt_pos].esalt_buf[19];
esalt_buf1[ 4] = esalt_bufs[salt_pos].esalt_buf[20];
esalt_buf1[ 5] = esalt_bufs[salt_pos].esalt_buf[21];
esalt_buf1[ 6] = esalt_bufs[salt_pos].esalt_buf[22];
esalt_buf1[ 7] = esalt_bufs[salt_pos].esalt_buf[23];
esalt_buf1[ 8] = esalt_bufs[salt_pos].esalt_buf[24];
esalt_buf1[ 9] = esalt_bufs[salt_pos].esalt_buf[25];
esalt_buf1[10] = esalt_bufs[salt_pos].esalt_buf[26];
esalt_buf1[11] = esalt_bufs[salt_pos].esalt_buf[27];
esalt_buf1[12] = esalt_bufs[salt_pos].esalt_buf[28];
esalt_buf1[13] = esalt_bufs[salt_pos].esalt_buf[29];
esalt_buf1[14] = esalt_bufs[salt_pos].esalt_buf[30];
esalt_buf1[15] = esalt_bufs[salt_pos].esalt_buf[31];
const u32 digest_esalt_len = 32 + esalt_len;
/**
* loop
*/
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0l = w0[0];
Initial commit
2015-12-04 14:47:52 +00:00
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
for (u32 il_pos = 0; il_pos < il_cnt; il_pos += VECT_SIZE)
Initial commit
2015-12-04 14:47:52 +00:00
{
Prepare NEW_SIMD_MODE for -a 1 kernels
2016-02-20 15:13:06 +00:00
const u32x w0r = ix_create_bft (bfs_buf, il_pos);
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
const u32x w0lr = w0l | w0r;
Initial commit
2015-12-04 14:47:52 +00:00
/*
* HA1 = md5 ($salt . $pass)
*/
// append the pass to the salt
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x block0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32x block1[16];
Initial commit
2015-12-04 14:47:52 +00:00
block0[ 0] = salt_buf0[ 0];
block0[ 1] = salt_buf0[ 1];
block0[ 2] = salt_buf0[ 2];
block0[ 3] = salt_buf0[ 3];
block0[ 4] = salt_buf0[ 4];
block0[ 5] = salt_buf0[ 5];
block0[ 6] = salt_buf0[ 6];
block0[ 7] = salt_buf0[ 7];
block0[ 8] = salt_buf0[ 8];
block0[ 9] = salt_buf0[ 9];
block0[10] = salt_buf0[10];
block0[11] = salt_buf0[11];
block0[12] = salt_buf0[12];
block0[13] = salt_buf0[13];
block0[14] = salt_buf0[14];
block0[15] = salt_buf0[15];
block1[ 0] = salt_buf1[ 0];
block1[ 1] = salt_buf1[ 1];
block1[ 2] = salt_buf1[ 2];
block1[ 3] = salt_buf1[ 3];
block1[ 4] = salt_buf1[ 4];
block1[ 5] = salt_buf1[ 5];
block1[ 6] = salt_buf1[ 6];
block1[ 7] = salt_buf1[ 7];
block1[ 8] = salt_buf1[ 8];
block1[ 9] = salt_buf1[ 9];
block1[10] = salt_buf1[10];
block1[11] = salt_buf1[11];
block1[12] = salt_buf1[12];
block1[13] = salt_buf1[13];
block1[14] = salt_buf1[14];
block1[15] = salt_buf1[15];
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x w0_t[4];
u32x w1_t[4];
u32x w2_t[4];
u32x w3_t[4];
w0_t[0] = w0lr;
w0_t[1] = w0[1];
w0_t[2] = w0[2];
w0_t[3] = w0[3];
w1_t[0] = w1[0];
w1_t[1] = w1[1];
w1_t[2] = w1[2];
w1_t[3] = w1[3];
w2_t[0] = w2[0];
w2_t[1] = w2[1];
w2_t[2] = w2[2];
w2_t[3] = w2[3];
w3_t[0] = w3[0];
w3_t[1] = w3[1];
w3_t[2] = w3[2];
w3_t[3] = w3[3];
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
memcat32 (block0, block1, salt_len, w0_t, w1_t, w2_t, w3_t, pw_len);
Initial commit
2015-12-04 14:47:52 +00:00
w0_t[0] = block0[ 0];
w0_t[1] = block0[ 1];
w0_t[2] = block0[ 2];
w0_t[3] = block0[ 3];
w1_t[0] = block0[ 4];
w1_t[1] = block0[ 5];
w1_t[2] = block0[ 6];
w1_t[3] = block0[ 7];
w2_t[0] = block0[ 8];
w2_t[1] = block0[ 9];
w2_t[2] = block0[10];
w2_t[3] = block0[11];
w3_t[0] = block0[12];
w3_t[1] = block0[13];
w3_t[2] = block0[14];
w3_t[3] = block0[15];
// md5
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x a = MD5M_A;
u32x b = MD5M_B;
u32x c = MD5M_C;
u32x d = MD5M_D;
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x r_a = a;
u32x r_b = b;
u32x r_c = c;
u32x r_d = d;
Initial commit
2015-12-04 14:47:52 +00:00
w0_t[0] = block1[ 0];
w0_t[1] = block1[ 1];
w0_t[2] = block1[ 2];
w0_t[3] = block1[ 3];
w1_t[0] = block1[ 4];
w1_t[1] = block1[ 5];
w1_t[2] = block1[ 6];
w1_t[3] = block1[ 7];
w2_t[0] = block1[ 8];
w2_t[1] = block1[ 9];
w2_t[2] = block1[10];
w2_t[3] = block1[11];
w3_t[0] = block1[12];
w3_t[1] = block1[13];
w3_t[2] = pw_salt_len * 8;
w3_t[3] = 0;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += r_a;
b += r_b;
c += r_c;
d += r_d;
/*
* final = md5 ($HA1 . $esalt)
* we have at least 2 MD5 blocks/transformations, but we might need 3
*/
w0_t[0] = uint_to_hex_lower8 ((a >> 0) & 255) << 0
| uint_to_hex_lower8 ((a >> 8) & 255) << 16;
w0_t[1] = uint_to_hex_lower8 ((a >> 16) & 255) << 0
| uint_to_hex_lower8 ((a >> 24) & 255) << 16;
w0_t[2] = uint_to_hex_lower8 ((b >> 0) & 255) << 0
| uint_to_hex_lower8 ((b >> 8) & 255) << 16;
w0_t[3] = uint_to_hex_lower8 ((b >> 16) & 255) << 0
| uint_to_hex_lower8 ((b >> 24) & 255) << 16;
w1_t[0] = uint_to_hex_lower8 ((c >> 0) & 255) << 0
| uint_to_hex_lower8 ((c >> 8) & 255) << 16;
w1_t[1] = uint_to_hex_lower8 ((c >> 16) & 255) << 0
| uint_to_hex_lower8 ((c >> 24) & 255) << 16;
w1_t[2] = uint_to_hex_lower8 ((d >> 0) & 255) << 0
| uint_to_hex_lower8 ((d >> 8) & 255) << 16;
w1_t[3] = uint_to_hex_lower8 ((d >> 16) & 255) << 0
| uint_to_hex_lower8 ((d >> 24) & 255) << 16;
w2_t[0] = esalt_buf0[0];
w2_t[1] = esalt_buf0[1];
w2_t[2] = esalt_buf0[2];
w2_t[3] = esalt_buf0[3];
w3_t[0] = esalt_buf0[4];
w3_t[1] = esalt_buf0[5];
w3_t[2] = esalt_buf0[6];
w3_t[3] = esalt_buf0[7];
// md5
// 1st transform
a = MD5M_A;
b = MD5M_B;
c = MD5M_C;
d = MD5M_D;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
r_a = a;
r_b = b;
r_c = c;
r_d = d;
// 2nd transform
w0_t[0] = esalt_buf0[ 8];
w0_t[1] = esalt_buf0[ 9];
w0_t[2] = esalt_buf0[10];
w0_t[3] = esalt_buf0[11];
w1_t[0] = esalt_buf0[12];
w1_t[1] = esalt_buf0[13];
w1_t[2] = esalt_buf0[14];
w1_t[3] = esalt_buf0[15];
w2_t[0] = esalt_buf1[ 0];
w2_t[1] = esalt_buf1[ 1];
w2_t[2] = esalt_buf1[ 2];
w2_t[3] = esalt_buf1[ 3];
w3_t[0] = esalt_buf1[ 4];
w3_t[1] = esalt_buf1[ 5];
w3_t[2] = digest_esalt_len * 8;
w3_t[3] = 0;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += r_a;
b += r_b;
c += r_c;
d += r_d;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
COMPARE_S_SIMD (a, d, c, b);
Initial commit
2015-12-04 14:47:52 +00:00
}
}
- Added inline declaration to functions from simd.c, common.c, rp.c and types_ocl.c to increase performance - Dropped static declaration from functions in all kernel to achieve OpenCL 1.1 compatibility - Added -cl-std=CL1.1 to all kernel build options - Created environment variable to inform NVidia OpenCL runtime to not create its own kernel cache - Created environment variable to inform pocl OpenCL runtime to not create its own kernel cache
2016-05-01 21:15:26 +00:00
void m11400s_1_1 (u32 w0[4], u32 w1[4], u32 w2[4], u32 w3[4], const u32 pw_len, __global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, __local u32 *l_bin2asc)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
* modifier
*/
const u32 gid = get_global_id (0);
const u32 lid = get_local_id (0);
/**
* digest
*/
const u32 search[4] =
{
digests_buf[digests_offset].digest_buf[DGST_R0],
digests_buf[digests_offset].digest_buf[DGST_R1],
digests_buf[digests_offset].digest_buf[DGST_R2],
digests_buf[digests_offset].digest_buf[DGST_R3]
};
/**
* salt
*/
const u32 salt_len = esalt_bufs[salt_pos].salt_len; // not a bug, we need to get it from the esalt
const u32 pw_salt_len = salt_len + pw_len;
u32 salt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 salt_buf1[16];
Initial commit
2015-12-04 14:47:52 +00:00
salt_buf0[ 0] = esalt_bufs[salt_pos].salt_buf[ 0];
salt_buf0[ 1] = esalt_bufs[salt_pos].salt_buf[ 1];
salt_buf0[ 2] = esalt_bufs[salt_pos].salt_buf[ 2];
salt_buf0[ 3] = esalt_bufs[salt_pos].salt_buf[ 3];
salt_buf0[ 4] = esalt_bufs[salt_pos].salt_buf[ 4];
salt_buf0[ 5] = esalt_bufs[salt_pos].salt_buf[ 5];
salt_buf0[ 6] = esalt_bufs[salt_pos].salt_buf[ 6];
salt_buf0[ 7] = esalt_bufs[salt_pos].salt_buf[ 7];
salt_buf0[ 8] = esalt_bufs[salt_pos].salt_buf[ 8];
salt_buf0[ 9] = esalt_bufs[salt_pos].salt_buf[ 9];
salt_buf0[10] = esalt_bufs[salt_pos].salt_buf[10];
salt_buf0[11] = esalt_bufs[salt_pos].salt_buf[11];
salt_buf0[12] = esalt_bufs[salt_pos].salt_buf[12];
salt_buf0[13] = esalt_bufs[salt_pos].salt_buf[13];
salt_buf0[14] = esalt_bufs[salt_pos].salt_buf[14];
salt_buf0[15] = esalt_bufs[salt_pos].salt_buf[15];
salt_buf1[ 0] = esalt_bufs[salt_pos].salt_buf[16];
salt_buf1[ 1] = esalt_bufs[salt_pos].salt_buf[17];
salt_buf1[ 2] = esalt_bufs[salt_pos].salt_buf[18];
salt_buf1[ 3] = esalt_bufs[salt_pos].salt_buf[19];
salt_buf1[ 4] = esalt_bufs[salt_pos].salt_buf[20];
salt_buf1[ 5] = esalt_bufs[salt_pos].salt_buf[21];
salt_buf1[ 6] = esalt_bufs[salt_pos].salt_buf[22];
salt_buf1[ 7] = esalt_bufs[salt_pos].salt_buf[23];
salt_buf1[ 8] = esalt_bufs[salt_pos].salt_buf[24];
salt_buf1[ 9] = esalt_bufs[salt_pos].salt_buf[25];
salt_buf1[10] = esalt_bufs[salt_pos].salt_buf[26];
salt_buf1[11] = esalt_bufs[salt_pos].salt_buf[27];
salt_buf1[12] = esalt_bufs[salt_pos].salt_buf[28];
salt_buf1[13] = esalt_bufs[salt_pos].salt_buf[29];
salt_buf1[14] = 0;
salt_buf1[15] = 0;
/**
* esalt
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
u32 esalt_buf0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32 esalt_buf1[16];
u32 esalt_buf2[16];
Initial commit
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esalt_buf0[ 0] = esalt_bufs[salt_pos].esalt_buf[ 0];
esalt_buf0[ 1] = esalt_bufs[salt_pos].esalt_buf[ 1];
esalt_buf0[ 2] = esalt_bufs[salt_pos].esalt_buf[ 2];
esalt_buf0[ 3] = esalt_bufs[salt_pos].esalt_buf[ 3];
esalt_buf0[ 4] = esalt_bufs[salt_pos].esalt_buf[ 4];
esalt_buf0[ 5] = esalt_bufs[salt_pos].esalt_buf[ 5];
esalt_buf0[ 6] = esalt_bufs[salt_pos].esalt_buf[ 6];
esalt_buf0[ 7] = esalt_bufs[salt_pos].esalt_buf[ 7];
esalt_buf0[ 8] = esalt_bufs[salt_pos].esalt_buf[ 8];
esalt_buf0[ 9] = esalt_bufs[salt_pos].esalt_buf[ 9];
esalt_buf0[10] = esalt_bufs[salt_pos].esalt_buf[10];
esalt_buf0[11] = esalt_bufs[salt_pos].esalt_buf[11];
esalt_buf0[12] = esalt_bufs[salt_pos].esalt_buf[12];
esalt_buf0[13] = esalt_bufs[salt_pos].esalt_buf[13];
esalt_buf0[14] = esalt_bufs[salt_pos].esalt_buf[14];
esalt_buf0[15] = esalt_bufs[salt_pos].esalt_buf[15];
esalt_buf1[ 0] = esalt_bufs[salt_pos].esalt_buf[16];
esalt_buf1[ 1] = esalt_bufs[salt_pos].esalt_buf[17];
esalt_buf1[ 2] = esalt_bufs[salt_pos].esalt_buf[18];
esalt_buf1[ 3] = esalt_bufs[salt_pos].esalt_buf[19];
esalt_buf1[ 4] = esalt_bufs[salt_pos].esalt_buf[20];
esalt_buf1[ 5] = esalt_bufs[salt_pos].esalt_buf[21];
esalt_buf1[ 6] = esalt_bufs[salt_pos].esalt_buf[22];
esalt_buf1[ 7] = esalt_bufs[salt_pos].esalt_buf[23];
esalt_buf1[ 8] = esalt_bufs[salt_pos].esalt_buf[24];
esalt_buf1[ 9] = esalt_bufs[salt_pos].esalt_buf[25];
esalt_buf1[10] = esalt_bufs[salt_pos].esalt_buf[26];
esalt_buf1[11] = esalt_bufs[salt_pos].esalt_buf[27];
esalt_buf1[12] = esalt_bufs[salt_pos].esalt_buf[28];
esalt_buf1[13] = esalt_bufs[salt_pos].esalt_buf[29];
esalt_buf1[14] = esalt_bufs[salt_pos].esalt_buf[30];
esalt_buf1[15] = esalt_bufs[salt_pos].esalt_buf[31];
esalt_buf2[ 0] = esalt_bufs[salt_pos].esalt_buf[32];
esalt_buf2[ 1] = esalt_bufs[salt_pos].esalt_buf[33];
esalt_buf2[ 2] = esalt_bufs[salt_pos].esalt_buf[34];
esalt_buf2[ 3] = esalt_bufs[salt_pos].esalt_buf[35];
esalt_buf2[ 4] = esalt_bufs[salt_pos].esalt_buf[36];
esalt_buf2[ 5] = esalt_bufs[salt_pos].esalt_buf[37];
esalt_buf2[ 6] = 0;
esalt_buf2[ 7] = 0;
esalt_buf2[ 8] = 0;
esalt_buf2[ 9] = 0;
esalt_buf2[10] = 0;
esalt_buf2[11] = 0;
esalt_buf2[12] = 0;
esalt_buf2[13] = 0;
esalt_buf2[14] = 0;
esalt_buf2[15] = 0;
const u32 digest_esalt_len = 32 + esalt_len;
/**
* loop
*/
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0l = w0[0];
Initial commit
2015-12-04 14:47:52 +00:00
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
for (u32 il_pos = 0; il_pos < il_cnt; il_pos += VECT_SIZE)
Initial commit
2015-12-04 14:47:52 +00:00
{
Prepare NEW_SIMD_MODE for -a 1 kernels
2016-02-20 15:13:06 +00:00
const u32x w0r = ix_create_bft (bfs_buf, il_pos);
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
const u32x w0lr = w0l | w0r;
Initial commit
2015-12-04 14:47:52 +00:00
/*
* HA1 = md5 ($salt . $pass)
*/
// append the pass to the salt
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x block0[16];
Cleanup -m 114xx kernels to latest standard
2016-04-18 13:16:23 +00:00
u32x block1[16];
Initial commit
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block0[ 0] = salt_buf0[ 0];
block0[ 1] = salt_buf0[ 1];
block0[ 2] = salt_buf0[ 2];
block0[ 3] = salt_buf0[ 3];
block0[ 4] = salt_buf0[ 4];
block0[ 5] = salt_buf0[ 5];
block0[ 6] = salt_buf0[ 6];
block0[ 7] = salt_buf0[ 7];
block0[ 8] = salt_buf0[ 8];
block0[ 9] = salt_buf0[ 9];
block0[10] = salt_buf0[10];
block0[11] = salt_buf0[11];
block0[12] = salt_buf0[12];
block0[13] = salt_buf0[13];
block0[14] = salt_buf0[14];
block0[15] = salt_buf0[15];
block1[ 0] = salt_buf1[ 0];
block1[ 1] = salt_buf1[ 1];
block1[ 2] = salt_buf1[ 2];
block1[ 3] = salt_buf1[ 3];
block1[ 4] = salt_buf1[ 4];
block1[ 5] = salt_buf1[ 5];
block1[ 6] = salt_buf1[ 6];
block1[ 7] = salt_buf1[ 7];
block1[ 8] = salt_buf1[ 8];
block1[ 9] = salt_buf1[ 9];
block1[10] = salt_buf1[10];
block1[11] = salt_buf1[11];
block1[12] = salt_buf1[12];
block1[13] = salt_buf1[13];
block1[14] = salt_buf1[14];
block1[15] = salt_buf1[15];
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x w0_t[4];
u32x w1_t[4];
u32x w2_t[4];
u32x w3_t[4];
w0_t[0] = w0lr;
w0_t[1] = w0[1];
w0_t[2] = w0[2];
w0_t[3] = w0[3];
w1_t[0] = w1[0];
w1_t[1] = w1[1];
w1_t[2] = w1[2];
w1_t[3] = w1[3];
w2_t[0] = w2[0];
w2_t[1] = w2[1];
w2_t[2] = w2[2];
w2_t[3] = w2[3];
w3_t[0] = w3[0];
w3_t[1] = w3[1];
w3_t[2] = w3[2];
w3_t[3] = w3[3];
Initial commit
2015-12-04 14:47:52 +00:00
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
memcat32 (block0, block1, salt_len, w0_t, w1_t, w2_t, w3_t, pw_len);
Initial commit
2015-12-04 14:47:52 +00:00
w0_t[0] = block0[ 0];
w0_t[1] = block0[ 1];
w0_t[2] = block0[ 2];
w0_t[3] = block0[ 3];
w1_t[0] = block0[ 4];
w1_t[1] = block0[ 5];
w1_t[2] = block0[ 6];
w1_t[3] = block0[ 7];
w2_t[0] = block0[ 8];
w2_t[1] = block0[ 9];
w2_t[2] = block0[10];
w2_t[3] = block0[11];
w3_t[0] = block0[12];
w3_t[1] = block0[13];
w3_t[2] = block0[14];
w3_t[3] = block0[15];
// md5
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x a = MD5M_A;
u32x b = MD5M_B;
u32x c = MD5M_C;
u32x d = MD5M_D;
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
u32x r_a = a;
u32x r_b = b;
u32x r_c = c;
u32x r_d = d;
Initial commit
2015-12-04 14:47:52 +00:00
w0_t[0] = block1[ 0];
w0_t[1] = block1[ 1];
w0_t[2] = block1[ 2];
w0_t[3] = block1[ 3];
w1_t[0] = block1[ 4];
w1_t[1] = block1[ 5];
w1_t[2] = block1[ 6];
w1_t[3] = block1[ 7];
w2_t[0] = block1[ 8];
w2_t[1] = block1[ 9];
w2_t[2] = block1[10];
w2_t[3] = block1[11];
w3_t[0] = block1[12];
w3_t[1] = block1[13];
w3_t[2] = pw_salt_len * 8;
w3_t[3] = 0;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += r_a;
b += r_b;
c += r_c;
d += r_d;
/*
* final = md5 ($HA1 . $esalt)
* we have at least 2 MD5 blocks/transformations, but we might need 3
*/
w0_t[0] = uint_to_hex_lower8 ((a >> 0) & 255) << 0
| uint_to_hex_lower8 ((a >> 8) & 255) << 16;
w0_t[1] = uint_to_hex_lower8 ((a >> 16) & 255) << 0
| uint_to_hex_lower8 ((a >> 24) & 255) << 16;
w0_t[2] = uint_to_hex_lower8 ((b >> 0) & 255) << 0
| uint_to_hex_lower8 ((b >> 8) & 255) << 16;
w0_t[3] = uint_to_hex_lower8 ((b >> 16) & 255) << 0
| uint_to_hex_lower8 ((b >> 24) & 255) << 16;
w1_t[0] = uint_to_hex_lower8 ((c >> 0) & 255) << 0
| uint_to_hex_lower8 ((c >> 8) & 255) << 16;
w1_t[1] = uint_to_hex_lower8 ((c >> 16) & 255) << 0
| uint_to_hex_lower8 ((c >> 24) & 255) << 16;
w1_t[2] = uint_to_hex_lower8 ((d >> 0) & 255) << 0
| uint_to_hex_lower8 ((d >> 8) & 255) << 16;
w1_t[3] = uint_to_hex_lower8 ((d >> 16) & 255) << 0
| uint_to_hex_lower8 ((d >> 24) & 255) << 16;
w2_t[0] = esalt_buf0[0];
w2_t[1] = esalt_buf0[1];
w2_t[2] = esalt_buf0[2];
w2_t[3] = esalt_buf0[3];
w3_t[0] = esalt_buf0[4];
w3_t[1] = esalt_buf0[5];
w3_t[2] = esalt_buf0[6];
w3_t[3] = esalt_buf0[7];
// md5
// 1st transform
a = MD5M_A;
b = MD5M_B;
c = MD5M_C;
d = MD5M_D;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += MD5M_A;
b += MD5M_B;
c += MD5M_C;
d += MD5M_D;
r_a = a;
r_b = b;
r_c = c;
r_d = d;
// 2nd transform
w0_t[0] = esalt_buf0[ 8];
w0_t[1] = esalt_buf0[ 9];
w0_t[2] = esalt_buf0[10];
w0_t[3] = esalt_buf0[11];
w1_t[0] = esalt_buf0[12];
w1_t[1] = esalt_buf0[13];
w1_t[2] = esalt_buf0[14];
w1_t[3] = esalt_buf0[15];
w2_t[0] = esalt_buf1[ 0];
w2_t[1] = esalt_buf1[ 1];
w2_t[2] = esalt_buf1[ 2];
w2_t[3] = esalt_buf1[ 3];
w3_t[0] = esalt_buf1[ 4];
w3_t[1] = esalt_buf1[ 5];
w3_t[2] = esalt_buf1[ 6];
w3_t[3] = esalt_buf1[ 7];
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
// this is for sure the final block
a += r_a;
b += r_b;
c += r_c;
d += r_d;
r_a = a;
r_b = b;
r_c = c;
r_d = d;
w0_t[0] = esalt_buf1[ 8];
w0_t[1] = esalt_buf1[ 9];
w0_t[2] = esalt_buf1[10];
w0_t[3] = esalt_buf1[11];
w1_t[0] = esalt_buf1[12];
w1_t[1] = esalt_buf1[13];
w1_t[2] = esalt_buf1[14];
w1_t[3] = esalt_buf1[15];
w2_t[0] = esalt_buf2[ 0];
w2_t[1] = esalt_buf2[ 1];
w2_t[2] = esalt_buf2[ 2];
w2_t[3] = esalt_buf2[ 3];
w3_t[0] = esalt_buf2[ 4];
w3_t[1] = esalt_buf2[ 5];
w3_t[2] = digest_esalt_len * 8;
w3_t[3] = 0;
MD5_STEP (MD5_Fo, a, b, c, d, w0_t[0], MD5C00, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w0_t[1], MD5C01, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w0_t[2], MD5C02, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w0_t[3], MD5C03, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w1_t[0], MD5C04, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w1_t[1], MD5C05, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w1_t[2], MD5C06, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w1_t[3], MD5C07, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w2_t[0], MD5C08, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w2_t[1], MD5C09, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w2_t[2], MD5C0a, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w2_t[3], MD5C0b, MD5S03);
MD5_STEP (MD5_Fo, a, b, c, d, w3_t[0], MD5C0c, MD5S00);
MD5_STEP (MD5_Fo, d, a, b, c, w3_t[1], MD5C0d, MD5S01);
MD5_STEP (MD5_Fo, c, d, a, b, w3_t[2], MD5C0e, MD5S02);
MD5_STEP (MD5_Fo, b, c, d, a, w3_t[3], MD5C0f, MD5S03);
MD5_STEP (MD5_Go, a, b, c, d, w0_t[1], MD5C10, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w1_t[2], MD5C11, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w2_t[3], MD5C12, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w0_t[0], MD5C13, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w1_t[1], MD5C14, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w2_t[2], MD5C15, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w3_t[3], MD5C16, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w1_t[0], MD5C17, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w2_t[1], MD5C18, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w3_t[2], MD5C19, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w0_t[3], MD5C1a, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w2_t[0], MD5C1b, MD5S13);
MD5_STEP (MD5_Go, a, b, c, d, w3_t[1], MD5C1c, MD5S10);
MD5_STEP (MD5_Go, d, a, b, c, w0_t[2], MD5C1d, MD5S11);
MD5_STEP (MD5_Go, c, d, a, b, w1_t[3], MD5C1e, MD5S12);
MD5_STEP (MD5_Go, b, c, d, a, w3_t[0], MD5C1f, MD5S13);
Remove MD4/MD5 *H1/*H2 functions and use original H functions. Modern compilers will find this easy optimization automatically
2016-01-29 17:38:34 +00:00
MD5_STEP (MD5_H , a, b, c, d, w1_t[1], MD5C20, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w2_t[0], MD5C21, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w2_t[3], MD5C22, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w3_t[2], MD5C23, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w0_t[1], MD5C24, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w1_t[0], MD5C25, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w1_t[3], MD5C26, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w2_t[2], MD5C27, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w3_t[1], MD5C28, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w0_t[0], MD5C29, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w0_t[3], MD5C2a, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w1_t[2], MD5C2b, MD5S23);
MD5_STEP (MD5_H , a, b, c, d, w2_t[1], MD5C2c, MD5S20);
MD5_STEP (MD5_H , d, a, b, c, w3_t[0], MD5C2d, MD5S21);
MD5_STEP (MD5_H , c, d, a, b, w3_t[3], MD5C2e, MD5S22);
MD5_STEP (MD5_H , b, c, d, a, w0_t[2], MD5C2f, MD5S23);
Initial commit
2015-12-04 14:47:52 +00:00
MD5_STEP (MD5_I , a, b, c, d, w0_t[0], MD5C30, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w1_t[3], MD5C31, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w3_t[2], MD5C32, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w1_t[1], MD5C33, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w3_t[0], MD5C34, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w0_t[3], MD5C35, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w2_t[2], MD5C36, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w0_t[1], MD5C37, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w2_t[0], MD5C38, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w3_t[3], MD5C39, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w1_t[2], MD5C3a, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w3_t[1], MD5C3b, MD5S33);
MD5_STEP (MD5_I , a, b, c, d, w1_t[0], MD5C3c, MD5S30);
MD5_STEP (MD5_I , d, a, b, c, w2_t[3], MD5C3d, MD5S31);
MD5_STEP (MD5_I , c, d, a, b, w0_t[2], MD5C3e, MD5S32);
MD5_STEP (MD5_I , b, c, d, a, w2_t[1], MD5C3f, MD5S33);
a += r_a;
b += r_b;
c += r_c;
d += r_d;
Converted _a3 kernels, use SIMD for CPU and GPU
2016-01-23 14:32:31 +00:00
COMPARE_S_SIMD (a, d, c, b);
Initial commit
2015-12-04 14:47:52 +00:00
}
}
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
__kernel void m11400_m04 (__global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, const u32 combs_mode, const u32 gid_max)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
* modifier
Initial commit
2015-12-04 14:47:52 +00:00
*/
const u32 gid = get_global_id (0);
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
const u32 lid = get_local_id (0);
const u32 lsz = get_local_size (0);
Initial commit
2015-12-04 14:47:52 +00:00
/**
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
* bin2asc table
Initial commit
2015-12-04 14:47:52 +00:00
*/
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
__local u32 l_bin2asc[256];
for (u32 i = lid; i < 256; i += lsz)
{
const u32 i0 = (i >> 0) & 15;
const u32 i1 = (i >> 4) & 15;
l_bin2asc[i] = ((i0 < 10) ? '0' + i0 : 'a' - 10 + i0) << 8
| ((i1 < 10) ? '0' + i1 : 'a' - 10 + i1) << 0;
}
barrier (CLK_LOCAL_MEM_FENCE);
if (gid >= gid_max) return;
Initial commit
2015-12-04 14:47:52 +00:00
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
/**
* modifier
*/
Initial commit
2015-12-04 14:47:52 +00:00
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0[4];
Initial commit
2015-12-04 14:47:52 +00:00
w0[0] = pws[gid].i[ 0];
w0[1] = pws[gid].i[ 1];
w0[2] = pws[gid].i[ 2];
w0[3] = pws[gid].i[ 3];
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w1[4];
Initial commit
2015-12-04 14:47:52 +00:00
w1[0] = 0;
w1[1] = 0;
w1[2] = 0;
w1[3] = 0;
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w2[4];
Initial commit
2015-12-04 14:47:52 +00:00
w2[0] = 0;
w2[1] = 0;
w2[2] = 0;
w2[3] = 0;
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w3[4];
Initial commit
2015-12-04 14:47:52 +00:00
w3[0] = 0;
w3[1] = 0;
w3[2] = pws[gid].i[14];
w3[3] = 0;
const u32 pw_len = pws[gid].pw_len;
/**
* main
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
const u32 salt_len = esalt_bufs[salt_pos].salt_len;
const u32 sw_1 = ((32 + esalt_len + 1) > 119);
const u32 sw_2 = ((pw_len + salt_len) > 55) << 1;
switch (sw_1 | sw_2)
{
case 0:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400m_0_0 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 1:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400m_0_1 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 2:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400m_1_0 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 3:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400m_1_1 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
}
}
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
__kernel void m11400_m08 (__global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, const u32 combs_mode, const u32 gid_max)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
* modifier
Initial commit
2015-12-04 14:47:52 +00:00
*/
const u32 gid = get_global_id (0);
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
const u32 lid = get_local_id (0);
const u32 lsz = get_local_size (0);
Initial commit
2015-12-04 14:47:52 +00:00
/**
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
* bin2asc table
Initial commit
2015-12-04 14:47:52 +00:00
*/
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
__local u32 l_bin2asc[256];
for (u32 i = lid; i < 256; i += lsz)
{
const u32 i0 = (i >> 0) & 15;
const u32 i1 = (i >> 4) & 15;
l_bin2asc[i] = ((i0 < 10) ? '0' + i0 : 'a' - 10 + i0) << 8
| ((i1 < 10) ? '0' + i1 : 'a' - 10 + i1) << 0;
}
barrier (CLK_LOCAL_MEM_FENCE);
if (gid >= gid_max) return;
/**
* modifier
*/
Initial commit
2015-12-04 14:47:52 +00:00
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0[4];
Initial commit
2015-12-04 14:47:52 +00:00
w0[0] = pws[gid].i[ 0];
w0[1] = pws[gid].i[ 1];
w0[2] = pws[gid].i[ 2];
w0[3] = pws[gid].i[ 3];
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w1[4];
Initial commit
2015-12-04 14:47:52 +00:00
w1[0] = pws[gid].i[ 4];
w1[1] = pws[gid].i[ 5];
w1[2] = pws[gid].i[ 6];
w1[3] = pws[gid].i[ 7];
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w2[4];
Initial commit
2015-12-04 14:47:52 +00:00
w2[0] = 0;
w2[1] = 0;
w2[2] = 0;
w2[3] = 0;
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w3[4];
Initial commit
2015-12-04 14:47:52 +00:00
w3[0] = 0;
w3[1] = 0;
w3[2] = pws[gid].i[14];
w3[3] = 0;
const u32 pw_len = pws[gid].pw_len;
/**
* main
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
const u32 salt_len = esalt_bufs[salt_pos].salt_len;
const u32 sw_1 = ((32 + esalt_len + 1) > 119);
const u32 sw_2 = ((pw_len + salt_len) > 55) << 1;
switch (sw_1 | sw_2)
{
case 0:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400m_0_0 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 1:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400m_0_1 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 2:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400m_1_0 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 3:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400m_1_1 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
}
}
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
__kernel void m11400_m16 (__global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, const u32 combs_mode, const u32 gid_max)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
* modifier
Initial commit
2015-12-04 14:47:52 +00:00
*/
const u32 gid = get_global_id (0);
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
const u32 lid = get_local_id (0);
const u32 lsz = get_local_size (0);
Initial commit
2015-12-04 14:47:52 +00:00
/**
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
* bin2asc table
Initial commit
2015-12-04 14:47:52 +00:00
*/
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
__local u32 l_bin2asc[256];
for (u32 i = lid; i < 256; i += lsz)
{
const u32 i0 = (i >> 0) & 15;
const u32 i1 = (i >> 4) & 15;
l_bin2asc[i] = ((i0 < 10) ? '0' + i0 : 'a' - 10 + i0) << 8
| ((i1 < 10) ? '0' + i1 : 'a' - 10 + i1) << 0;
}
barrier (CLK_LOCAL_MEM_FENCE);
if (gid >= gid_max) return;
/**
* modifier
*/
Initial commit
2015-12-04 14:47:52 +00:00
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0[4];
Initial commit
2015-12-04 14:47:52 +00:00
w0[0] = pws[gid].i[ 0];
w0[1] = pws[gid].i[ 1];
w0[2] = pws[gid].i[ 2];
w0[3] = pws[gid].i[ 3];
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w1[4];
Initial commit
2015-12-04 14:47:52 +00:00
w1[0] = pws[gid].i[ 4];
w1[1] = pws[gid].i[ 5];
w1[2] = pws[gid].i[ 6];
w1[3] = pws[gid].i[ 7];
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w2[4];
Initial commit
2015-12-04 14:47:52 +00:00
w2[0] = pws[gid].i[ 8];
w2[1] = pws[gid].i[ 9];
w2[2] = pws[gid].i[10];
w2[3] = pws[gid].i[11];
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w3[4];
Initial commit
2015-12-04 14:47:52 +00:00
w3[0] = pws[gid].i[12];
w3[1] = pws[gid].i[13];
w3[2] = pws[gid].i[14];
w3[3] = pws[gid].i[15];
const u32 pw_len = pws[gid].pw_len;
/**
* main
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
const u32 salt_len = esalt_bufs[salt_pos].salt_len;
const u32 sw_1 = ((32 + esalt_len + 1) > 119);
const u32 sw_2 = ((pw_len + salt_len) > 55) << 1;
switch (sw_1 | sw_2)
{
case 0:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400m_0_0 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 1:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400m_0_1 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 2:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400m_1_0 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 3:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400m_1_1 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
}
}
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
__kernel void m11400_s04 (__global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, const u32 combs_mode, const u32 gid_max)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
* modifier
Initial commit
2015-12-04 14:47:52 +00:00
*/
const u32 gid = get_global_id (0);
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
const u32 lid = get_local_id (0);
const u32 lsz = get_local_size (0);
Initial commit
2015-12-04 14:47:52 +00:00
/**
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
* bin2asc table
Initial commit
2015-12-04 14:47:52 +00:00
*/
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
__local u32 l_bin2asc[256];
for (u32 i = lid; i < 256; i += lsz)
{
const u32 i0 = (i >> 0) & 15;
const u32 i1 = (i >> 4) & 15;
l_bin2asc[i] = ((i0 < 10) ? '0' + i0 : 'a' - 10 + i0) << 8
| ((i1 < 10) ? '0' + i1 : 'a' - 10 + i1) << 0;
}
barrier (CLK_LOCAL_MEM_FENCE);
if (gid >= gid_max) return;
/**
* modifier
*/
Initial commit
2015-12-04 14:47:52 +00:00
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0[4];
Initial commit
2015-12-04 14:47:52 +00:00
w0[0] = pws[gid].i[ 0];
w0[1] = pws[gid].i[ 1];
w0[2] = pws[gid].i[ 2];
w0[3] = pws[gid].i[ 3];
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w1[4];
Initial commit
2015-12-04 14:47:52 +00:00
w1[0] = 0;
w1[1] = 0;
w1[2] = 0;
w1[3] = 0;
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w2[4];
Initial commit
2015-12-04 14:47:52 +00:00
w2[0] = 0;
w2[1] = 0;
w2[2] = 0;
w2[3] = 0;
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w3[4];
Initial commit
2015-12-04 14:47:52 +00:00
w3[0] = 0;
w3[1] = 0;
w3[2] = pws[gid].i[14];
w3[3] = 0;
const u32 pw_len = pws[gid].pw_len;
/**
* main
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
const u32 salt_len = esalt_bufs[salt_pos].salt_len;
const u32 sw_1 = ((32 + esalt_len + 1) > 119);
const u32 sw_2 = ((pw_len + salt_len) > 55) << 1;
switch (sw_1 | sw_2)
{
case 0:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400s_0_0 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 1:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400s_0_1 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 2:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400s_1_0 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 3:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400s_1_1 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
}
}
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
__kernel void m11400_s08 (__global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, const u32 combs_mode, const u32 gid_max)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
* modifier
Initial commit
2015-12-04 14:47:52 +00:00
*/
const u32 gid = get_global_id (0);
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
const u32 lid = get_local_id (0);
const u32 lsz = get_local_size (0);
Initial commit
2015-12-04 14:47:52 +00:00
/**
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
* bin2asc table
Initial commit
2015-12-04 14:47:52 +00:00
*/
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
__local u32 l_bin2asc[256];
for (u32 i = lid; i < 256; i += lsz)
{
const u32 i0 = (i >> 0) & 15;
const u32 i1 = (i >> 4) & 15;
l_bin2asc[i] = ((i0 < 10) ? '0' + i0 : 'a' - 10 + i0) << 8
| ((i1 < 10) ? '0' + i1 : 'a' - 10 + i1) << 0;
}
barrier (CLK_LOCAL_MEM_FENCE);
if (gid >= gid_max) return;
/**
* modifier
*/
Initial commit
2015-12-04 14:47:52 +00:00
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0[4];
Initial commit
2015-12-04 14:47:52 +00:00
w0[0] = pws[gid].i[ 0];
w0[1] = pws[gid].i[ 1];
w0[2] = pws[gid].i[ 2];
w0[3] = pws[gid].i[ 3];
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w1[4];
Initial commit
2015-12-04 14:47:52 +00:00
w1[0] = pws[gid].i[ 4];
w1[1] = pws[gid].i[ 5];
w1[2] = pws[gid].i[ 6];
w1[3] = pws[gid].i[ 7];
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w2[4];
Initial commit
2015-12-04 14:47:52 +00:00
w2[0] = 0;
w2[1] = 0;
w2[2] = 0;
w2[3] = 0;
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w3[4];
Initial commit
2015-12-04 14:47:52 +00:00
w3[0] = 0;
w3[1] = 0;
w3[2] = pws[gid].i[14];
w3[3] = 0;
const u32 pw_len = pws[gid].pw_len;
/**
* main
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
const u32 salt_len = esalt_bufs[salt_pos].salt_len;
const u32 sw_1 = ((32 + esalt_len + 1) > 119);
const u32 sw_2 = ((pw_len + salt_len) > 55) << 1;
switch (sw_1 | sw_2)
{
case 0:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400s_0_0 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 1:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400s_0_1 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 2:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400s_1_0 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 3:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400s_1_1 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
}
}
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
__kernel void m11400_s16 (__global pw_t *pws, __global kernel_rule_t *rules_buf, __global comb_t *combs_buf, __global bf_t *bfs_buf, __global void *tmps, __global void *hooks, __global u32 *bitmaps_buf_s1_a, __global u32 *bitmaps_buf_s1_b, __global u32 *bitmaps_buf_s1_c, __global u32 *bitmaps_buf_s1_d, __global u32 *bitmaps_buf_s2_a, __global u32 *bitmaps_buf_s2_b, __global u32 *bitmaps_buf_s2_c, __global u32 *bitmaps_buf_s2_d, __global plain_t *plains_buf, __global digest_t *digests_buf, __global u32 *hashes_shown, __global salt_t *salt_bufs, __global sip_t *esalt_bufs, __global u32 *d_return_buf, __global u32 *d_scryptV_buf, const u32 bitmap_mask, const u32 bitmap_shift1, const u32 bitmap_shift2, const u32 salt_pos, const u32 loop_pos, const u32 loop_cnt, const u32 il_cnt, const u32 digests_cnt, const u32 digests_offset, const u32 combs_mode, const u32 gid_max)
Initial commit
2015-12-04 14:47:52 +00:00
{
/**
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
* modifier
Initial commit
2015-12-04 14:47:52 +00:00
*/
const u32 gid = get_global_id (0);
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
const u32 lid = get_local_id (0);
const u32 lsz = get_local_size (0);
Initial commit
2015-12-04 14:47:52 +00:00
/**
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
* bin2asc table
Initial commit
2015-12-04 14:47:52 +00:00
*/
Upgrade kernel to support dynamic local work sizes
2016-01-19 15:06:03 +00:00
__local u32 l_bin2asc[256];
for (u32 i = lid; i < 256; i += lsz)
{
const u32 i0 = (i >> 0) & 15;
const u32 i1 = (i >> 4) & 15;
l_bin2asc[i] = ((i0 < 10) ? '0' + i0 : 'a' - 10 + i0) << 8
| ((i1 < 10) ? '0' + i1 : 'a' - 10 + i1) << 0;
}
barrier (CLK_LOCAL_MEM_FENCE);
if (gid >= gid_max) return;
/**
* modifier
*/
Initial commit
2015-12-04 14:47:52 +00:00
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w0[4];
Initial commit
2015-12-04 14:47:52 +00:00
w0[0] = pws[gid].i[ 0];
w0[1] = pws[gid].i[ 1];
w0[2] = pws[gid].i[ 2];
w0[3] = pws[gid].i[ 3];
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w1[4];
Initial commit
2015-12-04 14:47:52 +00:00
w1[0] = pws[gid].i[ 4];
w1[1] = pws[gid].i[ 5];
w1[2] = pws[gid].i[ 6];
w1[3] = pws[gid].i[ 7];
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w2[4];
Initial commit
2015-12-04 14:47:52 +00:00
w2[0] = pws[gid].i[ 8];
w2[1] = pws[gid].i[ 9];
w2[2] = pws[gid].i[10];
w2[3] = pws[gid].i[11];
- Dropped all vector code since new GPU's are all scalar, makes the code much easier - Some performance on low-end GPU may drop because of that, but only for a few hash-modes - Dropped scalar code (aka warp) since we do not have any vector datatypes anymore - Renamed C++ overloading functions memcat32_9 -> memcat_c32_w4x4_a3x4 - Still need to fix kernels to new function names, needs to be done manually - Temperature Management needs to be rewritten partially because of conflicting datatypes names - Added code to create different codepaths for NV on AMD in runtime in host (see data.vendor_id) - Added code to create different codepaths for NV on AMD in runtime in kernels (see IS_NV and IS_AMD) - First tests working for -m 0, for example - Great performance increases in general for NV so far - Tested amp_* and markov_* kernel - Migrated special NV optimizations for rule processor
2015-12-15 11:04:22 +00:00
u32 w3[4];
Initial commit
2015-12-04 14:47:52 +00:00
w3[0] = pws[gid].i[12];
w3[1] = pws[gid].i[13];
w3[2] = pws[gid].i[14];
w3[3] = pws[gid].i[15];
const u32 pw_len = pws[gid].pw_len;
/**
* main
*/
const u32 esalt_len = esalt_bufs[salt_pos].esalt_len;
const u32 salt_len = esalt_bufs[salt_pos].salt_len;
const u32 sw_1 = ((32 + esalt_len + 1) > 119);
const u32 sw_2 = ((pw_len + salt_len) > 55) << 1;
switch (sw_1 | sw_2)
{
case 0:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400s_0_0 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 1:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400s_0_1 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 2:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400s_1_0 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
case 3:
Fixed two major problems 1) SIMD code for all attack-mode Macro vector_accessible() was not refactored and missing completely. Had to rename variables rules_cnt, combs_cnt and bfs_cnt into il_cnt which was a good thing anyway as with new SIMD code they all act in the same way. 2) SIMD code for attack-mode 0 With new SIMD code, apply_rules_vect() has to return u32 not u32x. This has massive impact on all *_a0 kernels. I've rewritten most of them. Deep testing using test.sh is still required. Some kernel need more fixes: - Some are kind of completely incompatible like m10400 but they still use old check_* includes, we should get rid of them as they are no longer neccessary as we have simd.c - Some have a chance but require additional effort like m11500. We can use commented out "#define NEW_SIMD_CODE" to find them This change can have negative impact on -a0 performance for device that require vectorization. That is mostly CPU devices. New GPU's are all scalar, so they wont get hurt by this. This change also proofes that there's no way to efficiently vectorize kernel rules with new SIMD code, but it enables the addition of the rule functions like @ that we were missing for some long time. This is a TODO.
2016-02-27 16:18:54 +00:00
m11400s_1_1 (w0, w1, w2, w3, pw_len, pws, rules_buf, combs_buf, bfs_buf, tmps, hooks, bitmaps_buf_s1_a, bitmaps_buf_s1_b, bitmaps_buf_s1_c, bitmaps_buf_s1_d, bitmaps_buf_s2_a, bitmaps_buf_s2_b, bitmaps_buf_s2_c, bitmaps_buf_s2_d, plains_buf, digests_buf, hashes_shown, salt_bufs, esalt_bufs, d_return_buf, d_scryptV_buf, bitmap_mask, bitmap_shift1, bitmap_shift2, salt_pos, loop_pos, loop_cnt, il_cnt, digests_cnt, digests_offset, l_bin2asc);
Initial commit
2015-12-04 14:47:52 +00:00
break;
}
}
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