1
0
mirror of https://github.com/bitdefender/bddisasm.git synced 2024-10-18 13:58:55 +00:00
bddisasm/bddisasm_test/x86/avx/avxneconvert_64.asm
BITDEFENDER\vlutas 9ba1e6a2f9 Added support for new Intel instructions, per Intel ISA extensions document #319433-046 (September 2022): PREFETCHITI, RAO-INT, CMPCCXADD, WRMSRNS, MSRLIST, AMX-FP16, AVX-IFMA, AVX-NE-CONVERT, AVX-VNNI-INT8.
Multiple minor fixes to existing instructions.
Moved x86 decoding tests in a separate directory & improved the test script.
2022-10-04 12:22:59 +03:00

20 lines
1.3 KiB
NASM

bits 64
db 0xc4, 0xe2, 0x7a, 0xb1, 0x00 ; VBCSTNEBF162PS xmm0, word [rax]
db 0xc4, 0xe2, 0x7e, 0xb1, 0x00 ; VBCSTNEBF162PS ymm0, word [rax]
db 0xc4, 0xe2, 0x79, 0xb1, 0x00 ; VBCSTNESH2PS xmm0, word [rax]
db 0xc4, 0xe2, 0x7d, 0xb1, 0x00 ; VBCSTNESH2PS ymm0, word [rax]
db 0xc4, 0xe2, 0x7a, 0xb0, 0x00 ; VCVTNEEBF162PS xmm0, xmmword [rax]
db 0xc4, 0xe2, 0x7e, 0xb0, 0x00 ; VCVTNEEBF162PS ymm0, ymmword [rax]
db 0xc4, 0xe2, 0x79, 0xb0, 0x00 ; VCVTNEEPH2PS xmm0, xmmword [rax]
db 0xc4, 0xe2, 0x7d, 0xb0, 0x00 ; VCVTNEEPH2PS ymm0, ymmword [rax]
db 0xc4, 0xe2, 0x7b, 0xb0, 0x00 ; VCVTNEOBF162PS xmm0, xmmword [rax]
db 0xc4, 0xe2, 0x7f, 0xb0, 0x00 ; VCVTNEOBF162PS ymm0, ymmword [rax]
db 0xc4, 0xe2, 0x78, 0xb0, 0x00 ; VCVTNEOPH2PS xmm0, xmmword [rax]
db 0xc4, 0xe2, 0x7c, 0xb0, 0x00 ; VCVTNEOPH2PS ymm0, ymmword [rax]
db 0xc4, 0xe2, 0x7a, 0x72, 0xC1 ; VCVTNEPS2BF16 xmm0, xmm1
db 0xc4, 0xe2, 0x7e, 0x72, 0xC1 ; VCVTNEPS2BF16 ymm0, ymm1
db 0xc4, 0xe2, 0x7a, 0x72, 0x00 ; VCVTNEPS2BF16 xmm0, [rax]
db 0xc4, 0xe2, 0x7e, 0x72, 0x00 ; VCVTNEPS2BF16 ymm0, [rax]